JP2000030456A5 - - Google Patents

Download PDF

Info

Publication number
JP2000030456A5
JP2000030456A5 JP1998198590A JP19859098A JP2000030456A5 JP 2000030456 A5 JP2000030456 A5 JP 2000030456A5 JP 1998198590 A JP1998198590 A JP 1998198590A JP 19859098 A JP19859098 A JP 19859098A JP 2000030456 A5 JP2000030456 A5 JP 2000030456A5
Authority
JP
Japan
Prior art keywords
clock
synchronization
read
supplies
time corresponding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1998198590A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000030456A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP10198590A priority Critical patent/JP2000030456A/ja
Priority claimed from JP10198590A external-priority patent/JP2000030456A/ja
Priority to US09/346,919 priority patent/US6337833B1/en
Priority to KR1019990028147A priority patent/KR100573534B1/ko
Publication of JP2000030456A publication Critical patent/JP2000030456A/ja
Publication of JP2000030456A5 publication Critical patent/JP2000030456A5/ja
Pending legal-status Critical Current

Links

JP10198590A 1998-07-14 1998-07-14 メモリデバイス Pending JP2000030456A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP10198590A JP2000030456A (ja) 1998-07-14 1998-07-14 メモリデバイス
US09/346,919 US6337833B1 (en) 1998-07-14 1999-07-02 Memory device
KR1019990028147A KR100573534B1 (ko) 1998-07-14 1999-07-13 메모리 디바이스

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10198590A JP2000030456A (ja) 1998-07-14 1998-07-14 メモリデバイス

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007069871A Division JP2007149341A (ja) 2007-03-19 2007-03-19 メモリデバイス

Publications (2)

Publication Number Publication Date
JP2000030456A JP2000030456A (ja) 2000-01-28
JP2000030456A5 true JP2000030456A5 (enExample) 2005-01-13

Family

ID=16393729

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10198590A Pending JP2000030456A (ja) 1998-07-14 1998-07-14 メモリデバイス

Country Status (3)

Country Link
US (1) US6337833B1 (enExample)
JP (1) JP2000030456A (enExample)
KR (1) KR100573534B1 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001014847A (ja) * 1999-06-30 2001-01-19 Toshiba Corp クロック同期回路
JP3535788B2 (ja) * 1999-12-27 2004-06-07 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置
KR20020014563A (ko) * 2000-08-18 2002-02-25 윤종용 반도체 메모리 장치
JP2002109880A (ja) * 2000-09-28 2002-04-12 Toshiba Corp クロック同期回路
US6898683B2 (en) * 2000-12-19 2005-05-24 Fujitsu Limited Clock synchronized dynamic memory and clock synchronized integrated circuit
JP3552213B2 (ja) * 2001-08-31 2004-08-11 株式会社東芝 Ｓｄメモリカードホストコントローラ及びクロック制御方法
US6981169B2 (en) * 2002-02-26 2005-12-27 Sun Microsystems, Inc. Modified glitch latch for use with power saving dynamic register file structures
JP2003297083A (ja) 2002-03-29 2003-10-17 Mitsubishi Electric Corp 半導体記憶装置
KR100638747B1 (ko) * 2004-12-28 2006-10-30 주식회사 하이닉스반도체 반도체 기억 소자의 클럭 생성 장치 및 방법
KR100744042B1 (ko) * 2005-09-28 2007-07-30 주식회사 하이닉스반도체 반도체메모리소자의 내부 어드레스 생성장치
US7489172B2 (en) * 2005-09-29 2009-02-10 Hynix Semiconductor Inc. DLL driver control circuit
US7609584B2 (en) 2005-11-19 2009-10-27 Samsung Electronics Co., Ltd. Latency control circuit and method thereof and an auto-precharge control circuit and method thereof
US20070291572A1 (en) * 2006-06-20 2007-12-20 Josef Schnell Clock circuit for semiconductor memory
KR100902048B1 (ko) * 2007-05-14 2009-06-15 주식회사 하이닉스반도체 반도체 장치의 어드레스 수신회로
KR20100115613A (ko) * 2009-04-20 2010-10-28 삼성전자주식회사 레이턴시 전류 소모를 줄일 수 있는 반도체 메모리 장치
JP5746201B2 (ja) 2009-11-05 2015-07-08 ラムバス・インコーポレーテッド インターフェースクロックマネージメント
KR20110052941A (ko) 2009-11-13 2011-05-19 삼성전자주식회사 어디티브 레이턴시를 가지는 반도체 장치
US10437514B2 (en) 2017-10-02 2019-10-08 Micron Technology, Inc. Apparatuses and methods including memory commands for semiconductor memories
US10467158B2 (en) 2017-11-29 2019-11-05 Micron Technology, Inc. Apparatuses and methods including memory commands for semiconductor memories

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0142968B1 (ko) * 1995-06-30 1998-08-17 김광호 반도체 메모리 장치의 클럭 발생 장치
KR0164807B1 (ko) * 1995-12-22 1999-02-01 김광호 반도체 메모리 장치의 데이타 출력버퍼 제어회로
JP3759645B2 (ja) * 1995-12-25 2006-03-29 三菱電機株式会社 同期型半導体記憶装置
KR980004976A (ko) * 1996-06-07 1998-03-30 김광호 반도체 메모리 장치의 클럭 발생 제어기 및 클럭 발생 제어 방법
JP3183184B2 (ja) * 1996-08-09 2001-07-03 日本電気株式会社 クロック同期型半導体記憶装置
DE69629598T2 (de) * 1996-09-26 2004-06-24 Mitsubishi Denki K.K. Synchron-halbleiterspeichervorrichtung
US5923611A (en) * 1996-12-20 1999-07-13 Micron Technology, Inc. Memory having a plurality of external clock signal inputs
JPH10208470A (ja) * 1997-01-17 1998-08-07 Nec Corp 同期型半導体記憶装置
KR100240419B1 (ko) * 1997-03-18 2000-01-15 윤종용 반도체 메모리 장치 및 그것의 데이터 독출 방법
JP3504104B2 (ja) * 1997-04-03 2004-03-08 富士通株式会社 シンクロナスｄｒａｍ
KR100258859B1 (ko) * 1997-04-30 2000-06-15 김영환 메모리의 데이터 출력 버퍼

Similar Documents

Publication Publication Date Title
JP2000030456A5 (enExample)
US6073223A (en) Memory controller and method for intermittently activating and idling a clock signal for a synchronous memory
JP2002015575A5 (enExample)
EP1381053A3 (en) Device and method for selecting power down exit
JPH1031886A (ja) ランダムアクセスメモリ
JP2000021165A5 (enExample)
KR950024323A (ko) 캐시라인 리프레이스장치 및 방법
JPS6442096A (en) Semiconductor memory
KR950010564B1 (en) Data output buffer of synchronous semiconductor memory device
WO2002017323A3 (en) Synchronized write data on a high speed memory bus
JP2000030456A (ja) メモリデバイス
KR100245078B1 (ko) 고속 버스트 제어 방법 및 장치
JPH11265581A5 (enExample)
ATE287119T1 (de) 'burst'-architektur für flashspeicher
JP3954208B2 (ja) 半導体記憶装置
TW200608207A (en) A method for detecting the capture range of the data strobe
US7227812B2 (en) Write address synchronization useful for a DDR prefetch SDRAM
JPH10208468A (ja) 半導体記憶装置並びに同期型半導体記憶装置
JP3317912B2 (ja) 半導体記憶装置
JP3942074B2 (ja) データ入出力装置、メモリ・システム、データ入出力回路およびデータ入出力方法
TW200617886A (en) Fuse data storage system using core memory
TW367440B (en) Memory control circuit reducing a consumed power of memory
JP2007334943A (ja) メモリ制御装置
JPH09106674A (ja) 同期型ダイナミック半導体記憶装置
JP3563340B2 (ja) メモリコントローラ