JP2000028640A - Probe card for ic tester - Google Patents
Probe card for ic testerInfo
- Publication number
- JP2000028640A JP2000028640A JP10191310A JP19131098A JP2000028640A JP 2000028640 A JP2000028640 A JP 2000028640A JP 10191310 A JP10191310 A JP 10191310A JP 19131098 A JP19131098 A JP 19131098A JP 2000028640 A JP2000028640 A JP 2000028640A
- Authority
- JP
- Japan
- Prior art keywords
- probe card
- needle
- zero insertion
- contact
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07342—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体集積回路素
子などの各種電子部品（以下、代表的にＩＣと称す
る。）をテストするためのＩＣ試験装置に関し、特にテ
ストヘッドと被試験物とを接続するために用いられるプ
ローブカードに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC testing apparatus for testing various electronic components (hereinafter, typically referred to as ICs) such as semiconductor integrated circuit devices, and more particularly, to an IC testing apparatus for testing a test head and a device under test. The present invention relates to a probe card used for connection.
【０００２】[0002]
【従来の技術】半導体集積回路素子は、シリコンウェハ
などに多数個造り込まれたのち、ダイシング、ワイヤボ
ンディングおよびパッケージングなどの諸工程を経て電
子部品として完成する。こうしたＩＣにあっては、出荷
前に動作テストが行われ、このＩＣのテストは、完成品
の状態でもウェハ状態でも行われる。2. Description of the Related Art After a large number of semiconductor integrated circuit devices are manufactured on a silicon wafer or the like, electronic devices are completed through various processes such as dicing, wire bonding, and packaging. For such an IC, an operation test is performed before shipment, and the test of the IC is performed both in a finished product state and in a wafer state.
【０００３】ウェハ状態の被試験ＩＣをテストするＩＣ
試験装置としては、たとえば実開平５−１５４３１号公
報に開示されたものが知られている。このＩＣ試験装置
ではニードル（針状接点）が設けられたプローブカード
のテストヘッドからの押圧力を軽減するためにゼロ挿抜
力コネクタが実装され、これによりプローブカードの変
形による接触不良が防止される。An IC for testing an IC under test in a wafer state
As a test apparatus, for example, a test apparatus disclosed in Japanese Utility Model Laid-Open No. 5-15431 is known. In this IC test apparatus, a zero insertion / extraction force connector is mounted to reduce a pressing force from a test head of a probe card provided with a needle (needle-shaped contact), thereby preventing a contact failure due to deformation of the probe card. .
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、従来の
プローブカードにあっては、各ニードルとこれに接続さ
れたゼロ挿抜力コネクタの各接点との距離が不均一であ
ったため、その配線パターンのインピーダンスが相違し
て電気的特性がばらつくといった問題があった。However, in the conventional probe card, since the distance between each needle and each contact of the zero insertion / extraction force connector connected thereto is not uniform, the impedance of the wiring pattern is not uniform. However, there is a problem that the electrical characteristics vary due to the difference.
【０００５】本発明は、このような従来技術の問題点に
鑑みてなされたものであり、電気的特性に優れたゼロ挿
抜力コネクタ式ＩＣ試験装置用プローブカードを提供す
ることを目的とする。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and has as its object to provide a probe card for a zero insertion / extraction force connector type IC test apparatus having excellent electrical characteristics.
【０００６】[0006]
【課題を解決するための手段】（１） 上記目的を達成
するために、本発明のＩＣ試験装置用プローブカード
は、ＩＣ試験装置のテストヘッド基板に電気的に接続さ
れ、被試験物に電気的に接触する複数の針状接点が一主
面に設けられたＩＣ試験装置用プローブカードにおい
て、前記針状接点と電気的に接続された複数のゼロ挿抜
力コネクタの一方が、前記針状接点が設けられた位置か
ら実質的に放射状の位置に設けられていることを特徴と
する。(1) In order to achieve the above object, a probe card for an IC test apparatus according to the present invention is electrically connected to a test head substrate of the IC test apparatus and electrically connected to a device under test. A plurality of zero insertion / extraction force connectors electrically connected to the needle-shaped contacts, wherein the plurality of needle-shaped contacts are provided on one main surface of the probe card. Is provided at a position substantially radially from the position where is provided.
【０００７】本発明のＩＣ試験装置用プローブカードで
は、ゼロ挿抜力コネクタが、針状接点が設けられた位置
から実質的に放射状の位置に設けられているので、各々
の針状接点とこれに接続されるゼロ挿抜力コネクタの各
々の接点との距離を均一に設定することが可能となる。
したがって、各針状接点からゼロ挿抜力コネクタの各接
点に至る配線のインピーダンスを均一にすることがで
き、これにより電気的特性のばらつきを抑制することが
できる。In the probe card for an IC test apparatus according to the present invention, since the zero insertion / extraction force connector is provided at a position substantially radial from the position at which the needle contacts are provided, each of the needle contacts and each of the needle contacts are provided. It is possible to uniformly set the distance between each contact of the zero insertion / extraction force connector to be connected.
Therefore, it is possible to make the impedance of the wiring from each needle-like contact to each contact of the zero insertion / extraction force connector uniform, thereby suppressing variations in electrical characteristics.
【０００８】上記発明における「実質的に放射状の位
置」とは、針状接点が設けられた位置または領域を中心
点として、ここから放射状に広がるほぼ等距離（中心点
からの距離）の位置または領域を意味するものであり、
幾何学的に厳密な放射状を意味するものではない。要す
るに、上述したように針状接点とゼロ挿抜力コネクタの
接点とを結ぶ配線のインピーダンスが、プローブカード
の電気的特性に影響のない範囲でほぼ均一になる位置を
全て含む趣旨である。In the above invention, the "substantially radial position" means a position or a region where the needle-shaped contact point is provided as a center point, and a position or a substantially equal distance (distance from the center point) extending radially from the position or region. Means area,
It does not mean geometrically strict radial. In short, this is intended to include all positions where the impedance of the wiring connecting the needle-shaped contact and the contact of the zero insertion / extraction connector is substantially uniform within a range that does not affect the electrical characteristics of the probe card.
【０００９】（２） 上記発明において、ゼロ挿抜力コ
ネクタを、針状接点が設けられた位置から実質的に放射
状に配置する具体的手段は特に限定されないが、一つの
形態として、請求項２記載のように、基板を円形状に形
成し、前記針状接点を基板の略中心に設け、前記ゼロ挿
抜力コネクタの一方を基板の外周縁上に設けたＩＣ試験
装置用プローブカードを挙げることができる。(2) In the above invention, the specific means for arranging the zero insertion / removal force connector substantially radially from the position where the needle-shaped contact is provided is not particularly limited. A probe card for an IC test apparatus in which a substrate is formed in a circular shape, the needle-shaped contacts are provided substantially at the center of the substrate, and one of the zero insertion / extraction force connectors is provided on an outer peripheral edge of the substrate. it can.
【００１０】被試験物がロジック系ＩＣなどの場合に
は、１個または２個といった少数の被試験物を同時測定
することが多いが、こうした場合には特に、針状接点を
基板の略中心に設けるとともに、ゼロ挿抜力コネクタを
基板の外周縁上に設けることで、基板の主面を効率的に
利用でき、しかも針状接点とゼロ挿抜力コネクタの接点
との距離を均一にレイアウトし易い。When the device under test is a logic IC or the like, a small number of devices under test, such as one or two, are often measured simultaneously. In addition, by providing the zero insertion / extraction force connector on the outer peripheral edge of the substrate, the main surface of the substrate can be used efficiently, and the distance between the needle-shaped contact and the contact of the zero insertion / extraction force connector can be easily laid out uniformly. .
【００１１】本発明にいうゼロ挿抜力コネクタとは、相
手方のゼロ挿抜力コネクタと互いに挿抜する際に、挿抜
方向に力を加える必要がないタイプのコネクタをいい、
その具体的構造は特に限定されない。The zero insertion / extraction force connector referred to in the present invention refers to a connector of a type that does not need to apply force in the insertion / extraction direction when inserting / extracting with a counterpart zero insertion / extraction force connector.
The specific structure is not particularly limited.
【００１２】[0012]
【発明の実施の形態】以下、本発明の実施形態を図面に
基づいて説明する。図１は本発明のプローブカードが適
用されるＩＣ試験装置のテストヘッドを示す要部分解斜
視図、図２は図１のプローブカードがテストヘッドに組
み付けられた状態を示す断面図、図３は図１のプローブ
カードを示す平面図である。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is an exploded perspective view showing a main part of a test head of an IC test apparatus to which the probe card of the present invention is applied, FIG. 2 is a sectional view showing a state where the probe card of FIG. 1 is assembled to the test head, and FIG. It is a top view which shows the probe card of FIG.
【００１３】図１に示すように、被試験物であるウェハ
ＩＣは、１枚のウェハに多数の半導体回路が集積された
ものであり、テストを行う場合にはウェハチャック３に
真空吸着され、高精度に位置出しされた状態で保持され
る。As shown in FIG. 1, a wafer IC, which is a device under test, has a large number of semiconductor circuits integrated on one wafer. It is held in a state where it is positioned with high precision.
【００１４】ウェハチャック３の上部に位置するカード
ホルダ４は、中央に円形状通孔４１が形成され、この通
孔４１の周縁にプローブカード２を保持するための段部
４２が形成されている。このカードホルダ４は、図２に
示すようにリングキャリア４３に固定されており、後述
するトッププレート１１に対する位置出しは、リングキ
ャリア４３側に設けられたガイドピン４４をトッププレ
ート１１側に設けられたガイドブッシュ１３に挿入する
ことにより行われる。The card holder 4 located above the wafer chuck 3 has a circular through hole 41 formed in the center, and a step 42 for holding the probe card 2 is formed on the periphery of the through hole 41. . The card holder 4 is fixed to a ring carrier 43 as shown in FIG. 2, and the positioning of the card holder 4 with respect to the top plate 11 described later is performed by providing a guide pin 44 provided on the ring carrier 43 side on the top plate 11 side. This is performed by inserting the guide bush 13 into the guide bush 13.
【００１５】本実施形態のプローブカード２は、円形状
に形成された基板を有し、その一主面（図１および図２
において下面）の略中央に、２個のＩＣを同時測定可能
なように２対のニードル群２１（本発明の針状接点に相
当する。）が設けられている。この２対のニードル群２
１は、図３に示すようにウェハＩＣに集積されたＩＣの
形状に応じた形状（図示する例では一つのものが正方
形）のものが２個千鳥状（互い違い）に配置されてな
る。The probe card 2 of the present embodiment has a substrate formed in a circular shape, and has one main surface thereof (FIGS. 1 and 2).
, A pair of needle groups 21 (corresponding to the needle-shaped contacts of the present invention) is provided substantially at the center of the lower surface (in FIG. 1) so that two ICs can be measured simultaneously. These two pairs of needle groups 2
As shown in FIG. 3, two wafers 1 each having a shape (one square in the illustrated example) according to the shape of the ICs integrated on the wafer IC are arranged in a staggered manner (alternately).
【００１６】このうちの一つのニードル群２１は、ウェ
ハＩＣ上に集積形成された１個のＩＣの端子（ワイヤボ
ンディングする前の状態の接点）のそれぞれに接触する
数だけのニードル２１１が設けられてなり、図２に示す
ようにこのニードル２１１の先端がウェハＩＣ側に向か
うとともに、他端はプローブカード２の基板に固定され
ている。One of the needle groups 21 is provided with as many needles 211 as to be in contact with the terminals (contacts before wire bonding) of one IC integrated on the wafer IC. As shown in FIG. 2, the tip of the needle 211 is directed toward the wafer IC, and the other end is fixed to the substrate of the probe card 2.
【００１７】ちなみに、２つのニードル群２１を図示す
るように千鳥状に配置するのは、それぞれのニードル２
１１が互いに干渉するのを回避するためである。また、
本実施形態では２個同時測定する例を挙げたが、本発明
のプローブカード２は同時測定個数には何ら限定され
ず、単数測定または３個以上の同時測定を行うタイプの
ものであっても良い。By the way, the two needle groups 21 are arranged in a staggered manner as shown in FIG.
11 to avoid interference with each other. Also,
In the present embodiment, an example of performing two simultaneous measurements has been described. However, the probe card 2 of the present invention is not limited to the number of simultaneous measurements, and may be a type that performs single measurement or three or more simultaneous measurements. good.
【００１８】本実施形態のプローブカード２では、基板
の反対側の主面（図１および図２では上面）の外周縁
に、ゼロ挿抜力コネクタの一方２２ａがほぼ等しい間隔
で実装されている。In the probe card 2 of the present embodiment, one of the zero insertion / extraction force connectors 22a is mounted on the outer peripheral edge of the opposite main surface (the upper surface in FIGS. 1 and 2) of the substrate at substantially equal intervals.
【００１９】このゼロ挿抜力コネクタ（Zero Insersion
Force Connector）とは、後述するコンタクトリングに
設けられた他方のゼロ挿抜力コネクタ２２ｂと互いに挿
抜する際に、挿抜方向（本例では上下方向）に力を加え
る必要がないタイプのコネクタをいい、たとえばコネク
タ内に長手方向に組み込まれているレールをシリンダに
より前後に駆動させて、レールと係合しているカムを上
下させ、そのカムの上下によりピンコンタクトを挟むソ
ケットコンタクトの間隔を狭めたり広げたりする方式、
あるいはその他の方式のものを用いることができる。This zero insertion / extraction force connector (Zero Insersion
Force Connector) refers to a type of connector that does not need to apply force in the insertion / extraction direction (vertical direction in this example) when being inserted into and extracted from the other zero insertion / extraction force connector 22b provided on the contact ring described later. For example, a rail built into the connector in the longitudinal direction is driven back and forth by a cylinder to raise and lower the cam engaged with the rail, and the pitch of the socket contact that sandwiches the pin contact is narrowed or expanded by the vertical movement of the cam. Or method,
Alternatively, other types can be used.
【００２０】なお、各ニードル２１１とゼロ挿抜力コネ
クタ２２ａの各接点とは、プローブカード２の基板に形
成された配線パターンやスルーホール（何れも図示を省
略する。）により電気的に接続されている。Each needle 211 and each contact of the zero insertion / extraction force connector 22a are electrically connected by a wiring pattern or a through hole (both not shown) formed on the substrate of the probe card 2. I have.
【００２１】一方、ウェハチャック３の上部には、ＩＣ
試験装置のテストヘッド１が位置し、図示は省略するが
ここにパフォーマンスボードなどの各種基板が設けられ
ている。このテストヘッド１の最下面には、図１および
図２に示すようにトップパネル１１が固定されており、
さらにこのトップパネル１１の下面にコンタクトリング
１２が固定されている。On the other hand, above the wafer chuck 3, an IC
A test head 1 of the test apparatus is located, and various substrates such as a performance board are provided here, although not shown. A top panel 11 is fixed to the lowermost surface of the test head 1 as shown in FIGS.
Further, a contact ring 12 is fixed to the lower surface of the top panel 11.
【００２２】本実施形態のコンタクトリング１２は、図
１に示すようにリング状に形成されてなり、外周に形成
された断片的な扇形の通孔１２１に、上述したゼロ挿抜
力コネクタの他方２２ｂが固定されている。図２の断面
図にこのゼロ挿抜力コネクタ２２ｂの取り付け状態を示
す。The contact ring 12 of the present embodiment is formed in a ring shape as shown in FIG. 1, and is inserted into a fragmentary fan-shaped through hole 121 formed on the outer periphery of the contact ring 12b of the above-mentioned zero insertion / removal force connector. Has been fixed. The cross-sectional view of FIG. 2 shows the state of attachment of the zero insertion / extraction force connector 22b.
【００２３】また、上述したプローブカード２とコンタ
クトリング１２との位置出しは、プローブカード２側に
設けられたガイドピン２３を、コンタクトリング１２側
に設けられたガイドブッシュ１２２に係合させることに
より行われる。The positioning of the probe card 2 and the contact ring 12 is performed by engaging a guide pin 23 provided on the probe card 2 with a guide bush 122 provided on the contact ring 12. Done.
【００２４】ちなみに、図示は省略するが、コンタクト
リング１２側に取り付けられたゼロ挿抜力コネクタ２２
ｂと、テストヘッド１内のパフォーマンスボードとは多
数の配線あるいはドータボードにより電気的に接続され
る。Incidentally, although not shown, the zero insertion / removal force connector 22 attached to the contact ring 12 side is used.
b and the performance board in the test head 1 are electrically connected by a number of wires or daughter boards.
【００２５】次に作用を説明する。ウェハＩＣをテスト
する場合には、まずそのウェハをウェハチャック３に位
置決めしながら吸着保持した状態で、目的とする２個の
ＩＣの接点にプローブカード２のニードル２１１が接触
するように、ウェハチャック３をＸ−Ｙ平面において位
置出ししながら上昇させる。これにより、最初の２個の
ＩＣのテストが実行されるが、このテストを終了する
と、ウェハチャック３を僅かに下降させ、次の２個のＩ
Ｃの接点にプローブカード２のニードル２１１が接触す
るように、ウェハチャック３をＸ−Ｙ平面において位置
出ししながら再び上昇させる。順次この動作を繰り返
し、全ての領域におけるウェハＩＣのテストを行う。Next, the operation will be described. When a wafer IC is tested, first, the wafer is chucked so that the needle 211 of the probe card 2 contacts the contact point of the two target ICs while the wafer is held by suction while being positioned on the wafer chuck 3. 3 is raised while being positioned on the XY plane. As a result, the test of the first two ICs is executed. When the test is completed, the wafer chuck 3 is slightly lowered, and the next two ICs are tested.
The wafer chuck 3 is raised again while being positioned on the XY plane so that the needle 211 of the probe card 2 comes into contact with the contact point C. This operation is sequentially repeated to test wafer ICs in all regions.
【００２６】特に本実施形態のプローブカード２は、２
つのニードル群２１，２１が円形状基板の中心に配置さ
れ、ゼロ挿抜力コネクタの一方２２ａが、当該円形状基
板の外周縁に配列して設けられているので、これらを電
気的につなぐ配線パターンの距離が、何れのニードル２
１１についてもほぼ均一となっている。したがって、各
ニードル２１１からゼロ挿抜力コネクタ２２ａの各接点
に至る配線パターンのインピーダンスが均一になり、こ
れにより電気的特性のばらつきが著しく小さくなる。In particular, the probe card 2 of this embodiment
The two needle groups 21 and 21 are arranged at the center of the circular substrate, and one of the zero insertion / removal force connectors 22a is arranged on the outer peripheral edge of the circular substrate, so that a wiring pattern for electrically connecting them is provided. Distance of any needle 2
11 is also substantially uniform. Therefore, the impedance of the wiring pattern from each needle 211 to each contact point of the zero insertion / extraction force connector 22a becomes uniform, and thereby the variation in the electrical characteristics is significantly reduced.
【００２７】なお、以上説明した実施形態は、本発明の
理解を容易にするために記載されたものであって、本発
明を限定するために記載されたものではない。したがっ
て、上記の実施形態に開示された各要素は、本発明の技
術的範囲に属する全ての設計変更や均等物をも含む趣旨
である。The embodiments described above are described for facilitating the understanding of the present invention, and are not described for limiting the present invention. Therefore, each element disclosed in the above embodiment is intended to include all design changes and equivalents belonging to the technical scope of the present invention.
【００２８】[0028]
【発明の効果】以上述べたように本発明によれば、各針
状接点からゼロ挿抜力コネクタの各接点に至る配線のイ
ンピーダンスを均一にすることができ、これにより電気
的特性のばらつきを抑制することができる。As described above, according to the present invention, the impedance of the wiring from each needle-shaped contact to each contact of the zero insertion / extraction force connector can be made uniform, thereby suppressing variations in electrical characteristics. can do.
【図１】本発明のプローブカードが適用されるＩＣ試験
装置のテストヘッドを示す要部分解斜視図である。FIG. 1 is an exploded perspective view showing a main part of a test head of an IC test apparatus to which a probe card of the present invention is applied.
【図２】図１のプローブカードがテストヘッドに組み付
けられた状態を示す断面図である。FIG. 2 is a sectional view showing a state where the probe card of FIG. 1 is assembled to a test head.
【図３】図１のプローブカードを示す平面図である。FIG. 3 is a plan view showing the probe card of FIG. 1;
１…テストヘッド １１…トッププレート １２…コンタクトリング １２１…通孔 １２２…ガイドブッシュ １３…ガイドブッシュ ２…プローブカード ２１…ニードル群 ２１１…ニードル（針状接点） ２２ａ…ゼロ挿抜力コネクタ（プローブカード側） ２２ｂ…ゼロ挿抜力コネクタ（コンタクトリング側） ２３…ガイドピン ３…ウェハチャック ４…カードホルダ ４１…円形状通孔 ４２…段部 ４３…リングキャリア ４４…ガイドピン DESCRIPTION OF SYMBOLS 1 ... Test head 11 ... Top plate 12 ... Contact ring 121 ... Through hole 122 ... Guide bush 13 ... Guide bush 2 ... Probe card 21 ... Needle group 211 ... Needle (needle contact) 22a ... Zero insertion / extraction force connector (probe card side) 22b: Zero insertion / extraction force connector (contact ring side) 23: Guide pin 3: Wafer chuck 4: Card holder 41: Circular through hole 42: Step 43: Ring carrier 44: Guide pin
Claims (2)
に接続され、被試験物に電気的に接触する複数の針状接
点が一主面に設けられたＩＣ試験装置用プローブカード
において、 前記針状接点と電気的に接続された複数のゼロ挿抜力コ
ネクタの一方が、前記針状接点が設けられた位置から実
質的に放射状の位置に設けられていることを特徴とする
ＩＣ試験装置用プローブカード。1. A probe card for an IC test apparatus, wherein a plurality of needle-like contacts electrically connected to a test head substrate of the IC test apparatus and electrically contacting a device under test are provided on one main surface, One of a plurality of zero insertion / extraction force connectors electrically connected to the needle contacts is provided at a position substantially radial from the position where the needle contacts are provided, for an IC test apparatus. Probe card.
前記基板の略中心に設けられ、前記ゼロ挿抜力コネクタ
の一方が前記基板の外周縁上に設けられていることを特
徴とする請求項１記載のＩＣ試験装置用プローブカー
ド。2. The substrate according to claim 1, wherein the substrate is formed in a circular shape, the needle-like contacts are provided substantially at the center of the substrate, and one of the zero insertion / extraction force connectors is provided on an outer peripheral edge of the substrate. The probe card for an IC test device according to claim 1.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19131098A JP3586106B2 (en) | 1998-07-07 | 1998-07-07 | Probe card for IC test equipment |
| DE19931278A DE19931278B4 (en) | 1998-07-07 | 1999-07-07 | Test card and IC tester |
| US09/346,045 US6292005B1 (en) | 1998-07-07 | 1999-07-07 | Probe card for IC testing apparatus |
| KR10-1999-0027285A KR100482733B1 (en) | 1998-07-07 | 1999-07-07 | A probe card for ic testing apparatus |
| TW088111503A TW460703B (en) | 1998-07-07 | 1999-07-07 | Probe card applied for integrated circuit testing apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19131098A JP3586106B2 (en) | 1998-07-07 | 1998-07-07 | Probe card for IC test equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000028640A true JP2000028640A (en) | 2000-01-28 |
| JP3586106B2 JP3586106B2 (en) | 2004-11-10 |
Family
ID=16272441
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19131098A Expired - Lifetime JP3586106B2 (en) | 1998-07-07 | 1998-07-07 | Probe card for IC test equipment |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6292005B1 (en) |
| JP (1) | JP3586106B2 (en) |
| KR (1) | KR100482733B1 (en) |
| DE (1) | DE19931278B4 (en) |
| TW (1) | TW460703B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006114885A1 (en) * | 2005-04-18 | 2006-11-02 | Kabushiki Kaisha Nihon Micronics | Electrically connecting device |
| JP6285587B1 (en) * | 2017-02-28 | 2018-02-28 | 山佐株式会社 | Circuit board device for gaming machines |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7554347B2 (en) * | 2002-03-19 | 2009-06-30 | Georgia Tech Research Corporation | High input/output density optoelectronic probe card for wafer-level test of electrical and optical interconnect components, methods of fabrication, and methods of use |
| US7084650B2 (en) * | 2002-12-16 | 2006-08-01 | Formfactor, Inc. | Apparatus and method for limiting over travel in a probe card assembly |
| US6894523B2 (en) * | 2003-07-01 | 2005-05-17 | Intel Corporation | System and method for testing semiconductor devices |
| US7218127B2 (en) * | 2004-02-18 | 2007-05-15 | Formfactor, Inc. | Method and apparatus for probing an electronic device in which movement of probes and/or the electronic device includes a lateral component |
| US7504822B2 (en) * | 2005-10-28 | 2009-03-17 | Teradyne, Inc. | Automatic testing equipment instrument card and probe cabling system and apparatus |
| US7541819B2 (en) * | 2005-10-28 | 2009-06-02 | Teradyne, Inc. | Modularized device interface with grounding insert between two strips |
| KR100890548B1 (en) * | 2007-07-20 | 2009-03-27 | (주)퓨쳐하이테크 | Semiconductor component mounting apparatus |
| TWI385392B (en) * | 2008-12-12 | 2013-02-11 | High-frequency vertical probe device and its application of high-speed test card | |
| TWI611190B (en) * | 2016-01-27 | 2018-01-11 | Replaceable daughter board probe card and method of use thereof |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4382228A (en) * | 1974-07-15 | 1983-05-03 | Wentworth Laboratories Inc. | Probes for fixed point probe cards |
| JPS5943091B2 (en) * | 1981-06-03 | 1984-10-19 | 義栄 長谷川 | Fixed probe board |
| US4731577A (en) * | 1987-03-05 | 1988-03-15 | Logan John K | Coaxial probe card |
| JPS6453429A (en) * | 1987-08-24 | 1989-03-01 | Mitsubishi Electric Corp | Device for testing semiconductor chip |
| JPH01318244A (en) * | 1988-06-20 | 1989-12-22 | Nec Corp | Probe card |
| JPH0221268A (en) * | 1988-07-11 | 1990-01-24 | Tokyo Electron Ltd | Contact type prober for electric inspection |
| DE4101920A1 (en) * | 1991-01-23 | 1992-07-30 | Ehlermann Eckhard | TEST DEVICE FOR INTEGRATED CIRCUITS |
| FR2677772B1 (en) * | 1991-06-11 | 1993-10-08 | Sgs Thomson Microelectronics Sa | POINTED CARD FOR INTEGRATED CIRCUIT CHIP TESTER. |
| JP2576233Y2 (en) * | 1991-08-05 | 1998-07-09 | 株式会社アドバンテスト | Connection mechanism between test head and sample of IC test equipment |
| KR200198414Y1 (en) * | 1994-12-23 | 2000-12-01 | 김영환 | Probe card for testing semiconductor wafer |
| KR0150334B1 (en) * | 1995-08-17 | 1998-12-01 | 남재우 | Probe card having vertical needle |
| US5729150A (en) * | 1995-12-01 | 1998-03-17 | Cascade Microtech, Inc. | Low-current probe card with reduced triboelectric current generating cables |
| JPH09298223A (en) * | 1996-05-07 | 1997-11-18 | Advantest Corp | Ic test device and probe card used therefor |
-
1998
- 1998-07-07 JP JP19131098A patent/JP3586106B2/en not_active Expired - Lifetime
-
1999
- 1999-07-07 US US09/346,045 patent/US6292005B1/en not_active Expired - Lifetime
- 1999-07-07 TW TW088111503A patent/TW460703B/en not_active IP Right Cessation
- 1999-07-07 DE DE19931278A patent/DE19931278B4/en not_active Expired - Fee Related
- 1999-07-07 KR KR10-1999-0027285A patent/KR100482733B1/en not_active IP Right Cessation
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006114885A1 (en) * | 2005-04-18 | 2006-11-02 | Kabushiki Kaisha Nihon Micronics | Electrically connecting device |
| JPWO2006114885A1 (en) * | 2005-04-18 | 2008-12-11 | 株式会社日本マイクロニクス | Electrical connection device |
| US7764073B2 (en) | 2005-04-18 | 2010-07-27 | Kabushiki Kaisha Nihon Micronics | Electrical connecting apparatus |
| JP4746035B2 (en) * | 2005-04-18 | 2011-08-10 | 株式会社日本マイクロニクス | Electrical connection device |
| JP6285587B1 (en) * | 2017-02-28 | 2018-02-28 | 山佐株式会社 | Circuit board device for gaming machines |
| JP2018139976A (en) * | 2017-02-28 | 2018-09-13 | 山佐株式会社 | Circuit board device for game machine |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100482733B1 (en) | 2005-04-14 |
| DE19931278B4 (en) | 2010-08-19 |
| KR20000011554A (en) | 2000-02-25 |
| US6292005B1 (en) | 2001-09-18 |
| JP3586106B2 (en) | 2004-11-10 |
| DE19931278A1 (en) | 2000-01-13 |
| TW460703B (en) | 2001-10-21 |
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