JP2000012639A5 - - Google Patents

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Publication number
JP2000012639A5
JP2000012639A5 JP1998177313A JP17731398A JP2000012639A5 JP 2000012639 A5 JP2000012639 A5 JP 2000012639A5 JP 1998177313 A JP1998177313 A JP 1998177313A JP 17731398 A JP17731398 A JP 17731398A JP 2000012639 A5 JP2000012639 A5 JP 2000012639A5
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JP
Japan
Prior art keywords
tegs
inputs
monitor
semiconductor device
added
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP1998177313A
Other languages
English (en)
Japanese (ja)
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JP2000012639A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP10177313A priority Critical patent/JP2000012639A/ja
Priority claimed from JP10177313A external-priority patent/JP2000012639A/ja
Priority to US09/338,436 priority patent/US6239603B1/en
Publication of JP2000012639A publication Critical patent/JP2000012639A/ja
Publication of JP2000012639A5 publication Critical patent/JP2000012639A5/ja
Abandoned legal-status Critical Current

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JP10177313A 1998-06-24 1998-06-24 モニターｔｅｇのテスト回路 Abandoned JP2000012639A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP10177313A JP2000012639A (ja) 1998-06-24 1998-06-24 モニターｔｅｇのテスト回路
US09/338,436 US6239603B1 (en) 1998-06-24 1999-06-23 Monitor TEG test circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10177313A JP2000012639A (ja) 1998-06-24 1998-06-24 モニターｔｅｇのテスト回路

Publications (2)

Publication Number Publication Date
JP2000012639A JP2000012639A (ja) 2000-01-14
JP2000012639A5 true JP2000012639A5 (enExample) 2005-08-25

Family

ID=16028808

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10177313A Abandoned JP2000012639A (ja) 1998-06-24 1998-06-24 モニターｔｅｇのテスト回路

Country Status (2)

Country Link
US (1) US6239603B1 (enExample)
JP (1) JP2000012639A (enExample)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2308820A1 (en) * 2000-05-15 2001-11-15 The Governors Of The University Of Alberta Wireless radio frequency technique design and method for testing of integrated circuits and wafers
US6535013B2 (en) * 2000-12-28 2003-03-18 Intel Corporation Parameter variation probing technique
US20020129293A1 (en) * 2001-03-07 2002-09-12 Hutton John F. Scan based multiple ring oscillator structure for on-chip speed measurement
JP2002359289A (ja) 2001-03-29 2002-12-13 Mitsubishi Electric Corp プロセスモニタ回路を備えた半導体装置、その試験方法、並びにその製造方法
US6792374B2 (en) * 2001-10-30 2004-09-14 Micron Technology, Inc. Apparatus and method for determining effect of on-chip noise on signal propagation
KR100466984B1 (ko) * 2002-05-15 2005-01-24 삼성전자주식회사 테스트 소자 그룹 회로를 포함하는 집적 회로 칩 및 그것의 테스트 방법
GB2393795B (en) * 2002-10-01 2005-09-14 Motorola Inc Test structure, integrated circuit, system and method for testing a failure analysis instrument
US7260377B2 (en) * 2002-12-02 2007-08-21 Broadcom Corporation Variable-gain low noise amplifier for digital terrestrial applications
US7471941B2 (en) * 2002-12-02 2008-12-30 Broadcom Corporation Amplifier assembly including variable gain amplifier, parallel programmable amplifiers, and AGC
US8437720B2 (en) * 2002-12-02 2013-05-07 Broadcom Corporation Variable-gain low noise amplifier for digital terrestrial applications
US6798286B2 (en) * 2002-12-02 2004-09-28 Broadcom Corporation Gain control methods and systems in an amplifier assembly
US7309998B2 (en) 2002-12-02 2007-12-18 Burns Lawrence M Process monitor for monitoring an integrated circuit chip
US6933739B1 (en) * 2003-05-23 2005-08-23 Marvell Semiconductor Israel Ltd. Ring oscillator system
US7256055B2 (en) * 2003-08-25 2007-08-14 Tau-Metrix, Inc. System and apparatus for using test structures inside of a chip during the fabrication of the chip
US7102363B2 (en) * 2003-11-21 2006-09-05 Neocera, Inc. Method and system for non-contact measurement of microwave capacitance of miniature structures of integrated circuits
US7239163B1 (en) * 2004-06-23 2007-07-03 Ridgetop Group, Inc. Die-level process monitor and method
US20060267621A1 (en) * 2005-05-27 2006-11-30 Harris Edward B On-chip apparatus and method for determining integrated circuit stress conditions
KR100674988B1 (ko) * 2005-08-11 2007-01-29 삼성전자주식회사 패키지 번인 테스트가 가능한 반도체 집적 회로 및 번인테스트 방법
DE102005052269A1 (de) * 2005-10-27 2007-05-10 Atmel Germany Gmbh Integrierte Schaltung mit integrierter Testhilfe-Teilschaltung
US20070263472A1 (en) * 2006-05-11 2007-11-15 Anderson Brent A Process environment variation evaluation
KR100772547B1 (ko) * 2006-08-31 2007-11-02 주식회사 하이닉스반도체 반도체 장치 및 그의 테스트 방법
JP2008277417A (ja) * 2007-04-26 2008-11-13 Elpida Memory Inc 半導体装置及びその試験方法
US7495519B2 (en) * 2007-04-30 2009-02-24 International Business Machines Corporation System and method for monitoring reliability of a digital system
US8310265B2 (en) * 2007-05-02 2012-11-13 Nxp B.V. IC testing methods and apparatus
US7733109B2 (en) * 2007-10-15 2010-06-08 International Business Machines Corporation Test structure for resistive open detection using voltage contrast inspection and related methods
US20090112635A1 (en) * 2007-10-30 2009-04-30 Kenneth Rubinstein Foreign Non-Qualified Deferred Compensation Hybrid Trust Strategy
US20090250698A1 (en) * 2008-04-08 2009-10-08 Nagaraj Savithri Fabrication management system
US8499230B2 (en) * 2008-05-07 2013-07-30 Lsi Corporation Critical path monitor for an integrated circuit and method of operation thereof
DE102008059502A1 (de) * 2008-11-28 2010-06-10 Advanced Micro Devices, Inc., Sunnyvale Kompensation der Leistungsbeeinträchtigung von Halbleiterbauelementen durch Anpassung des Tastgrades des Taktsignals
US8008912B1 (en) 2008-12-16 2011-08-30 Western Digital (Fremont), Llc Method and system for testing P2 stiffness of a magnetoresistance transducer at the wafer level
JP5439964B2 (ja) * 2009-06-12 2014-03-12 富士通セミコンダクター株式会社 遅延比較回路、遅延比較方法、遅延回路および半導体集積回路
KR101094903B1 (ko) * 2009-07-30 2011-12-15 주식회사 하이닉스반도체 반도체 집적 회로의 테스트 장치
US8754412B2 (en) 2012-01-03 2014-06-17 International Business Machines Corporation Intra die variation monitor using through-silicon via
JP2017027413A (ja) * 2015-07-23 2017-02-02 富士通株式会社 プログラマブルロジックデバイス設計装置及びその方法
WO2024142904A1 (ja) * 2022-12-26 2024-07-04 東京エレクトロン株式会社 検査システム

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3961251A (en) * 1974-12-20 1976-06-01 International Business Machines Corporation Testing embedded arrays
DE2905294A1 (de) * 1979-02-12 1980-08-21 Philips Patentverwaltung Integrierte schaltungsanordnung in mos-technik mit feldeffekttransistoren
US4243937A (en) * 1979-04-06 1981-01-06 General Instrument Corporation Microelectronic device and method for testing same
US4719411A (en) * 1985-05-13 1988-01-12 California Institute Of Technology Addressable test matrix for measuring analog transfer characteristics of test elements used for integrated process control and device evaluation
JPS61265829A (ja) * 1985-05-20 1986-11-25 Fujitsu Ltd 半導体集積回路
US4782283A (en) * 1986-08-22 1988-11-01 Aida Corporation Apparatus for scan testing CMOS integrated systems
US4970454A (en) * 1986-12-09 1990-11-13 Texas Instruments Incorporated Packaged semiconductor device with test circuits for determining fabrication parameters
JPH03228353A (ja) 1990-02-02 1991-10-09 Mitsubishi Electric Corp ゲートアレイ
JPH08148537A (ja) * 1994-11-18 1996-06-07 Toshiba Corp 半導体集積回路
US6005406A (en) * 1995-12-07 1999-12-21 International Business Machines Corporation Test device and method facilitating aggressive circuit design

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