ITUA20164741A1 - Circuito di lettura di uno stadio circuitale a lunga costante di tempo e relativo metodo di lettura - Google Patents

Circuito di lettura di uno stadio circuitale a lunga costante di tempo e relativo metodo di lettura

Info

Publication number
ITUA20164741A1
ITUA20164741A1 ITUA2016A004741A ITUA20164741A ITUA20164741A1 IT UA20164741 A1 ITUA20164741 A1 IT UA20164741A1 IT UA2016A004741 A ITUA2016A004741 A IT UA2016A004741A IT UA20164741 A ITUA20164741 A IT UA20164741A IT UA20164741 A1 ITUA20164741 A1 IT UA20164741A1
Authority
IT
Italy
Prior art keywords
circuit
reading
constant time
long constant
stage
Prior art date
Application number
ITUA2016A004741A
Other languages
English (en)
Inventor
Antonino Conte
Enrico Castaldo
Raul Andres Bianchi
Rosa Francesco La
Original Assignee
St Microelectronics Srl
St Microelectronics Crolles 2 Sas
St Microelectronics Rousset
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl, St Microelectronics Crolles 2 Sas, St Microelectronics Rousset filed Critical St Microelectronics Srl
Priority to ITUA2016A004741A priority Critical patent/ITUA20164741A1/it
Priority to CN201611201116.7A priority patent/CN107545925B/zh
Priority to CN201621418704.1U priority patent/CN206638965U/zh
Priority to US15/389,751 priority patent/US10127966B2/en
Priority to EP16206892.8A priority patent/EP3264202B1/en
Publication of ITUA20164741A1 publication Critical patent/ITUA20164741A1/it
Priority to US16/151,388 priority patent/US10217503B2/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/24—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using capacitors
    • G—PHYSICS
    • G04—HOROLOGY
    • G04F—TIME-INTERVAL MEASURING
    • G04F10/00—Apparatus for measuring unknown time intervals by electric means
    • G04F10/10—Apparatus for measuring unknown time intervals by electric means by measuring electric or magnetic quantities changing in proportion to time

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
ITUA2016A004741A 2016-06-29 2016-06-29 Circuito di lettura di uno stadio circuitale a lunga costante di tempo e relativo metodo di lettura ITUA20164741A1 (it)

Priority Applications (6)

Application Number Priority Date Filing Date Title
ITUA2016A004741A ITUA20164741A1 (it) 2016-06-29 2016-06-29 Circuito di lettura di uno stadio circuitale a lunga costante di tempo e relativo metodo di lettura
CN201611201116.7A CN107545925B (zh) 2016-06-29 2016-12-22 用于长时间常数电路级的读取电路和相应的读取方法
CN201621418704.1U CN206638965U (zh) 2016-06-29 2016-12-22 读取电路和电子设备
US15/389,751 US10127966B2 (en) 2016-06-29 2016-12-23 Reading circuit with a shifting stage and corresponding reading method
EP16206892.8A EP3264202B1 (en) 2016-06-29 2016-12-23 Reading circuit for a long-time-constant circuit stage and corresponding reading method
US16/151,388 US10217503B2 (en) 2016-06-29 2018-10-04 Reading circuit of a long time constant circuit stage and corresponding reading method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITUA2016A004741A ITUA20164741A1 (it) 2016-06-29 2016-06-29 Circuito di lettura di uno stadio circuitale a lunga costante di tempo e relativo metodo di lettura

Publications (1)

Publication Number Publication Date
ITUA20164741A1 true ITUA20164741A1 (it) 2017-12-29

Family

ID=57184733

Family Applications (1)

Application Number Title Priority Date Filing Date
ITUA2016A004741A ITUA20164741A1 (it) 2016-06-29 2016-06-29 Circuito di lettura di uno stadio circuitale a lunga costante di tempo e relativo metodo di lettura

Country Status (4)

Country Link
US (2) US10127966B2 (it)
EP (1) EP3264202B1 (it)
CN (2) CN107545925B (it)
IT (1) ITUA20164741A1 (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITUA20164741A1 (it) * 2016-06-29 2017-12-29 St Microelectronics Srl Circuito di lettura di uno stadio circuitale a lunga costante di tempo e relativo metodo di lettura
US20240120822A1 (en) * 2021-02-19 2024-04-11 Neuro Device Group S .A. Circuit for a medical device or for another device, medical device and method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100020648A1 (en) * 2006-07-27 2010-01-28 Stmicroelectronics S.A. Charge retention circuit for a time measurement
US20110007567A1 (en) * 2007-01-05 2011-01-13 Jean-Louis Modave Temporary locking of an electronic circuit

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4393481A (en) * 1979-08-31 1983-07-12 Xicor, Inc. Nonvolatile static random access memory system
US5798961A (en) * 1994-08-23 1998-08-25 Emc Corporation Non-volatile memory module
US5875126A (en) * 1995-09-29 1999-02-23 California Institute Of Technology Autozeroing floating gate amplifier
JP3519547B2 (ja) * 1996-06-24 2004-04-19 株式会社東芝 中間電圧発生回路及びこれを有する不揮発性半導体メモリ
JP2002208290A (ja) * 2001-01-09 2002-07-26 Mitsubishi Electric Corp チャージポンプ回路およびこれを用いた不揮発性メモリの動作方法
EP1225595B1 (en) * 2001-01-15 2007-08-08 STMicroelectronics S.r.l. Method and circuit for dynamic reading of a memory cell, in particular a multi-level nonvolatile memory cell
US6639833B2 (en) * 2001-02-14 2003-10-28 Stmicroelectronics S.R.L. Method and circuit for dynamic reading of a memory cell at low supply voltage and with low output dynamics
JP3874247B2 (ja) * 2001-12-25 2007-01-31 株式会社ルネサステクノロジ 半導体集積回路装置
US6914812B2 (en) * 2003-01-28 2005-07-05 Intersil America Inc. Tunnel device level shift circuit
US6894928B2 (en) * 2003-01-28 2005-05-17 Intersil Americas Inc. Output voltage compensating circuit and method for a floating gate reference voltage generator
US6829164B2 (en) * 2003-02-14 2004-12-07 Xicor Corporation Differential floating gate circuit and method for programming
EP2047475B1 (fr) * 2006-07-27 2010-06-16 Stmicroelectronics SA Circuit de lecture d'un element de retention de charges pour mesure temporelle
WO2008060984A2 (en) * 2006-11-14 2008-05-22 Rambus Inc. Low energy memory component
FR2926400A1 (fr) * 2008-01-11 2009-07-17 St Microelectronics Rousset Cellule eeprom a perte de charges
JP2011222105A (ja) * 2010-04-14 2011-11-04 Elpida Memory Inc 半導体装置
JP2012027983A (ja) * 2010-07-23 2012-02-09 Elpida Memory Inc 半導体装置
CN102667947B (zh) * 2010-09-28 2014-07-23 松下电器产业株式会社 电阻变化型非易失性存储元件的形成方法
FR2981190B1 (fr) 2011-10-06 2014-03-21 St Microelectronics Rousset Circuit d'ecoulement de charges electriques pour une mesure temporelle
ITUA20164741A1 (it) * 2016-06-29 2017-12-29 St Microelectronics Srl Circuito di lettura di uno stadio circuitale a lunga costante di tempo e relativo metodo di lettura

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100020648A1 (en) * 2006-07-27 2010-01-28 Stmicroelectronics S.A. Charge retention circuit for a time measurement
US20110007567A1 (en) * 2007-01-05 2011-01-13 Jean-Louis Modave Temporary locking of an electronic circuit

Also Published As

Publication number Publication date
US20190035450A1 (en) 2019-01-31
US10127966B2 (en) 2018-11-13
CN107545925B (zh) 2021-01-01
EP3264202B1 (en) 2021-10-06
CN206638965U (zh) 2017-11-14
US10217503B2 (en) 2019-02-26
EP3264202A1 (en) 2018-01-03
CN107545925A (zh) 2018-01-05
US20180005684A1 (en) 2018-01-04

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