ITUA20164739A1 - Circuito di test di uno stadio circuitale a lunga costante di tempo e relativo metodo di test - Google Patents
Circuito di test di uno stadio circuitale a lunga costante di tempo e relativo metodo di testInfo
- Publication number
- ITUA20164739A1 ITUA20164739A1 ITUA2016A004739A ITUA20164739A ITUA20164739A1 IT UA20164739 A1 ITUA20164739 A1 IT UA20164739A1 IT UA2016A004739 A ITUA2016A004739 A IT UA2016A004739A IT UA20164739 A ITUA20164739 A IT UA20164739A IT UA20164739 A1 ITUA20164739 A1 IT UA20164739A1
- Authority
- IT
- Italy
- Prior art keywords
- test
- circuit
- time
- long constant
- test method
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/64—Testing of capacitors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2882—Testing timing characteristics
-
- G—PHYSICS
- G04—HOROLOGY
- G04F—TIME-INTERVAL MEASURING
- G04F10/00—Apparatus for measuring unknown time intervals by electric means
- G04F10/10—Apparatus for measuring unknown time intervals by electric means by measuring electric or magnetic quantities changing in proportion to time
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ITUA2016A004739A ITUA20164739A1 (it) | 2016-06-29 | 2016-06-29 | Circuito di test di uno stadio circuitale a lunga costante di tempo e relativo metodo di test |
US15/387,370 US10281512B2 (en) | 2016-06-29 | 2016-12-21 | Testing circuit of a longtime-constant circuit stage and corresponding testing method |
EP16206890.2A EP3264201B1 (en) | 2016-06-29 | 2016-12-23 | Testing circuit of a long-time-constant circuit stage and corresponding testing method |
CN201621447145.7U CN207396987U (zh) | 2016-06-29 | 2016-12-27 | 测试电路 |
CN201611228455.4A CN107544237B (zh) | 2016-06-29 | 2016-12-27 | 长时间常数电路级的测试电路和对应的测试方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ITUA2016A004739A ITUA20164739A1 (it) | 2016-06-29 | 2016-06-29 | Circuito di test di uno stadio circuitale a lunga costante di tempo e relativo metodo di test |
Publications (1)
Publication Number | Publication Date |
---|---|
ITUA20164739A1 true ITUA20164739A1 (it) | 2017-12-29 |
Family
ID=57184732
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ITUA2016A004739A ITUA20164739A1 (it) | 2016-06-29 | 2016-06-29 | Circuito di test di uno stadio circuitale a lunga costante di tempo e relativo metodo di test |
Country Status (4)
Country | Link |
---|---|
US (1) | US10281512B2 (it) |
EP (1) | EP3264201B1 (it) |
CN (2) | CN207396987U (it) |
IT (1) | ITUA20164739A1 (it) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109239582B (zh) * | 2018-10-19 | 2023-12-15 | 上海芯哲微电子科技股份有限公司 | 一种充电管理集成电路的测试装置 |
FR3111439B1 (fr) * | 2020-06-12 | 2023-06-30 | St Microelectronics Rousset | Procédé de gestion des requêtes d’accès à une mémoire vive et système correspondant |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100020648A1 (en) * | 2006-07-27 | 2010-01-28 | Stmicroelectronics S.A. | Charge retention circuit for a time measurement |
US20110007567A1 (en) * | 2007-01-05 | 2011-01-13 | Jean-Louis Modave | Temporary locking of an electronic circuit |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3216955B2 (ja) * | 1994-05-31 | 2001-10-09 | 株式会社日立製作所 | 容量式センサ装置 |
JP3548887B2 (ja) * | 1999-12-20 | 2004-07-28 | 株式会社村田製作所 | 絶縁抵抗測定方法および装置 |
US7138843B2 (en) * | 2004-10-18 | 2006-11-21 | Micrel, Incorporated | Timer circuit with adaptive reference |
FR2904464A1 (fr) * | 2006-07-27 | 2008-02-01 | St Microelectronics Sa | Circuit eeprom de retention de charges pour mesure temporelle |
JP5371752B2 (ja) * | 2006-07-27 | 2013-12-18 | エス テ マイクロエレクトロニクス エス アー | 時間測定のための電荷保持要素を読み取る回路 |
FR2981190B1 (fr) * | 2011-10-06 | 2014-03-21 | St Microelectronics Rousset | Circuit d'ecoulement de charges electriques pour une mesure temporelle |
US9462395B2 (en) * | 2014-07-22 | 2016-10-04 | Stmicroelectronics S.R.L. | Biasing circuit for a MEMS acoustic transducer with reduced start-up time |
-
2016
- 2016-06-29 IT ITUA2016A004739A patent/ITUA20164739A1/it unknown
- 2016-12-21 US US15/387,370 patent/US10281512B2/en active Active
- 2016-12-23 EP EP16206890.2A patent/EP3264201B1/en active Active
- 2016-12-27 CN CN201621447145.7U patent/CN207396987U/zh active Active
- 2016-12-27 CN CN201611228455.4A patent/CN107544237B/zh active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100020648A1 (en) * | 2006-07-27 | 2010-01-28 | Stmicroelectronics S.A. | Charge retention circuit for a time measurement |
US20110007567A1 (en) * | 2007-01-05 | 2011-01-13 | Jean-Louis Modave | Temporary locking of an electronic circuit |
Also Published As
Publication number | Publication date |
---|---|
CN107544237A (zh) | 2018-01-05 |
US20180003761A1 (en) | 2018-01-04 |
CN107544237B (zh) | 2020-04-03 |
CN207396987U (zh) | 2018-05-22 |
EP3264201A1 (en) | 2018-01-03 |
EP3264201B1 (en) | 2019-02-27 |
US10281512B2 (en) | 2019-05-07 |
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ITUA20164739A1 (it) | Circuito di test di uno stadio circuitale a lunga costante di tempo e relativo metodo di test |