IT1222158B - Procedimento per la fabbricazione di dispositivi cmos con riduzione del numero di fasi di mascheratura - Google Patents

Procedimento per la fabbricazione di dispositivi cmos con riduzione del numero di fasi di mascheratura

Info

Publication number
IT1222158B
IT1222158B IT21479/87A IT2147987A IT1222158B IT 1222158 B IT1222158 B IT 1222158B IT 21479/87 A IT21479/87 A IT 21479/87A IT 2147987 A IT2147987 A IT 2147987A IT 1222158 B IT1222158 B IT 1222158B
Authority
IT
Italy
Prior art keywords
procedure
manufacture
reduction
cmos devices
masking
Prior art date
Application number
IT21479/87A
Other languages
English (en)
Other versions
IT8721479A0 (it
Inventor
Paolo Picco
Original Assignee
Sgs Microelettronica Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Microelettronica Spa filed Critical Sgs Microelettronica Spa
Priority to IT21479/87A priority Critical patent/IT1222158B/it
Publication of IT8721479A0 publication Critical patent/IT8721479A0/it
Priority to US07/220,652 priority patent/US4902634A/en
Priority to EP88111559A priority patent/EP0301364A3/en
Priority to JP63187955A priority patent/JPS6442853A/ja
Application granted granted Critical
Publication of IT1222158B publication Critical patent/IT1222158B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/082—Ion implantation FETs/COMs
IT21479/87A 1987-07-28 1987-07-28 Procedimento per la fabbricazione di dispositivi cmos con riduzione del numero di fasi di mascheratura IT1222158B (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT21479/87A IT1222158B (it) 1987-07-28 1987-07-28 Procedimento per la fabbricazione di dispositivi cmos con riduzione del numero di fasi di mascheratura
US07/220,652 US4902634A (en) 1987-07-28 1988-07-18 Process for manufacturing CMOS devices
EP88111559A EP0301364A3 (en) 1987-07-28 1988-07-19 Process for manufacturing cmos devices
JP63187955A JPS6442853A (en) 1987-07-28 1988-07-27 Manufacturing process of cmos device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT21479/87A IT1222158B (it) 1987-07-28 1987-07-28 Procedimento per la fabbricazione di dispositivi cmos con riduzione del numero di fasi di mascheratura

Publications (2)

Publication Number Publication Date
IT8721479A0 IT8721479A0 (it) 1987-07-28
IT1222158B true IT1222158B (it) 1990-09-05

Family

ID=11182440

Family Applications (1)

Application Number Title Priority Date Filing Date
IT21479/87A IT1222158B (it) 1987-07-28 1987-07-28 Procedimento per la fabbricazione di dispositivi cmos con riduzione del numero di fasi di mascheratura

Country Status (4)

Country Link
US (1) US4902634A (it)
EP (1) EP0301364A3 (it)
JP (1) JPS6442853A (it)
IT (1) IT1222158B (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5030582A (en) * 1988-10-14 1991-07-09 Matsushita Electric Industrial Co., Ltd. Method of fabricating a CMOS semiconductor device
US5273914A (en) * 1988-10-14 1993-12-28 Matsushita Electric Industrial Co., Ltd. Method of fabricating a CMOS semiconductor devices
JP2926980B2 (ja) * 1990-11-30 1999-07-28 アイシン精機株式会社 車両用シート
JPH05267604A (ja) * 1991-05-08 1993-10-15 Seiko Instr Inc 半導体装置の製造方法
JPH0732919A (ja) * 1993-07-20 1995-02-03 Mitsuba Electric Mfg Co Ltd 車両用パワーシートの駆動装置
DE19839641A1 (de) * 1998-08-31 2000-03-09 Siemens Ag Verfahren zur Herstellung von Transistoren
KR100278996B1 (ko) * 1998-12-18 2001-02-01 김영환 반도체장치의 콘택 형성방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5323577A (en) * 1976-08-18 1978-03-04 Hitachi Ltd Complementary type insulated gate effect transistor
JPS58218161A (ja) * 1982-06-14 1983-12-19 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS58220461A (ja) * 1982-06-16 1983-12-22 Matsushita Electronics Corp 半導体装置の製造方法
JPS61287161A (ja) * 1985-06-14 1986-12-17 Matsushita Electronics Corp 相補型ｍｏｓ半導体装置の製造方法

Also Published As

Publication number Publication date
EP0301364A2 (en) 1989-02-01
JPS6442853A (en) 1989-02-15
IT8721479A0 (it) 1987-07-28
US4902634A (en) 1990-02-20
EP0301364A3 (en) 1990-06-13

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970730