IT1158723B - Processo di fabbricazione di dispositivi semiconduttori - Google Patents
Processo di fabbricazione di dispositivi semiconduttoriInfo
- Publication number
- IT1158723B IT1158723B IT23833/78A IT2383378A IT1158723B IT 1158723 B IT1158723 B IT 1158723B IT 23833/78 A IT23833/78 A IT 23833/78A IT 2383378 A IT2383378 A IT 2383378A IT 1158723 B IT1158723 B IT 1158723B
- Authority
- IT
- Italy
- Prior art keywords
- manufacturing process
- semiconductor devices
- devices manufacturing
- semiconductor
- manufacturing
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6302—Non-deposition formation processes
- H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
- H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
- H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
- H10P14/6309—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/61—Formation of materials, e.g. in the shape of layers or pillars of insulating materials using masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
- H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P36/00—Gettering within semiconductor bodies
- H10P36/03—Gettering within semiconductor bodies within silicon bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
- H10W10/0125—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/914—Doping
- Y10S438/924—To facilitate selective etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/966—Selective oxidation of ion-amorphousized layer
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/803,182 US4098618A (en) | 1977-06-03 | 1977-06-03 | Method of manufacturing semiconductor devices in which oxide regions are formed by an oxidation mask disposed directly on a substrate damaged by ion implantation |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IT7823833A0 IT7823833A0 (it) | 1978-05-26 |
| IT1158723B true IT1158723B (it) | 1987-02-25 |
Family
ID=25185809
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT23833/78A IT1158723B (it) | 1977-06-03 | 1978-05-26 | Processo di fabbricazione di dispositivi semiconduttori |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4098618A (it) |
| EP (1) | EP0000316B1 (it) |
| JP (1) | JPS542671A (it) |
| CA (1) | CA1088217A (it) |
| DE (1) | DE2860635D1 (it) |
| IT (1) | IT1158723B (it) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4178191A (en) * | 1978-08-10 | 1979-12-11 | Rca Corp. | Process of making a planar MOS silicon-on-insulating substrate device |
| US4249962A (en) * | 1979-09-11 | 1981-02-10 | Western Electric Company, Inc. | Method of removing contaminating impurities from device areas in a semiconductor wafer |
| JPS5650532A (en) * | 1979-10-01 | 1981-05-07 | Hitachi Ltd | Manufacture of semiconductor device |
| JPS5734365A (en) * | 1980-08-08 | 1982-02-24 | Ibm | Symmetrical bipolar transistor |
| DE3031170A1 (de) * | 1980-08-18 | 1982-03-25 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von integrierten mos-schaltungen nach dem sogenannten locos-verfahren |
| JPS57164547A (en) * | 1981-04-02 | 1982-10-09 | Toshiba Corp | Manufacture of semiconductor device |
| US4372033A (en) * | 1981-09-08 | 1983-02-08 | Ncr Corporation | Method of making coplanar MOS IC structures |
| JPS58114442A (ja) * | 1981-12-26 | 1983-07-07 | Fujitsu Ltd | 半導体装置の製造方法 |
| US4748134A (en) * | 1987-05-26 | 1988-05-31 | Motorola, Inc. | Isolation process for semiconductor devices |
| US4728619A (en) * | 1987-06-19 | 1988-03-01 | Motorola, Inc. | Field implant process for CMOS using germanium |
| US5310457A (en) * | 1992-09-30 | 1994-05-10 | At&T Bell Laboratories | Method of integrated circuit fabrication including selective etching of silicon and silicon compounds |
| US5330920A (en) * | 1993-06-15 | 1994-07-19 | Digital Equipment Corporation | Method of controlling gate oxide thickness in the fabrication of semiconductor devices |
| US5580815A (en) * | 1993-08-12 | 1996-12-03 | Motorola Inc. | Process for forming field isolation and a structure over a semiconductor substrate |
| US5869385A (en) * | 1995-12-08 | 1999-02-09 | Advanced Micro Devices, Inc. | Selectively oxidized field oxide region |
| US5937310A (en) * | 1996-04-29 | 1999-08-10 | Advanced Micro Devices, Inc. | Reduced bird's beak field oxidation process using nitrogen implanted into active region |
| US5882993A (en) | 1996-08-19 | 1999-03-16 | Advanced Micro Devices, Inc. | Integrated circuit with differing gate oxide thickness and process for making same |
| US6033943A (en) * | 1996-08-23 | 2000-03-07 | Advanced Micro Devices, Inc. | Dual gate oxide thickness integrated circuit and process for making same |
| KR100211547B1 (ko) * | 1996-10-29 | 1999-08-02 | 김영환 | 반도체 소자의 필드 산화막 형성방법 |
| US5872376A (en) * | 1997-03-06 | 1999-02-16 | Advanced Micro Devices, Inc. | Oxide formation technique using thin film silicon deposition |
| US6025240A (en) * | 1997-12-18 | 2000-02-15 | Advanced Micro Devices, Inc. | Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices |
| TW358236B (en) * | 1997-12-19 | 1999-05-11 | Nanya Technology Corp | Improved local silicon oxidization method in the manufacture of semiconductor isolation |
| US6015736A (en) * | 1997-12-19 | 2000-01-18 | Advanced Micro Devices, Inc. | Method and system for gate stack reoxidation control |
| US6258693B1 (en) | 1997-12-23 | 2001-07-10 | Integrated Device Technology, Inc. | Ion implantation for scalability of isolation in an integrated circuit |
| US5962914A (en) * | 1998-01-14 | 1999-10-05 | Advanced Micro Devices, Inc. | Reduced bird's beak field oxidation process using nitrogen implanted into active region |
| US5998277A (en) * | 1998-03-13 | 1999-12-07 | Texas Instruments - Acer Incorporated | Method to form global planarized shallow trench isolation |
| US6531364B1 (en) | 1998-08-05 | 2003-03-11 | Advanced Micro Devices, Inc. | Advanced fabrication technique to form ultra thin gate dielectric using a sacrificial polysilicon seed layer |
| JP3732472B2 (ja) * | 2002-10-07 | 2006-01-05 | 沖電気工業株式会社 | Mosトランジスタの製造方法 |
| CN105392837B (zh) * | 2013-09-18 | 2017-06-13 | 日本瑞翁株式会社 | 粉体成形用氯乙烯树脂组合物、氯乙烯树脂成形体和层合体 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5012995B1 (it) * | 1970-02-09 | 1975-05-16 | ||
| NL7204741A (it) * | 1972-04-08 | 1973-10-10 | ||
| US3966501A (en) * | 1973-03-23 | 1976-06-29 | Mitsubishi Denki Kabushiki Kaisha | Process of producing semiconductor devices |
| US3900345A (en) * | 1973-08-02 | 1975-08-19 | Motorola Inc | Thin low temperature epi regions by conversion of an amorphous layer |
| US3961999A (en) * | 1975-06-30 | 1976-06-08 | Ibm Corporation | Method for forming recessed dielectric isolation with a minimized "bird's beak" problem |
-
1977
- 1977-06-03 US US05/803,182 patent/US4098618A/en not_active Expired - Lifetime
-
1978
- 1978-04-07 CA CA300,719A patent/CA1088217A/en not_active Expired
- 1978-05-25 JP JP6181278A patent/JPS542671A/ja active Granted
- 1978-05-26 IT IT23833/78A patent/IT1158723B/it active
- 1978-06-01 DE DE7878430001T patent/DE2860635D1/de not_active Expired
- 1978-06-01 EP EP78430001A patent/EP0000316B1/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| US4098618A (en) | 1978-07-04 |
| DE2860635D1 (en) | 1981-08-06 |
| JPS6141139B2 (it) | 1986-09-12 |
| CA1088217A (en) | 1980-10-21 |
| IT7823833A0 (it) | 1978-05-26 |
| JPS542671A (en) | 1979-01-10 |
| EP0000316B1 (fr) | 1981-04-29 |
| EP0000316A1 (fr) | 1979-01-10 |
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