IT1097846B - Circuito integrato di alte prestazioni e procedimento per la fabbricazione di esso - Google Patents

Circuito integrato di alte prestazioni e procedimento per la fabbricazione di esso

Info

Publication number
IT1097846B
IT1097846B IT25818/78A IT2581878A IT1097846B IT 1097846 B IT1097846 B IT 1097846B IT 25818/78 A IT25818/78 A IT 25818/78A IT 2581878 A IT2581878 A IT 2581878A IT 1097846 B IT1097846 B IT 1097846B
Authority
IT
Italy
Prior art keywords
procedure
manufacture
integrated circuit
high performance
performance integrated
Prior art date
Application number
IT25818/78A
Other languages
English (en)
Italian (it)
Other versions
IT7825818A0 (it
Original Assignee
Mostek Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mostek Corp filed Critical Mostek Corp
Publication of IT7825818A0 publication Critical patent/IT7825818A0/it
Application granted granted Critical
Publication of IT1097846B publication Critical patent/IT1097846B/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/84Combinations of enhancement-mode IGFETs and depletion-mode IGFETs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • H03K19/09443Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors
    • H03K19/09445Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors with active depletion transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Memories (AREA)
IT25818/78A 1977-07-18 1978-07-17 Circuito integrato di alte prestazioni e procedimento per la fabbricazione di esso IT1097846B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/816,363 US4135102A (en) 1977-07-18 1977-07-18 High performance inverter circuits

Publications (2)

Publication Number Publication Date
IT7825818A0 IT7825818A0 (it) 1978-07-17
IT1097846B true IT1097846B (it) 1985-08-31

Family

ID=25220399

Family Applications (1)

Application Number Title Priority Date Filing Date
IT25818/78A IT1097846B (it) 1977-07-18 1978-07-17 Circuito integrato di alte prestazioni e procedimento per la fabbricazione di esso

Country Status (6)

Country Link
US (1) US4135102A (enrdf_load_stackoverflow)
JP (4) JPS5496383A (enrdf_load_stackoverflow)
DE (1) DE2831522A1 (enrdf_load_stackoverflow)
FR (1) FR2398388A1 (enrdf_load_stackoverflow)
GB (1) GB2001197B (enrdf_load_stackoverflow)
IT (1) IT1097846B (enrdf_load_stackoverflow)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5443551A (en) * 1977-09-14 1979-04-06 Hitachi Ltd Monolithic semiconductor integrated circuit
DE3062480D1 (en) * 1979-01-11 1983-05-05 Western Electric Co Tri-state logic buffer circuit
US4417162A (en) * 1979-01-11 1983-11-22 Bell Telephone Laboratories, Incorporated Tri-state logic buffer circuit
DE3016050C2 (de) * 1980-04-25 1985-08-29 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Herstellung von Fotolackstrukturen für integrierte Halbleiterschaltungsanordnungen
JPS639885B2 (enrdf_load_stackoverflow) * 1980-12-05 1988-03-02 Gni Pi Splavov Tsvet Metall
US4491748A (en) * 1981-04-16 1985-01-01 International Business Machines Corporation High performance FET driver circuit
US4409501A (en) * 1981-07-20 1983-10-11 Motorola Inc. Power-on reset circuit
IT1201859B (it) * 1986-12-10 1989-02-02 Sgs Microelettronica Spa Circuito logico cmos
JP2819302B2 (ja) * 1989-04-26 1998-10-30 富士通株式会社 半導体装置の製造方法
JPH02153574A (ja) * 1989-05-24 1990-06-13 Hitachi Ltd 半導体集積回路装置の製造法
JPH04211517A (ja) * 1990-03-19 1992-08-03 Toshiba Corp 電界効果トランジスタ回路
JP3361874B2 (ja) * 1994-02-28 2003-01-07 三菱電機株式会社 電界効果型半導体装置
JP2000124325A (ja) * 1998-10-16 2000-04-28 Nec Corp 半導体装置およびその製造方法
JP2007281027A (ja) * 2006-04-03 2007-10-25 Renesas Technology Corp 半導体装置とその製造方法
KR101539667B1 (ko) * 2008-06-18 2015-07-28 삼성전자주식회사 인버터 소자 및 그 동작 방법
US8791738B2 (en) * 2011-08-19 2014-07-29 Marvell World Trade Ltd. Start-up circuit
JP6713647B2 (ja) * 2016-05-10 2020-06-24 国立大学法人広島大学 炭化珪素半導体装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5211199B1 (enrdf_load_stackoverflow) * 1970-05-27 1977-03-29
JPS4860583A (enrdf_load_stackoverflow) * 1971-11-26 1973-08-24
US3775693A (en) * 1971-11-29 1973-11-27 Moskek Co Mosfet logic inverter for integrated circuits
JPS4979182A (enrdf_load_stackoverflow) * 1972-12-04 1974-07-31
JPS5631744B2 (enrdf_load_stackoverflow) * 1972-12-04 1981-07-23
US3851189A (en) * 1973-06-25 1974-11-26 Hughes Aircraft Co Bisitable digital circuitry
US3898105A (en) * 1973-10-25 1975-08-05 Mostek Corp Method for making FET circuits
DE2356446A1 (de) * 1973-11-12 1975-05-28 Licentia Gmbh Integrierte schaltung mit feldeffekttransistoren
US3868274A (en) * 1974-01-02 1975-02-25 Gen Instrument Corp Method for fabricating MOS devices with a multiplicity of thresholds on a semiconductor substrate
US3913026A (en) * 1974-04-08 1975-10-14 Bulova Watch Co Inc Mos transistor gain block
US3969633A (en) * 1975-01-08 1976-07-13 Mostek Corporation Self-biased trinary input circuit for MOSFET integrated circuit
JPS5198938A (enrdf_load_stackoverflow) * 1975-02-26 1976-08-31
JPS51102581A (enrdf_load_stackoverflow) * 1975-03-07 1976-09-10 Sanyo Electric Co
US3995172A (en) * 1975-06-05 1976-11-30 International Business Machines Corporation Enhancement-and depletion-type field effect transistors connected in parallel

Also Published As

Publication number Publication date
GB2001197A (en) 1979-01-24
DE2831522C2 (enrdf_load_stackoverflow) 1991-06-06
JPS5496383A (en) 1979-07-30
GB2001197B (en) 1982-05-26
FR2398388B1 (enrdf_load_stackoverflow) 1984-11-16
JPH0210678Y2 (enrdf_load_stackoverflow) 1990-03-16
US4135102A (en) 1979-01-16
JPH05267598A (ja) 1993-10-15
JPH0795564B2 (ja) 1995-10-11
JPS63164249U (enrdf_load_stackoverflow) 1988-10-26
DE2831522A1 (de) 1979-02-01
FR2398388A1 (fr) 1979-02-16
JPS58103153U (ja) 1983-07-13
IT7825818A0 (it) 1978-07-17

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970730