IT1068568B - Circuito integrato monolitico e procedimento di diffusione planare per la produzione dello stesso - Google Patents

Circuito integrato monolitico e procedimento di diffusione planare per la produzione dello stesso

Info

Publication number
IT1068568B
IT1068568B IT2524276A IT2524276A IT1068568B IT 1068568 B IT1068568 B IT 1068568B IT 2524276 A IT2524276 A IT 2524276A IT 2524276 A IT2524276 A IT 2524276A IT 1068568 B IT1068568 B IT 1068568B
Authority
IT
Italy
Prior art keywords
production
integrated circuit
same
monolithic integrated
planar diffusion
Prior art date
Application number
IT2524276A
Other languages
English (en)
Italian (it)
Original Assignee
Itt
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Itt filed Critical Itt
Application granted granted Critical
Publication of IT1068568B publication Critical patent/IT1068568B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233Integrated injection logic structures [I2L]
    • H01L27/0244I2L structures integrated in combination with analog structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222Bipolar technology
    • H01L21/8226Bipolar technology comprising merged transistor logic or integrated injection logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
IT2524276A 1975-07-22 1976-07-13 Circuito integrato monolitico e procedimento di diffusione planare per la produzione dello stesso IT1068568B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19752532608 DE2532608C2 (de) 1975-07-22 1975-07-22 Planardiffusionsverfahren zum Herstellen einer monolithisch integrierten Schaltung

Publications (1)

Publication Number Publication Date
IT1068568B true IT1068568B (it) 1985-03-21

Family

ID=5952083

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2524276A IT1068568B (it) 1975-07-22 1976-07-13 Circuito integrato monolitico e procedimento di diffusione planare per la produzione dello stesso

Country Status (4)

Country Link
DE (1) DE2532608C2 (fr)
FR (1) FR2319197A1 (fr)
IT (1) IT1068568B (fr)
NL (1) NL7607540A (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2710878A1 (de) * 1977-03-12 1978-09-14 Itt Ind Gmbh Deutsche Verfahren zum herstellen einer an der oberflaeche eines halbleiterkoerpers aus silicium liegenden zone einer monolithisch integrierten i hoch 2 l-schaltung
DE2715158A1 (de) * 1977-04-05 1978-10-19 Licentia Gmbh Verfahren zur herstellung mindestens einer mit mindestens einer i hoch 2 l-schaltung integrierten analogschaltung
US4157268A (en) * 1977-06-16 1979-06-05 International Business Machines Corporation Localized oxidation enhancement for an integrated injection logic circuit
DE2835330C3 (de) * 1978-08-11 1982-03-11 Siemens AG, 1000 Berlin und 8000 München Integrierter bipolarer Halbleiterschaltkreis sowie Verfahren zu seiner Herstellung
DE3137813A1 (de) * 1981-09-23 1983-03-31 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zum herstellen einer halbleiteranordnung

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1388169A (fr) * 1963-01-28 1965-02-05 Rca Corp Dispositifs semiconducteurs
US3652347A (en) * 1967-11-06 1972-03-28 Hitachi Ltd Method for manufacturing a semiconductor device
US3817794A (en) * 1971-08-02 1974-06-18 Bell Telephone Labor Inc Method for making high-gain transistors
US3962717A (en) * 1974-10-29 1976-06-08 Fairchild Camera And Instrument Corporation Oxide isolated integrated injection logic with selective guard ring
DE2453134C3 (de) * 1974-11-08 1983-02-10 Deutsche Itt Industries Gmbh, 7800 Freiburg Planardiffusionsverfahren
DE2507038C3 (de) * 1975-02-19 1980-01-24 Siemens Ag, 1000 Berlin Und 8000 Muenchen Inverser Planartransistor und Verfahren zu seiner Herstellung

Also Published As

Publication number Publication date
FR2319197B1 (fr) 1982-10-22
DE2532608C2 (de) 1982-09-02
DE2532608A1 (de) 1977-01-27
FR2319197A1 (fr) 1977-02-18
NL7607540A (nl) 1977-01-25

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