IT1064203B - Memoria morta integrata - Google Patents

Memoria morta integrata

Info

Publication number
IT1064203B
IT1064203B IT29326/76A IT2932676A IT1064203B IT 1064203 B IT1064203 B IT 1064203B IT 29326/76 A IT29326/76 A IT 29326/76A IT 2932676 A IT2932676 A IT 2932676A IT 1064203 B IT1064203 B IT 1064203B
Authority
IT
Italy
Prior art keywords
dead memory
integrated dead
integrated
memory
dead
Prior art date
Application number
IT29326/76A
Other languages
English (en)
Original Assignee
Cii Honeywell Bull
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cii Honeywell Bull filed Critical Cii Honeywell Bull
Application granted granted Critical
Publication of IT1064203B publication Critical patent/IT1064203B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493—Fuses, i.e. interconnections changeable from conductive to non-conductive
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/055—Fuse
IT29326/76A 1975-12-05 1976-11-15 Memoria morta integrata IT1064203B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7537358A FR2334170A1 (fr) 1975-12-05 1975-12-05 Memoire morte integree

Publications (1)

Publication Number Publication Date
IT1064203B true IT1064203B (it) 1985-02-18

Family

ID=9163396

Family Applications (1)

Application Number Title Priority Date Filing Date
IT29326/76A IT1064203B (it) 1975-12-05 1976-11-15 Memoria morta integrata

Country Status (7)

Country Link
US (1) US4112505A (it)
JP (1) JPS5271183A (it)
DE (1) DE2654950A1 (it)
FR (1) FR2334170A1 (it)
GB (1) GB1560749A (it)
IT (1) IT1064203B (it)
NL (1) NL7613470A (it)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS607388B2 (ja) * 1978-09-08 1985-02-23 富士通株式会社 半導体記憶装置
DE3017636A1 (de) * 1979-05-10 1980-11-20 Gen Electric Programmierbarer speicherbaustein und programmierverfahren
FR2490860B1 (fr) * 1980-09-24 1986-11-28 Nippon Telegraph & Telephone Dispositif semi-conducteur de memorisation programmable a lecture seule, de type a jonction en court-circuit
US4489402A (en) * 1981-04-25 1984-12-18 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory device
US4412308A (en) * 1981-06-15 1983-10-25 International Business Machines Corporation Programmable bipolar structures
JPS59152594A (ja) * 1983-02-21 1984-08-31 Hitachi Ltd 半導体記憶装置
US4654830A (en) * 1984-11-27 1987-03-31 Monolithic Memories, Inc. Method and structure for disabling and replacing defective memory in a PROM
JPS62157400A (ja) * 1985-12-27 1987-07-13 Fujitsu Ltd 半導体記憶回路
FR2633420B1 (fr) * 1988-06-28 1992-02-21 Schlumberger Ind Sa Support d'informations et systeme de gestion de tels supports
US6229161B1 (en) * 1998-06-05 2001-05-08 Stanford University Semiconductor capacitively-coupled NDR device and its applications in high-density high-speed memories and in power switches
US6462359B1 (en) * 2001-03-22 2002-10-08 T-Ram, Inc. Stability in thyristor-based memory device
US6891205B1 (en) * 2001-03-22 2005-05-10 T-Ram, Inc. Stability in thyristor-based memory device
US6974200B2 (en) * 2003-11-14 2005-12-13 Lexmark International, Inc. Fuse density on an inkjet printhead chip
WO2009108875A1 (en) * 2008-02-28 2009-09-03 Contour Semiconductor, Inc. Storage array with diagonal connection of power supplies

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3872450A (en) * 1973-06-21 1975-03-18 Motorola Inc Fusible link memory cell for a programmable read only memory

Also Published As

Publication number Publication date
NL7613470A (nl) 1977-06-07
GB1560749A (en) 1980-02-06
US4112505A (en) 1978-09-05
DE2654950A1 (de) 1977-06-23
FR2334170A1 (fr) 1977-07-01
JPS5271183A (en) 1977-06-14
FR2334170B1 (it) 1980-05-23

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