JPS5271183A - Integrated read only memory - Google Patents

Integrated read only memory

Info

Publication number
JPS5271183A
JPS5271183A JP14486976A JP14486976A JPS5271183A JP S5271183 A JPS5271183 A JP S5271183A JP 14486976 A JP14486976 A JP 14486976A JP 14486976 A JP14486976 A JP 14486976A JP S5271183 A JPS5271183 A JP S5271183A
Authority
JP
Japan
Prior art keywords
memory
integrated read
read
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14486976A
Other languages
English (en)
Inventor
Kuroodo Deyubaru Jiyan
Jiyosefu Moteini Furanshisu
Oogiyusuto Toron Serujiyu
Jiyatsuku Runaaru Jiyan
Marii Deyubaru Riyushiyura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ANTERUNASHIYONARU PUURU RANFUORUMATEIKU SEEII HANIIUERU BURU CO
Original Assignee
ANTERUNASHIYONARU PUURU RANFUORUMATEIKU SEEII HANIIUERU BURU CO
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ANTERUNASHIYONARU PUURU RANFUORUMATEIKU SEEII HANIIUERU BURU CO filed Critical ANTERUNASHIYONARU PUURU RANFUORUMATEIKU SEEII HANIIUERU BURU CO
Publication of JPS5271183A publication Critical patent/JPS5271183A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/055—Fuse

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
JP14486976A 1975-12-05 1976-12-03 Integrated read only memory Pending JPS5271183A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7537358A FR2334170A1 (fr) 1975-12-05 1975-12-05 Memoire morte integree

Publications (1)

Publication Number Publication Date
JPS5271183A true JPS5271183A (en) 1977-06-14

Family

ID=9163396

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14486976A Pending JPS5271183A (en) 1975-12-05 1976-12-03 Integrated read only memory

Country Status (7)

Country Link
US (1) US4112505A (ja)
JP (1) JPS5271183A (ja)
DE (1) DE2654950A1 (ja)
FR (1) FR2334170A1 (ja)
GB (1) GB1560749A (ja)
IT (1) IT1064203B (ja)
NL (1) NL7613470A (ja)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS607388B2 (ja) * 1978-09-08 1985-02-23 富士通株式会社 半導体記憶装置
DE3017636A1 (de) * 1979-05-10 1980-11-20 Gen Electric Programmierbarer speicherbaustein und programmierverfahren
FR2490860B1 (fr) * 1980-09-24 1986-11-28 Nippon Telegraph & Telephone Dispositif semi-conducteur de memorisation programmable a lecture seule, de type a jonction en court-circuit
US4489402A (en) * 1981-04-25 1984-12-18 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory device
US4412308A (en) * 1981-06-15 1983-10-25 International Business Machines Corporation Programmable bipolar structures
JPS59152594A (ja) * 1983-02-21 1984-08-31 Hitachi Ltd 半導体記憶装置
US4654830A (en) * 1984-11-27 1987-03-31 Monolithic Memories, Inc. Method and structure for disabling and replacing defective memory in a PROM
JPS62157400A (ja) * 1985-12-27 1987-07-13 Fujitsu Ltd 半導体記憶回路
FR2633420B1 (fr) * 1988-06-28 1992-02-21 Schlumberger Ind Sa Support d'informations et systeme de gestion de tels supports
US6229161B1 (en) * 1998-06-05 2001-05-08 Stanford University Semiconductor capacitively-coupled NDR device and its applications in high-density high-speed memories and in power switches
US6462359B1 (en) * 2001-03-22 2002-10-08 T-Ram, Inc. Stability in thyristor-based memory device
US6891205B1 (en) * 2001-03-22 2005-05-10 T-Ram, Inc. Stability in thyristor-based memory device
US6974200B2 (en) * 2003-11-14 2005-12-13 Lexmark International, Inc. Fuse density on an inkjet printhead chip
WO2009108875A1 (en) * 2008-02-28 2009-09-03 Contour Semiconductor, Inc. Storage array with diagonal connection of power supplies

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3872450A (en) * 1973-06-21 1975-03-18 Motorola Inc Fusible link memory cell for a programmable read only memory

Also Published As

Publication number Publication date
FR2334170B1 (ja) 1980-05-23
FR2334170A1 (fr) 1977-07-01
GB1560749A (en) 1980-02-06
DE2654950A1 (de) 1977-06-23
US4112505A (en) 1978-09-05
IT1064203B (it) 1985-02-18
NL7613470A (nl) 1977-06-07

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