IN2015DN03872A - - Google Patents
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- Publication number
- IN2015DN03872A IN2015DN03872A IN3872DEN2015A IN2015DN03872A IN 2015DN03872 A IN2015DN03872 A IN 2015DN03872A IN 3872DEN2015 A IN3872DEN2015 A IN 3872DEN2015A IN 2015DN03872 A IN2015DN03872 A IN 2015DN03872A
- Authority
- IN
- India
- Prior art keywords
- clock signal
- signal
- input unit
- unit
- input
- Prior art date
Links
- 238000005070 sampling Methods 0.000 abstract 3
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
- H03M3/494—Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems
- H03M3/496—Details of sampling arrangements or methods
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M3/324—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement
- H03M3/326—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement by averaging out the errors
- H03M3/328—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement by averaging out the errors using dither
- H03M3/3283—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement by averaging out the errors using dither the dither being in the time domain
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/50—Digital/analogue converters using delta-sigma modulation as an intermediate step
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/50—Digital/analogue converters using delta-sigma modulation as an intermediate step
- H03M3/502—Details of the final digital/analogue conversion following the digital delta-sigma modulation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Analogue/Digital Conversion (AREA)
- Dc Digital Transmission (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012235910 | 2012-10-25 | ||
| PCT/JP2013/078998 WO2014065408A1 (ja) | 2012-10-25 | 2013-10-25 | 変換器 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IN2015DN03872A true IN2015DN03872A (cg-RX-API-DMAC7.html) | 2015-10-02 |
Family
ID=50544779
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IN3872DEN2015 IN2015DN03872A (cg-RX-API-DMAC7.html) | 2012-10-25 | 2013-10-25 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US9362943B2 (cg-RX-API-DMAC7.html) |
| EP (1) | EP2913931A4 (cg-RX-API-DMAC7.html) |
| JP (1) | JP6316751B2 (cg-RX-API-DMAC7.html) |
| KR (1) | KR20150077420A (cg-RX-API-DMAC7.html) |
| CN (1) | CN104718704A (cg-RX-API-DMAC7.html) |
| IN (1) | IN2015DN03872A (cg-RX-API-DMAC7.html) |
| WO (1) | WO2014065408A1 (cg-RX-API-DMAC7.html) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104581589B (zh) * | 2014-12-31 | 2018-01-02 | 苏州上声电子有限公司 | 基于三态编码的通道状态选取方法和装置 |
| US9397677B1 (en) * | 2015-11-02 | 2016-07-19 | Keysight Technologies, Inc. | Method and system for digital-to-analog converter performance measurement using equivalent-time sampler |
| CN105761691A (zh) * | 2016-05-04 | 2016-07-13 | 深圳市华星光电技术有限公司 | 栅极扫描线驱动方法、驱动模块及tft-lcd显示面板 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5471209A (en) * | 1994-03-03 | 1995-11-28 | Echelon Corporation | Sigma-delta converter having a digital logic gate core |
| DE60113442T2 (de) * | 2001-10-31 | 2006-01-26 | Freescale Semiconductors, Inc., Austin | Inkrementaler Delta Analog-Digital-Wandler |
| US7146144B2 (en) * | 2003-10-20 | 2006-12-05 | Northrop Grumman Corporation | Frequency agile exciter |
| JP4687510B2 (ja) * | 2006-03-08 | 2011-05-25 | 日本電気株式会社 | 移動通信端末における信号処理システム及びその方法並びにそれを用いた移動通信端末 |
| JP4660778B2 (ja) * | 2006-07-27 | 2011-03-30 | 国立大学法人 名古屋工業大学 | Pwm信号生成器、pwm信号生成装置およびデジタルアンプ |
| KR101055250B1 (ko) * | 2006-08-23 | 2011-08-09 | 아사히 가세이 일렉트로닉스 가부시끼가이샤 | 델타 시그마 변조기 |
| US7619487B2 (en) * | 2007-09-14 | 2009-11-17 | Infineon Technologies Ag | Polar modulation without analog filtering |
| EP2063534B1 (en) * | 2007-11-23 | 2012-02-01 | STMicroelectronics Srl | Clock dithering process for reducing electromagnetic interference in D/A converters and apparatus for carrying out such process |
| JP2010041478A (ja) * | 2008-08-06 | 2010-02-18 | Mitsubishi Electric Engineering Co Ltd | パルス幅変調方式のデジタル/アナログ変換器 |
| JP5365437B2 (ja) * | 2009-09-11 | 2013-12-11 | 株式会社リコー | 画像読取装置および画像形成装置 |
| KR101634359B1 (ko) * | 2009-09-23 | 2016-06-28 | 삼성전자주식회사 | 클럭 신호의 변화를 통하여 이득을 제어하는 아날로그-디지털 컨버터 및 이를 포함하는 이미지 센서 |
| US8179174B2 (en) * | 2010-06-15 | 2012-05-15 | Mstar Semiconductor, Inc. | Fast phase locking system for automatically calibrated fractional-N PLL |
-
2013
- 2013-10-25 IN IN3872DEN2015 patent/IN2015DN03872A/en unknown
- 2013-10-25 CN CN201380053826.8A patent/CN104718704A/zh active Pending
- 2013-10-25 JP JP2014543364A patent/JP6316751B2/ja active Active
- 2013-10-25 WO PCT/JP2013/078998 patent/WO2014065408A1/ja not_active Ceased
- 2013-10-25 EP EP13848684.0A patent/EP2913931A4/en not_active Withdrawn
- 2013-10-25 KR KR1020157010459A patent/KR20150077420A/ko not_active Withdrawn
-
2015
- 2015-04-24 US US14/695,385 patent/US9362943B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| WO2014065408A1 (ja) | 2014-05-01 |
| EP2913931A1 (en) | 2015-09-02 |
| EP2913931A4 (en) | 2016-08-03 |
| US9362943B2 (en) | 2016-06-07 |
| CN104718704A (zh) | 2015-06-17 |
| US20150236713A1 (en) | 2015-08-20 |
| JP6316751B2 (ja) | 2018-04-25 |
| JPWO2014065408A1 (ja) | 2016-09-08 |
| KR20150077420A (ko) | 2015-07-07 |
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