IN2014KN01000A - - Google Patents

Info

Publication number
IN2014KN01000A
IN2014KN01000A IN1000KON2014A IN2014KN01000A IN 2014KN01000 A IN2014KN01000 A IN 2014KN01000A IN 1000KON2014 A IN1000KON2014 A IN 1000KON2014A IN 2014KN01000 A IN2014KN01000 A IN 2014KN01000A
Authority
IN
India
Prior art keywords
bits
padded
information bits
bch
ldpc
Prior art date
Application number
Other languages
English (en)
Inventor
Hong Sil Jeong
Sung Ryul Yun
Alain Mourad
Ismael Gutierrez
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of IN2014KN01000A publication Critical patent/IN2014KN01000A/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/618—Shortening and extension of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6522—Intended application, e.g. transmission or communication standard
    • H03M13/6552—DVB-T2
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H04L1/0063—Single parity check
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching
    • H04L1/0068—Rate matching by puncturing
    • H04L1/0069—Puncturing patterns

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Algebra (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Multimedia (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
IN1000KON2014 2011-10-10 2012-09-20 IN2014KN01000A (hr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR20110103275 2011-10-10
KR1020120005913A KR101791477B1 (ko) 2011-10-10 2012-01-18 통신/방송 시스템에서 데이터 송수신 장치 및 방법
PCT/KR2012/007538 WO2013055046A2 (ko) 2011-10-10 2012-09-20 통신/방송 시스템에서 데이터 송수신 장치 및 방법

Publications (1)

Publication Number Publication Date
IN2014KN01000A true IN2014KN01000A (hr) 2015-10-09

Family

ID=48439236

Family Applications (1)

Application Number Title Priority Date Filing Date
IN1000KON2014 IN2014KN01000A (hr) 2011-10-10 2012-09-20

Country Status (9)

Country Link
US (1) US9231734B2 (hr)
EP (1) EP2768146B1 (hr)
JP (1) JP5996659B2 (hr)
KR (1) KR101791477B1 (hr)
CN (1) CN103988439B (hr)
AU (1) AU2012321618B9 (hr)
IN (1) IN2014KN01000A (hr)
RU (1) RU2598318C2 (hr)
WO (1) WO2013055046A2 (hr)

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WO2016129975A2 (en) 2015-02-13 2016-08-18 Samsung Electronics Co., Ltd. Transmitter and additional parity generating method thereof
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US10142055B2 (en) 2015-02-25 2018-11-27 Samsung Electronics Co., Ltd. Transmitter and method for generating additional parity thereof
KR102426380B1 (ko) * 2015-02-25 2022-07-29 삼성전자주식회사 송신 장치 및 그의 부가 패리티 생성 방법
KR102426771B1 (ko) 2015-02-25 2022-07-29 삼성전자주식회사 송신 장치 및 그의 부가 패리티 생성 방법
WO2016137205A1 (ko) * 2015-02-27 2016-09-01 한국전자통신연구원 가변 길이 시그널링 정보 부호화를 위한 제로 패딩 장치 및 이를 이용한 제로 패딩 방법
WO2016137203A1 (ko) 2015-02-27 2016-09-01 한국전자통신연구원 고정 길이 시그널링 정보 부호화를 위한 제로 패딩 장치 및 이를 이용한 제로 패딩 방법
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KR102453471B1 (ko) 2015-02-27 2022-10-14 한국전자통신연구원 고정 길이 시그널링 정보 부호화를 위한 제로 패딩 장치 및 이를 이용한 제로 패딩 방법
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WO2018119741A1 (zh) * 2016-12-28 2018-07-05 华为技术有限公司 数据访问方法及闪存设备
WO2020022539A1 (ko) * 2018-07-27 2020-01-30 엘지전자 주식회사 Ldpc코드의 인코딩 및 디코딩을 수행하는 방법과 이를 위한 통신 장치
KR102163876B1 (ko) * 2019-11-19 2020-10-12 주식회사 아리스케일 Ｌｄｐｃ 부호화, 복호화 방법 및 그 방법을 이용하는 장치
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CN113472362A (zh) * 2020-03-31 2021-10-01 华为技术有限公司 用于数据通信的编码方法及装置

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Also Published As

Publication number Publication date
US20140258815A1 (en) 2014-09-11
CN103988439B (zh) 2017-11-03
JP5996659B2 (ja) 2016-09-21
EP2768146A4 (en) 2015-11-25
EP2768146B1 (en) 2020-04-08
WO2013055046A3 (ko) 2013-06-13
WO2013055046A2 (ko) 2013-04-18
KR101791477B1 (ko) 2017-10-30
AU2012321618B9 (en) 2017-03-09
AU2012321618B2 (en) 2016-11-03
JP2014528669A (ja) 2014-10-27
AU2012321618A8 (en) 2014-10-23
US9231734B2 (en) 2016-01-05
RU2598318C2 (ru) 2016-09-20
KR20130038782A (ko) 2013-04-18
AU2012321618A1 (en) 2014-05-15
EP2768146A2 (en) 2014-08-20
RU2014118745A (ru) 2015-11-20
CN103988439A (zh) 2014-08-13

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