HK203096A - Apparatus for conditioning priority arbitration in buffered direct memory addressing - Google Patents

Apparatus for conditioning priority arbitration in buffered direct memory addressing

Info

Publication number
HK203096A
HK203096A HK203096A HK203096A HK203096A HK 203096 A HK203096 A HK 203096A HK 203096 A HK203096 A HK 203096A HK 203096 A HK203096 A HK 203096A HK 203096 A HK203096 A HK 203096A
Authority
HK
Hong Kong
Prior art keywords
direct memory
memory addressing
priority arbitration
conditioning priority
buffered direct
Prior art date
Application number
HK203096A
Other languages
English (en)
Inventor
Mack Wayne Riley
John Daniel Upton
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of HK203096A publication Critical patent/HK203096A/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/30Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal with priority control
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
HK203096A 1989-12-15 1996-11-07 Apparatus for conditioning priority arbitration in buffered direct memory addressing HK203096A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US45119489A 1989-12-15 1989-12-15

Publications (1)

Publication Number Publication Date
HK203096A true HK203096A (en) 1996-11-15

Family

ID=23791186

Family Applications (1)

Application Number Title Priority Date Filing Date
HK203096A HK203096A (en) 1989-12-15 1996-11-07 Apparatus for conditioning priority arbitration in buffered direct memory addressing

Country Status (9)

Country Link
US (1) US5301279A (ko)
EP (1) EP0432978B1 (ko)
JP (1) JPH071495B2 (ko)
KR (1) KR940002905B1 (ko)
CN (1) CN1018488B (ko)
AU (1) AU637428B2 (ko)
DE (1) DE69027515T2 (ko)
HK (1) HK203096A (ko)
SG (1) SG43719A1 (ko)

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DE19744230B4 (de) * 1997-10-07 2007-10-25 Robert Bosch Gmbh Steuergeräte für ein System und Verfahren zum Betrieb eines Steuergeräts
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US6321280B1 (en) * 1998-04-20 2001-11-20 Fujitsu Limited System LSI having communication function
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US7454777B1 (en) * 1999-03-01 2008-11-18 Sony Corporation Satellite system/internet system with display option palette with multiple filtering options
US6442631B1 (en) * 1999-05-07 2002-08-27 Compaq Information Technologies Group, L.P. Allocating system resources based upon priority
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JP2002041445A (ja) * 2000-05-19 2002-02-08 Matsushita Electric Ind Co Ltd 高性能dmaコントローラ
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CN1518325B (zh) * 2003-01-17 2010-04-28 华为技术有限公司 一种用于ip电话系统的路由优先级动态调整方法
US6922740B2 (en) * 2003-05-21 2005-07-26 Intel Corporation Apparatus and method of memory access control for bus masters
JP2006039672A (ja) * 2004-07-22 2006-02-09 Olympus Corp バス要求制御回路
CN102819510A (zh) * 2011-06-10 2012-12-12 联咏科技股份有限公司 仲裁电路及其仲裁方法
KR101861768B1 (ko) * 2011-09-16 2018-05-28 삼성전자주식회사 시스템 온칩, 이를 포함하는 전자 시스템, 및 그 동작 방법
CN103106164A (zh) * 2011-11-09 2013-05-15 深圳市德赛微电子技术有限公司 一种高效dma控制器
CN104035899A (zh) * 2014-03-21 2014-09-10 浪潮电子信息产业股份有限公司 一种高速互联总线多消息源仲裁器的实现方法
KR102325822B1 (ko) 2015-03-10 2021-11-11 삼성전자주식회사 사물 인터넷 디바이스 및 사물 인터넷 통신 방법
CN105512005B (zh) * 2015-12-12 2018-08-03 中国航空工业集团公司西安航空计算技术研究所 控制/远程节点与总线监控节点同步工作的电路及方法
CN107315703B (zh) * 2017-05-17 2020-08-25 天津大学 双优先级控制型公平仲裁器
CN109379296A (zh) * 2018-10-25 2019-02-22 盛科网络(苏州)有限公司 一种芯片实现上cpu协议报文层次化流量控制的方法及装置
JPWO2023105603A1 (ko) * 2021-12-07 2023-06-15

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Also Published As

Publication number Publication date
CN1052563A (zh) 1991-06-26
JPH03191453A (ja) 1991-08-21
CN1018488B (zh) 1992-09-30
DE69027515D1 (de) 1996-07-25
US5301279A (en) 1994-04-05
EP0432978A3 (en) 1992-02-19
SG43719A1 (en) 1997-11-14
KR940002905B1 (en) 1994-04-07
EP0432978B1 (en) 1996-06-19
AU637428B2 (en) 1993-05-27
DE69027515T2 (de) 1997-01-23
JPH071495B2 (ja) 1995-01-11
AU6661090A (en) 1991-06-20
EP0432978A2 (en) 1991-06-19
KR910012961A (ko) 1991-08-08

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Legal Events

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PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)