HK1220269A1 - 雙向通信方法以及使用該雙向通信方法的雙向通信設備 - Google Patents

雙向通信方法以及使用該雙向通信方法的雙向通信設備

Info

Publication number
HK1220269A1
HK1220269A1 HK16108259.1A HK16108259A HK1220269A1 HK 1220269 A1 HK1220269 A1 HK 1220269A1 HK 16108259 A HK16108259 A HK 16108259A HK 1220269 A1 HK1220269 A1 HK 1220269A1
Authority
HK
Hong Kong
Prior art keywords
bidirectional communication
same
communication device
communication method
bidirectional
Prior art date
Application number
HK16108259.1A
Other languages
English (en)
Inventor
樸畯倍
金度完
林鎮業
金尚俊
李仁洙
Original Assignee
Anapass Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anapass Inc filed Critical Anapass Inc
Publication of HK1220269A1 publication Critical patent/HK1220269A1/zh

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4265Bus transfer protocol, e.g. handshake; Synchronisation on a point to point bus
    • G06F13/4278Bus transfer protocol, e.g. handshake; Synchronisation on a point to point bus using an embedded synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12Synchronisation of different clock signals provided by a plurality of clock generators
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0008Synchronisation information channels, e.g. clock distribution lines
HK16108259.1A 2014-07-02 2016-07-14 雙向通信方法以及使用該雙向通信方法的雙向通信設備 HK1220269A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20140082330 2014-07-02
PCT/KR2015/006791 WO2016003207A1 (ko) 2014-07-02 2015-07-02 양방향 통신 방법 및 이를 이용한 양방향 통신 장치

Publications (1)

Publication Number Publication Date
HK1220269A1 true HK1220269A1 (zh) 2017-04-28

Family

ID=55019651

Family Applications (1)

Application Number Title Priority Date Filing Date
HK16108259.1A HK1220269A1 (zh) 2014-07-02 2016-07-14 雙向通信方法以及使用該雙向通信方法的雙向通信設備

Country Status (6)

Country Link
US (1) US9842080B2 (zh)
JP (1) JP6325672B2 (zh)
KR (6) KR20170004953A (zh)
CN (1) CN105683932B (zh)
HK (1) HK1220269A1 (zh)
WO (1) WO2016003207A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8760945B2 (en) 2011-03-28 2014-06-24 Samsung Electronics Co., Ltd. Memory devices, systems and methods employing command/address calibration
TWI582566B (zh) * 2016-04-25 2017-05-11 晨星半導體股份有限公司 通訊裝置的控制電路及控制方法
KR102225292B1 (ko) * 2016-11-10 2021-03-09 주식회사 아나패스 다채널 통신 방법 및 다채널 통신 장치
KR102403623B1 (ko) * 2017-08-18 2022-05-30 삼성전자주식회사 클록 신호들 사이의 스큐를 조절하도록 구성되는 전자 회로
CN111600784B (zh) * 2019-07-26 2022-06-28 新华三技术有限公司 数据处理方法、网络设备、主控板及逻辑芯片
CN110768664B (zh) * 2019-10-23 2023-12-26 新华三信息安全技术有限公司 数据采样方法和装置

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JPH11112483A (ja) * 1997-10-08 1999-04-23 Nec Eng Ltd データ転送システム
DE10344818B4 (de) * 2003-09-27 2008-08-14 Qimonda Ag Vorrichtung zum Kalibrieren der relativen Phase zweier Empfangssignale eines Speicherbausteins
KR20050077953A (ko) * 2004-01-30 2005-08-04 이남규 양방향 통신이 가능한 근거리용 통신 단말기 및 그제어방법
JP2005275777A (ja) * 2004-03-24 2005-10-06 Nec Saitama Ltd データ転送装置
JP2008225956A (ja) * 2007-03-14 2008-09-25 Fujitsu Ltd 半導体集積回路装置およびタイミング調整方法
TWI364219B (en) 2007-08-20 2012-05-11 Novatek Microelectronics Corp High transmission rate interface for storing both clock and data signals
US8364626B2 (en) * 2007-09-14 2013-01-29 Siemens Aktiengesellschaft Method and device for determining a probability of occurrence by evaluting an overall fault tree
KR100822307B1 (ko) 2007-09-20 2008-04-16 주식회사 아나패스 데이터 구동 회로 및 지연 고정 루프
JP5066121B2 (ja) 2008-03-20 2012-11-07 アナパス・インコーポレーテッド クロック情報とデータを伝送する装置及び方法
KR100868299B1 (ko) * 2008-03-20 2008-11-11 주식회사 아나패스 클록 정보와 함께 데이터를 전송하는 방법 및 장치
KR101499176B1 (ko) * 2008-04-08 2015-03-06 삼성전자주식회사 클럭 신호의 위상 튜닝 방법 및 그 장치
KR101272886B1 (ko) 2008-10-09 2013-06-11 주식회사 아나패스 클록 정보와 함께 데이터를 전송하는 방법 및 장치
JP5341503B2 (ja) 2008-12-26 2013-11-13 株式会社東芝 メモリデバイス、ホストデバイスおよびサンプリングクロックの調整方法
CN102171967A (zh) * 2009-03-25 2011-08-31 松下电器产业株式会社 接口电路
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TWI489782B (zh) * 2012-10-30 2015-06-21 Realtek Semiconductor Corp 相位校正裝置及相位校正方法

Also Published As

Publication number Publication date
JP2016528646A (ja) 2016-09-15
CN105683932A (zh) 2016-06-15
KR101668234B1 (ko) 2016-10-21
KR20170051520A (ko) 2017-05-11
KR20170004953A (ko) 2017-01-11
CN105683932B (zh) 2018-11-02
US9842080B2 (en) 2017-12-12
KR101827526B1 (ko) 2018-02-08
KR101880700B1 (ko) 2018-07-20
KR20170051550A (ko) 2017-05-11
KR20170004955A (ko) 2017-01-11
KR20160015250A (ko) 2016-02-12
KR101799918B1 (ko) 2017-12-20
JP6325672B2 (ja) 2018-05-16
KR20170004954A (ko) 2017-01-11
WO2016003207A1 (ko) 2016-01-07
US20160147703A1 (en) 2016-05-26

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