HK1216052A1 - 屏蔽應用的陶瓷基板的金屬化的器件及方法 - Google Patents

屏蔽應用的陶瓷基板的金屬化的器件及方法

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Publication number
HK1216052A1
HK1216052A1 HK16104024.4A HK16104024A HK1216052A1 HK 1216052 A1 HK1216052 A1 HK 1216052A1 HK 16104024 A HK16104024 A HK 16104024A HK 1216052 A1 HK1216052 A1 HK 1216052A1
Authority
HK
Hong Kong
Prior art keywords
metallization
devices
ceramic substrates
methods related
shielding applications
Prior art date
Application number
HK16104024.4A
Other languages
English (en)
Inventor
‧布蘭切夫斯基
‧陳
‧洛比安科
Original Assignee
Skyworks Solutions Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Skyworks Solutions Inc filed Critical Skyworks Solutions Inc
Publication of HK1216052A1 publication Critical patent/HK1216052A1/zh

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    • H05K1/02Details
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    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
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    • H01L24/93Batch processes
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    • H05K2201/0707Shielding
    • H05K2201/0715Shielding provided by an outer layer of PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/0919Exposing inner circuit layers or metal planes at the side edge of the PCB or at the walls of large holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10098Components for radio transmission, e.g. radio frequency identification [RFID] tag, printed or non-printed antennas
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structure Of Printed Boards (AREA)
HK16104024.4A 2014-08-31 2016-04-08 屏蔽應用的陶瓷基板的金屬化的器件及方法 HK1216052A1 (zh)

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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9455228B2 (en) * 2014-01-03 2016-09-27 Apple Inc. Self-shielded components and methods for making the same
US10321569B1 (en) * 2015-04-29 2019-06-11 Vpt, Inc. Electronic module and method of making same
JP6332190B2 (ja) * 2015-07-31 2018-05-30 株式会社村田製作所 セラミック配線基板、電子回路モジュールおよび電子回路モジュールの製造方法
JP2017200183A (ja) * 2016-04-29 2017-11-02 スカイワークス ソリューションズ, インコーポレイテッドSkyworks Solutions, Inc. 遮蔽されたダイバーシティ受信モジュール
JP6597499B2 (ja) * 2016-06-29 2019-10-30 三菱電機株式会社 半導体装置およびその製造方法
US20190318984A1 (en) * 2018-04-17 2019-10-17 STATS ChipPAC Pte. Ltd. Semiconductor Device and Method of Forming Conductive Vias to Have Enhanced Contact to Shielding Layer
US11373959B2 (en) 2019-04-19 2022-06-28 Skyworks Solutions, Inc. Shielding for flip chip devices
CN113327899A (zh) * 2021-04-22 2021-08-31 成都芯源系统有限公司 倒装芯片封装单元及封装方法
CN114745018B (zh) * 2022-03-17 2024-05-28 南京瑞基通讯技术有限公司 一种采用高性能陶瓷材料的射频前端组件

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3381070D1 (de) * 1982-07-19 1990-02-08 Toshiba Kawasaki Kk Sendeempfangsmodul fuer optische nachrichtenuebermittlung.
US4790894A (en) * 1987-02-19 1988-12-13 Hitachi Condenser Co., Ltd. Process for producing printed wiring board
US5276963A (en) * 1992-02-21 1994-01-11 Coors Electronic Package Company Process for obtaining side metallization and articles produced thereby
JPH10223994A (ja) * 1997-02-06 1998-08-21 Murata Mfg Co Ltd 電子回路基板
US6483101B1 (en) 1999-12-08 2002-11-19 Amkor Technology, Inc. Molded image sensor package having lens holder
US6871396B2 (en) 2000-02-09 2005-03-29 Matsushita Electric Industrial Co., Ltd. Transfer material for wiring substrate
US6970362B1 (en) * 2000-07-31 2005-11-29 Intel Corporation Electronic assemblies and systems comprising interposer with embedded capacitors
JP4178880B2 (ja) 2002-08-29 2008-11-12 松下電器産業株式会社 モジュール部品
US7030469B2 (en) 2003-09-25 2006-04-18 Freescale Semiconductor, Inc. Method of forming a semiconductor package and structure thereof
US7656677B2 (en) * 2004-01-27 2010-02-02 Murata Manufacturing Co., Ltd. Multilayer electronic component and structure for mounting multilayer electronic component
JP4614278B2 (ja) * 2005-05-25 2011-01-19 アルプス電気株式会社 電子回路ユニット、及びその製造方法
US7696442B2 (en) * 2005-06-03 2010-04-13 Ngk Spark Plug Co., Ltd. Wiring board and manufacturing method of wiring board
US7742314B2 (en) * 2005-09-01 2010-06-22 Ngk Spark Plug Co., Ltd. Wiring board and capacitor
US7164572B1 (en) 2005-09-15 2007-01-16 Medtronic, Inc. Multi-path, mono-polar co-fired hermetic electrical feedthroughs and methods of fabrication therfor
US7580240B2 (en) * 2005-11-24 2009-08-25 Ngk Spark Plug Co., Ltd. Via array capacitor, wiring board incorporating a via array capacitor, and method of manufacturing the same
US7808799B2 (en) * 2006-04-25 2010-10-05 Ngk Spark Plug Co., Ltd. Wiring board
US8174119B2 (en) * 2006-11-10 2012-05-08 Stats Chippac, Ltd. Semiconductor package with embedded die
US7651889B2 (en) 2007-09-13 2010-01-26 Freescale Semiconductor, Inc. Electromagnetic shield formation for integrated circuit die package
US8212339B2 (en) * 2008-02-05 2012-07-03 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8350367B2 (en) * 2008-02-05 2013-01-08 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8236610B2 (en) * 2009-05-26 2012-08-07 International Business Machines Corporation Forming semiconductor chip connections
US8212340B2 (en) * 2009-07-13 2012-07-03 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
KR20120053332A (ko) * 2010-11-17 2012-05-25 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
TWI538129B (zh) * 2010-12-06 2016-06-11 史達晶片有限公司 利用細長的遮罩開口在基板上形成窄互連位置的半導體裝置及方法
JP5327299B2 (ja) * 2011-09-09 2013-10-30 オムロン株式会社 半導体装置及びマイクロフォン
US8786060B2 (en) * 2012-05-04 2014-07-22 Advanced Semiconductor Engineering, Inc. Semiconductor package integrated with conformal shield and antenna
CN103400825B (zh) * 2013-07-31 2016-05-18 日月光半导体制造股份有限公司 半导体封装件及其制造方法
US9564937B2 (en) * 2013-11-05 2017-02-07 Skyworks Solutions, Inc. Devices and methods related to packaging of radio-frequency devices on ceramic substrates

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TWI672769B (zh) 2019-09-21
KR102460343B1 (ko) 2022-10-28
US20210045231A1 (en) 2021-02-11
KR20160026806A (ko) 2016-03-09
US10729001B2 (en) 2020-07-28
US11277901B2 (en) 2022-03-15
US20220338342A1 (en) 2022-10-20
CN105390453A (zh) 2016-03-09
TW201614779A (en) 2016-04-16
US20160073490A1 (en) 2016-03-10

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