HK1062087A1 - A phase-locked loop - Google Patents

A phase-locked loop

Info

Publication number
HK1062087A1
HK1062087A1 HK04105078A HK04105078A HK1062087A1 HK 1062087 A1 HK1062087 A1 HK 1062087A1 HK 04105078 A HK04105078 A HK 04105078A HK 04105078 A HK04105078 A HK 04105078A HK 1062087 A1 HK1062087 A1 HK 1062087A1
Authority
HK
Hong Kong
Prior art keywords
phase
locked loop
mode
register set
data defining
Prior art date
Application number
HK04105078A
Other languages
English (en)
Inventor
Alan Smith
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of HK1062087A1 publication Critical patent/HK1062087A1/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1077Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the phase or frequency detection means
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
HK04105078A 2001-01-25 2004-07-13 A phase-locked loop HK1062087A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB0101954.6A GB0101954D0 (en) 2001-01-25 2001-01-25 Phase-locked loop
PCT/GB2001/005610 WO2002060064A2 (en) 2001-01-25 2001-12-18 A phase-locked loop

Publications (1)

Publication Number Publication Date
HK1062087A1 true HK1062087A1 (en) 2004-10-15

Family

ID=9907507

Family Applications (1)

Application Number Title Priority Date Filing Date
HK04105078A HK1062087A1 (en) 2001-01-25 2004-07-13 A phase-locked loop

Country Status (14)

Country Link
US (1) US6965271B2 (de)
EP (1) EP1354407B1 (de)
JP (1) JP3836794B2 (de)
CN (1) CN1242556C (de)
AT (1) ATE329409T1 (de)
BR (1) BR0116823A (de)
CA (1) CA2435705C (de)
DE (1) DE60120490T2 (de)
DK (1) DK1354407T3 (de)
ES (1) ES2269308T3 (de)
GB (1) GB0101954D0 (de)
HK (1) HK1062087A1 (de)
IL (2) IL156972A0 (de)
WO (1) WO2002060064A2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004004126A1 (en) * 2002-06-28 2004-01-08 Advanced Micro Devices, Inc. Phase-locked loop with automatic frequency tuning
GB2393611B8 (en) 2002-09-26 2006-05-11 Qualcomm Inc Method of and apparatus for reducing frequency errors associated with an inter-system scan
JP2006005489A (ja) 2004-06-15 2006-01-05 Sharp Corp Pll回路および高周波受信装置
US8811915B2 (en) * 2005-03-04 2014-08-19 Psion Inc. Digital wireless narrow band radio
US8041972B2 (en) * 2006-04-04 2011-10-18 Qualcomm Incorporated Apparatus and method for setting wakeup times in a communication device based on estimated lock on time of frequency synthesizer

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3042374B2 (ja) * 1995-06-29 2000-05-15 日本電気株式会社 周波数シンセサイザ
EP0755120A1 (de) 1995-07-18 1997-01-22 Nec Corporation Phasenregelkreisschaltung
US6150891A (en) * 1998-05-29 2000-11-21 Silicon Laboratories, Inc. PLL synthesizer having phase shifted control signals
US6111807A (en) * 1998-07-17 2000-08-29 Mitsubishi Denki Kabushiki Kaisha Synchronous semiconductor memory device allowing easy and fast text
JP3851064B2 (ja) * 1999-06-30 2006-11-29 インフィネオン テクノロジース アクチエンゲゼルシャフト Pllシンセサイザ
US6718473B1 (en) * 2000-09-26 2004-04-06 Sun Microsystems, Inc. Method and apparatus for reducing power consumption

Also Published As

Publication number Publication date
CN1242556C (zh) 2006-02-15
CA2435705C (en) 2006-05-30
EP1354407B1 (de) 2006-06-07
CA2435705A1 (en) 2002-08-01
BR0116823A (pt) 2004-01-27
ATE329409T1 (de) 2006-06-15
JP2004527936A (ja) 2004-09-09
DK1354407T3 (da) 2006-10-09
CN1488194A (zh) 2004-04-07
ES2269308T3 (es) 2007-04-01
IL156972A0 (en) 2004-02-08
WO2002060064A3 (en) 2002-11-14
WO2002060064A2 (en) 2002-08-01
DE60120490D1 (de) 2006-07-20
GB0101954D0 (en) 2001-03-14
DE60120490T2 (de) 2007-01-11
EP1354407A2 (de) 2003-10-22
JP3836794B2 (ja) 2006-10-25
US6965271B2 (en) 2005-11-15
IL156972A (en) 2007-12-03
US20040113703A1 (en) 2004-06-17

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20101218