GB935484A - A process for use in the production of a semi-conductor device - Google Patents
A process for use in the production of a semi-conductor deviceInfo
- Publication number
- GB935484A GB935484A GB4002660A GB4002660A GB935484A GB 935484 A GB935484 A GB 935484A GB 4002660 A GB4002660 A GB 4002660A GB 4002660 A GB4002660 A GB 4002660A GB 935484 A GB935484 A GB 935484A
- Authority
- GB
- United Kingdom
- Prior art keywords
- region
- layer
- semi
- conductor
- alloyed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 238000004519 manufacturing process Methods 0.000 title abstract 3
- 238000010276 construction Methods 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0661—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
Abstract
935,484. Semi-conductor devices. SIEMENSSCHUCKERTWERKE A.G. Nov. 21, 1960 [Nov. 21, 1959], No. 40026/60. Class 37. During manufacture of a semi-conductor device a semi-conductor body is so doped that a doping layer extends into and over an entire surface of the body, the rest of the body being substantially unaffected by the doping, and a marginal region of the layer is subsequently removed so that a portion of the body surrounding the layer is left unexposed. In the construction shown in Fig. 4 a body of silicon of resistivity 200 ohm cms. has a layer 4 of goldantimony alloyed to it, the resistivity of this region being 80 ohm cms. and in the centre of the region is a more heavily doped (0.01 ohm cms.) N-type region 2. The edge of layer 4 is removed where shown dotted by centrifugal etching before or after the production of region 2, and this is said to maintain the width of the space charge zone even though negative ions are adsorbed on the surface. A P region 7 may be alloyed to the opposite face of the device. The conductivity type of the various regions may be reversed.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DES65923A DE1208413B (en) | 1959-11-21 | 1959-11-21 | Process for the production of planar pn junctions on semiconductor components |
Publications (1)
Publication Number | Publication Date |
---|---|
GB935484A true GB935484A (en) | 1963-08-28 |
Family
ID=7498409
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB4002660A Expired GB935484A (en) | 1959-11-21 | 1960-11-21 | A process for use in the production of a semi-conductor device |
Country Status (3)
Country | Link |
---|---|
CH (1) | CH396214A (en) |
DE (1) | DE1208413B (en) |
GB (1) | GB935484A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012004147A1 (en) * | 2010-07-06 | 2012-01-12 | Infineon Technologies Bipolar Gmbh & Co. Kg | Method and device for producing an edge structure of a semiconductor component |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2792539A (en) * | 1953-07-07 | 1957-05-14 | Sprague Electric Co | Transistor construction |
DE1170555B (en) * | 1956-07-23 | 1964-05-21 | Siemens Ag | Method for manufacturing a semiconductor component with three zones of alternating conductivity types |
AT202600B (en) * | 1956-12-13 | 1959-03-10 | Philips Nv | Field effect transistor and method of making such a transistor |
BE552928A (en) * | 1957-03-18 | |||
DE1056474B (en) * | 1957-03-23 | 1959-04-30 | Dresden Feinmess | Fuse for the trigger in photographic cameras |
-
1959
- 1959-11-21 DE DES65923A patent/DE1208413B/en active Pending
-
1960
- 1960-10-25 CH CH1190560A patent/CH396214A/en unknown
- 1960-11-21 GB GB4002660A patent/GB935484A/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012004147A1 (en) * | 2010-07-06 | 2012-01-12 | Infineon Technologies Bipolar Gmbh & Co. Kg | Method and device for producing an edge structure of a semiconductor component |
Also Published As
Publication number | Publication date |
---|---|
DE1208413B (en) | 1966-01-05 |
CH396214A (en) | 1965-07-31 |
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