GB2411768B - Semiconductor with tensile strained substrate and method of making the same - Google Patents

Semiconductor with tensile strained substrate and method of making the same

Info

Publication number
GB2411768B
GB2411768B GB0512330A GB0512330A GB2411768B GB 2411768 B GB2411768 B GB 2411768B GB 0512330 A GB0512330 A GB 0512330A GB 0512330 A GB0512330 A GB 0512330A GB 2411768 B GB2411768 B GB 2411768B
Authority
GB
United Kingdom
Prior art keywords
semiconductor
making
same
tensile strained
strained substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
GB0512330A
Other languages
English (en)
Other versions
GB2411768A (en
GB0512330D0 (en
Inventor
Minh Van Ngo
Paul R Besser
Ming-Ren Lin
Haihong Wang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of GB0512330D0 publication Critical patent/GB0512330D0/en
Publication of GB2411768A publication Critical patent/GB2411768A/en
Application granted granted Critical
Publication of GB2411768B publication Critical patent/GB2411768B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/792—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising applied insulating layers, e.g. stress liners
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L29/1054—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/90—MOSFET type gate sidewall insulating spacer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/933—Germanium or silicon or Ge-Si on III-V

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
GB0512330A 2003-01-17 2004-01-13 Semiconductor with tensile strained substrate and method of making the same Expired - Lifetime GB2411768B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/346,617 US7001837B2 (en) 2003-01-17 2003-01-17 Semiconductor with tensile strained substrate and method of making the same
PCT/US2004/000981 WO2004068586A1 (en) 2003-01-17 2004-01-13 Mosfet device with tensile strained substrate and method of making the same

Publications (3)

Publication Number Publication Date
GB0512330D0 GB0512330D0 (en) 2005-07-27
GB2411768A GB2411768A (en) 2005-09-07
GB2411768B true GB2411768B (en) 2006-04-26

Family

ID=32712194

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0512330A Expired - Lifetime GB2411768B (en) 2003-01-17 2004-01-13 Semiconductor with tensile strained substrate and method of making the same

Country Status (7)

Country Link
US (2) US7001837B2 (enExample)
JP (1) JP2006517343A (enExample)
KR (1) KR101023208B1 (enExample)
CN (1) CN1762056B (enExample)
DE (1) DE112004000146B4 (enExample)
GB (1) GB2411768B (enExample)
WO (1) WO2004068586A1 (enExample)

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US6703688B1 (en) 2001-03-02 2004-03-09 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
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US7301180B2 (en) 2001-06-18 2007-11-27 Massachusetts Institute Of Technology Structure and method for a high-speed semiconductor device having a Ge channel layer
US6916727B2 (en) * 2001-06-21 2005-07-12 Massachusetts Institute Of Technology Enhancement of P-type metal-oxide-semiconductor field effect transistors
EP1415331A2 (en) * 2001-08-06 2004-05-06 Massachusetts Institute Of Technology Formation of planar strained layers
US6974735B2 (en) 2001-08-09 2005-12-13 Amberwave Systems Corporation Dual layer Semiconductor Devices
US7138649B2 (en) * 2001-08-09 2006-11-21 Amberwave Systems Corporation Dual-channel CMOS transistors with differentially strained channels
AU2002331077A1 (en) * 2001-08-13 2003-03-03 Amberwave Systems Corporation Dram trench capacitor and method of making the same
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US6657276B1 (en) * 2001-12-10 2003-12-02 Advanced Micro Devices, Inc. Shallow trench isolation (STI) region with high-K liner and method of formation
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WO2003105204A2 (en) * 2002-06-07 2003-12-18 Amberwave Systems Corporation Semiconductor devices having strained dual channel layers
US6995430B2 (en) 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
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US20030227057A1 (en) 2002-06-07 2003-12-11 Lochtefeld Anthony J. Strained-semiconductor-on-insulator device structures
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US7393733B2 (en) 2004-12-01 2008-07-01 Amberwave Systems Corporation Methods of forming hybrid fin field-effect transistor structures
US20060172556A1 (en) * 2005-02-01 2006-08-03 Texas Instruments Incorporated Semiconductor device having a high carbon content strain inducing film and a method of manufacture therefor
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US7615432B2 (en) * 2005-11-02 2009-11-10 Samsung Electronics Co., Ltd. HDP/PECVD methods of fabricating stress nitride structures for field effect transistors
US7550356B2 (en) * 2005-11-14 2009-06-23 United Microelectronics Corp. Method of fabricating strained-silicon transistors
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US20070158739A1 (en) * 2006-01-06 2007-07-12 International Business Machines Corporation Higher performance CMOS on (110) wafers
US20080124880A1 (en) * 2006-09-23 2008-05-29 Chartered Semiconductor Manufacturing Ltd. Fet structure using disposable spacer and stress inducing layer
US7897493B2 (en) * 2006-12-08 2011-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. Inducement of strain in a semiconductor layer
US7892928B2 (en) * 2007-03-23 2011-02-22 International Business Machines Corporation Method of forming asymmetric spacers and methods of fabricating semiconductor device using asymmetric spacers
US7745847B2 (en) * 2007-08-09 2010-06-29 United Microelectronics Corp. Metal oxide semiconductor transistor
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US8232186B2 (en) * 2008-05-29 2012-07-31 International Business Machines Corporation Methods of integrating reverse eSiGe on NFET and SiGe channel on PFET, and related structure
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US8236709B2 (en) 2009-07-29 2012-08-07 International Business Machines Corporation Method of fabricating a device using low temperature anneal processes, a device and design structure
TWI419324B (zh) * 2009-11-27 2013-12-11 Univ Nat Chiao Tung 具有三五族通道及四族源汲極之半導體裝置及其製造方法
US8865576B2 (en) * 2011-09-29 2014-10-21 Eastman Kodak Company Producing vertical transistor having reduced parasitic capacitance
US8759920B2 (en) * 2012-06-01 2014-06-24 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of forming the same

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US6492216B1 (en) * 2002-02-07 2002-12-10 Taiwan Semiconductor Manufacturing Company Method of forming a transistor with a strained channel

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Also Published As

Publication number Publication date
GB2411768A (en) 2005-09-07
US7701019B2 (en) 2010-04-20
US20060138479A1 (en) 2006-06-29
US7001837B2 (en) 2006-02-21
GB0512330D0 (en) 2005-07-27
KR101023208B1 (ko) 2011-03-18
CN1762056A (zh) 2006-04-19
DE112004000146T5 (de) 2006-02-02
US20040142545A1 (en) 2004-07-22
WO2004068586A1 (en) 2004-08-12
DE112004000146B4 (de) 2010-05-06
KR20050086961A (ko) 2005-08-30
CN1762056B (zh) 2011-06-01
JP2006517343A (ja) 2006-07-20

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Date Code Title Description
PE20 Patent expired after termination of 20 years

Expiry date: 20240112