GB2338107A

GB2338107A - Buffer layers for semiconductor devices

Info

Publication number: GB2338107A
Application number: GB9911467A
Authority: GB
Inventors: R Scott Kern; Changhua Chen; Werner Goetz; Gina L Christenson; Chihping Kuo
Original assignee: Hewlett Packard Co
Current assignee: HP Inc
Priority date: 1998-06-05
Filing date: 1999-05-17
Publication date: 1999-12-08
Also published as: GB9911467D0; TW398084B; DE19905517B4; DE19905517A1; JP2000036620A; KR20000005908A

Abstract

A semiconductor device such as an LED includes a substrate, a buffer or nucleation layer (16, Fig 4B) and an active layer. The nucleation layer is fabricated at a relatively low temperature, and includes at least one layer made of a III-V nitride compound containing indium. In a multilayer buffer structure, at least one of the buffer layers, preferably the one directly deposited on the substrate is made of an indium-containing III-V nitride compound. In subsequent AllnGaN epitaxy, the indium-containing layers relax. Reductions in stress and cracking result, allowing more flexibility in composition and doping modulation. Since the electrical and optical properties of the device depend on the stress and strain states present in its active structure, these properties can be tailored by controlling the composition and layer thickness of the nucleation layer. Indium-containing nitrides having advantageously high quality can be grown at relatively low temperatures.

Description

2338107 SEMI-CONDUCTOR DEVICES

The invention generally relates to the field of semiconductor devices and their fabrication. More specifically, the invention relates to thin-film deposition of layers on combinations of different substrates andlor existing layers and to a multilayered indiumcontaining nitride buffer layer for nitride epitaxy. The invention has particular applicability to optoelectronic devices such as Light-Emitting Diodes (LEDs).

BASIC CONCEPTS The process of semiconductor fabrication generally involves starting with a substrate. such as a silicon wafer, and depositing a series of patterned layers on the wafer. The layers may include doped semiconductor material, insulating layers such as oxides, etc. The patterns are produced using techniques such as photoresist masking, etching, etc.

The patterned layers make up an active structure which has the circuit elements and the functionality desired by the circuit designer. The patterns define circuit devices and interconnections between the devices, such that the resultant semiconductor device has that functionality.

1. FILM COMPOSITIONS Silicon (Si) and Germanium (Ge). both from column IV of the Periodic Table of the Elements. are common materials used in semiconductor fabrication. In particular, many substrates are made of silicon. Other substrate materials include sapphire (A1,0.,-). Gallium Arsenide (GaAs), and silicon carbide (SiC).

Materials commonly used for layer fabrication of semiconductor devices, particularly optoelectronic devices.. are combinations of elements from columns lit and 2 V of the Periodic Table, commonly referred to as 9 1 W' compounds. Column Ill elements include Aluminum (AI), Gallium (Ga), and Indium (in). Column V elements include Arsenic (As), Phosphorus (P), and Nitrogen (N). Perhaps the most commonlyused 111-V compound is gallium arsenide (GaAs).

A class of 11 W compounds, collectively referred to as Nitrides, are used in producing the patterned layers. In particular, nitrides have proven to be useful for lightemitting diode (LED) technology.

A nitride compound includes one or more column Ill elements, together with Nitrogen (N) from column V. For instance, if only gallium from column Ill is used, then the nitride compound is gallium nitride (GaN). However, it is also common to include a mixture of column 111 elements. Such compounds are then given as, for instance, I n,Ga,,N or AIXGal,N, where the subscripts (which sum to 1) have values which reflect the ratios of column Ill eiements used.

Many of the materials listed above have also been used in the deposition of the patterned layers making up the active structure. As one example of many, Takeuchi et a[., United States Patent 5,389,571, Wethod of Fabricating a Gallium Nitride Based Semiconductor Device with an Aiuminum and Nitrogen Containing Intermediate Layer," describes a device having, as part of its active structure, a crystal of (Gal-,Aix)l-yinyN nitride material.

2. FILM LATTICE PROPERTIES In general. semiconductor materials are in the form of crystalline lattices. This means that the atoms making up the material are arranged in regular patterns, such as rows. pianes. and unit cells. Numerous different lattice configurations are possible. The particular lattice formation in a given case is a characteristic of the material making up the lattice. Various factors, such as the ionic radii of the element or elements making up the material, influence what sort of crystalline lattice configuration a given element or compound will take.

3 In particular, where thin film semiconductor material is deposited on a substrate, an essentially planar film-substrate interface forms. In the case of nitride compounds, the most commonly observed lattice configuration is hexagonal, or'Wurtzitic." FIG. 1 shows the simplest representation of a hexagonal crystal lattice unit cell. The unit cell takes the form of a hexagonal prism, having a hexagonal cross-section in a plane (designated "hohzontal" for reference), and running axially in a direction (designated "vertical") perpendicular to the horizontal plane.

In order to describe a particular location in a hexagonal coordinate space, four axes are used. Three of the axes are in the horizontal plane, at 120' angles to each other. and are called a.. a2, and a,. A fourth axis, designated c, is-in the vertical plane.

It is common notation to refer to planes in this coordinate system using a notation ( a', a'2 a', a',,) where the values a',, a'2, a'3, and a'4 refer to the inverse of the coordinates along a given axis where the plane intersects that axis. In the case where a plane does not intersect an axis (that is, where the plane is parallel to the axis), the value used is 0. For example. one of the easiest and most convenient planes to define is the top plane. which intersects the top surface hexagon of the unit cell. That plane, commonly referred to as the "basal plane," is parallel to all three of the a axes. The basal plane's planar notation, accordingly, is (0001).

The lattice making up the film in a semiconductor device is often described in terms of such lattice parameters. Nitride films generally form in the hexagonal lattice structure. with the basal plane oriented parallel to the substrate surface, and to the interface between the substrate surface and the film. Thus, it follows that the "a-axis" refers to any of three directions parallel to the film-substrate interface and separated from each other by 120 c. The "c-axis" refers to a direction perpendicular to the filmsubstrate interface.

Crystalline lattices, such as the film layers to be described in this specificabon, are described in terms of parameter values, such as a '1attice constant' and a "thermal 4 expansion coefficierif' (described in detail below). These parameter values are given in connection with the aand c-axes of the hexagonal coordinate system.

However, many thin film crystalline lattice parameters do not differ in the various a-axis directions so as to require more than one axis parameter for their description. Accordingly, one parameter value suffices to describe the interface-parallel properties of the film lattice. In the case of hexagonal crystal systems such as nitrides, only one aaxis parameter is used.

In general, however, the properties of the film lattice in the direction perpendicular to the flim-substrate, interface differ from those in directions parallel to the interface. Therefore, a c-axis parameter generally has a value different from that of the corresponding a-axis parameter.

The parameters associated with the a- and c-axes of a film lattice generally relate to spacing between adjacent atoms of the same kind (that is, Ga-Ga or N-N separation distances) in the lattice structure along the direction(s) prescribed by the axes.

One parameter is the lattice constant, a measure of the atomic spacing.

Another is the thermal expansion coefficient, which is the expansion or contraction of the lattice parameter in response to changes in temperature, given in terms of the spacing change per degree of temperature change.

As stated above, lattices form in accordance with the properties of the particular substances making up the lattice. In particular, the ionic radii of the atoms determine the sPacina. and hence determine the values of the a- and c-axis parameters.

However. where a film is newly formed on a substrate or on an earlierdeposited film. the a-axis parameter of the new film tends to follow the a-axis parameter of what is beneath i+. The underlying lattice forces the new layer's a-axis parameter to be different from the a-axis parameter which the new film would otherwise have. Therefore, a stress is imposed on the new film.

Additionally, where the a-axis parameter of a newly deposited film is influenced by the underlying lattice structure, the film's c-axis parameter is likewise affected. Here again, a stress is imposed on the new film's lattice.

A thin film layer is said to be "in registry" if its lattice is laid out compatibly with the lattice below it. That is, the atomic planes are continuous across the interface between the two materials, without distortion. Where the lattices are different, the film cannot remain in registry without experiencing some such stress. That is, the atoms making up the film lattice may be squeezed closer together, or pulled farther apart, then they would be absent the registry stress.

Lattices which are stressed so much that they cannot remain in registry tend to include dislocations, which are a type of lattice structural defect. Where a sufficiently large difference in an a-axis lattice parameter between the substrate and the film exists, the film lattice tends to relieve the stress by dislocating - in effect, by "skipping a row" or '7inserting an extra row" of atoms - so that the next row of film lattice atoms can line themselves up with the substrate lattice. While dislocations are, to some extent, inevitable on mismatched lattice interfaces, it is desirable to minimize them. Due to the large mismatch between the nitride materials and the substrates commonly used, dislocations occur quite frequently in the nitride film layer.

It will also be the case that randomly placed point defects occur as lattice structures form. A point defect can be a vacancy in the lattice at a position where an atom should be. an impurity atom taking the place of an atom of one of the lattice matrix elements. etc. Point defects should also be minimized. Cleanliness in the fabrication facility and finely controlled fabrication environmental conditions help to minimize point defects.

3. FILM FABRICATION TECHNIQUES A common technique for depositing layers is called "epitaxy." That is, layers are said to be deposited "epftaxially," and the layers themselves are said to be "epitaxial" 6 layers. In this technique, the layer of material is deposited, essentially atom-by-atom, from the ambient environment onto the surface of the substrate. The material forming the epitaxial layer crystallizes into a lattice according to h own properties or to the properties of the undedying layer, as discussed above.

Examples of such techniques include organometallic vapor phase epitaxy, molecular beam epitaxy. and hydride vapor phase epftwcy. (By contrast, a non-epitaxial technique would be one in which a pellet of material were placed on the substrate, and the device were heated so that the pellet melted onto the surface of the substrate.) Both epitaxy and other types of fabrication steps generally take place at temperatures hundreds of degrees (Celsius) higher than room temperature, but, depending on the type of step and on the type of material to be deposited, there can be considerable variation in the temperatures.

One of the issues in developing fabrication processes is ordering the steps such that a temperature required for a later step is not detrimental to the results of an earlier step.

STATEMENT OF THE PROBLEM TO BE SOLVED

In developing a semiconductor fabrication process, there are various issues which must be addressed. in order to ensure that the semiconductor devices produced by the fabrication process are of adequate quality. In general the term "quality," when applied to semiconductor fabrication. refers to the proper functionality and reliability of the fabricated semiconductor device.

For quaiity semiconductor fabrication, it is necessary that the various layers adhere to each other and to the substrate. This is necessary both for good electrical characteristics and for good mechanical structure.

Also. the quality of a semiconductor device is related to the condition of the crystalline lattices making up the device. Defects in the structure of the lattices are detrimental to the quality of the device. Therefore, where lattice stresses are imposed 7 on fabricated film layers, as discussed above, it is necessary to limit, or at least control, the effects of that stress on the film lattices. A complication, of particular concern when dealing with nitride epitaxy, is the problem of cracking. Cracking arises when epitaxial films are pulled in tension, i.e., subjected to stresses such as those discussed above. Generally, cracks are perpendicular to the film-substrate interface. There can be several possible reasons for such cracking: lattice mismatch between substrate and film due to differences in lattice configuration between the substances making up the substrate and the film, thermal expansion coefficient mismatch between the materials making up the substrate and the film, high doping levels in the materials, and lattice mismatch due to intentional compositional modulations, that is, changes in the chemical makeup of the fabrication materials, which are deliberately introduced during the growth of a nitride device. For instance, growth of AlinGaN layers, without the benefit of a buffer layer, at typical growth temperatures, greater than. 1100 Q results in films consisting of a mosaic assemblage of hexagonal nuclei. These layers exhibit a very rough morphology and very high background donor concentrations. As a consequence, they have characteristics (i) and (iii), and are prone to cracking.

LATTICE AND THERMAL EXPANSION COEFFICIENT MISMATCHES A semiconductor material is characterized by a lattice constant, a mathematical characterization of the crystalline structure of the material. Also, as does any other material. a semiconductor material has a thermal expansion coefficient, a measure of how much the material expands or contracts, with temperature changes. Layers adliacent to each other should have identical or compatible lattice formations for good adherence. Incompatible lattice formations result in poor 8 adherence, making the layers subject to separation, thereby degrading the electrical characteristics.

Also, adjacent layers should have thermal expansion coefficients as similar as possible, so that temperature changes do not result in layer separation as one layer expands more than the other does. This is particularly important, since fabrication of semiconductor devices generally takes place at much higher temperatures than does storage and use of the devices. As the finished devices cool to room temperature, considerable thermal contraction takes place.

CONVENTIONAL LED STRUCTURES; BUFFERING LAYERS - Nithde-based LEDs typically comprise (i) a substrate, (ii) a nucleation, or buffer, structure, and (iii) an active structure. The present invention pertains to the buffer structure. Accordingly, the drawings which show device structures include both an overall diagram showing the buffer structure as a single layer, and a "magnifier," centered on the single-iayer buffer structure and providing a magnified, detailed view of the structural makeup of the buffer structure.

The prior art and inventive drawings give representative layer thicknesses, in Angstrom units (A). These values, or others which would suggest themselves to Persons skilled in the art. may be used.

Also. in the discussion which follows, the layers will be described as being disposed" on each other. The term "disposed" is not intended to make any structural limitation other than that the one layer is fabricated or positioned on top of the other javer. The term is broadly inclusive of structures created by any fabrication technique which would be known or regarded as suitable by a person skilled in the art, based on the present specification. The only limitation, express or implied, in connection with this specification. has to do with the relatively low and high temperatures for buffer layer fabrication and active layer epitaxy, etc., as described.

9 Since the invention has applicability to LED technology, a somewhat detailed illustration of an active LED structure is given as an illustrative example. The LED active structure includes an active layer between n-type and p-type layers, and contacts. It will be understood, however, that these elements are not essential to the invention.. but are merely illustrative examples.

FIG. 2: A CONVENTIONAL DEVICE A schematic diagram of a conventional semiconductor device, specifically a aeneric nitride LED, is shown in FIG. 2. The substrate is shown as 2, and the nucleation or buffer structure is shown as 4. The substrate 2 may- be sapphire (A1203), silicon carbide (SiC), etc. The active structure is generally shown as 6.

The circuit elements, interconnections, etc., are fabricated within the active structure 6. The specifies of the active structure are not essential to the invention, so active structures will not be discussed in great detail, except for an example here.

The active structure 6 of a typical LED, shown in this case, includes an active region 8 between a p-type layer 10 and an n-type layer 12. The layers 10 and 12 include the circuit elements, interconnections, etc., and bear contacts 14 and 16, respectively. The term "active region" is commonly used in the LED field. Here, the term "active structure" is used to cover the layers 8, 10 and 12, and the contacts 14 and 16, as well as other circuit elements and structures which may be included in other devices employing buffering. either conventionally or in accordance with the invention to be described herein

One effective method that has conventionally been used for controlling cracking, morphology, and background carrier conductivity is the insertion of the buffer structure 4. The buffer structure 4 contains a layer, which called a buffer layer or a nucleation layer, terms which will be used synonymously.

For a device fabricated on a sapphire substrate, the buffer layer is typically deposited at 400-900 c C. If the substrate is silicon carbide (SiC), then the buffer layer deposition may take place at even higher temperatures (e.g., above 900 0 C). These temperatures, nevertheless, are generally lower than temperatures used for other types of depositon steps, such as epitaxy, but need not exclude deposition at temperatures above those used in other deposition steps.

Nucleation layers or buffer layers are deposited prior to growth of additional layers, such as the active structure 6. The layers making up the active structure 6 are often deposited at much higher temperatures than those used for the buffer layers. The quality of those additional layers, such as epitaxial nitride films, is dramatically improved if buffer layers have been fabricated beneath the additional layers.

Conventionally, buffer layers include one of the binary compounds AIN and GaN, or some A1GaN composition intermediate to these two binaries. More precisely, the intermediate composition is notated Al,Gal-,,N, where x is a value between 0 and 1.

The insertion of such a low temperature layer provides the means by which drastic differences in (i) lattice parameter, (ii) thermal expansion, (iii) surface energy, and (iv) crystallography between the sapphire substrate and the nitride epilayer, are overcome. However, such conventional buffering layers have limitations, which will now be discussed.

DOPING AND COMPOSITIONAL MODULATIONS In typical nitride-based devices, the film layers are heavily doped. Dopant concentrations often exceed 1 T' 101' cm in typical optoelectronic devices.

Typical nitride-based devices also exhibit several compositional heterointerfaces. Nearly all electronic and optoelectronic devices consist of layers of differing composition deposited one on top of another. A heterointerface is an interface between two such layers of differing composition. For example, layers of GaN, A1GaN, and InGaN of various compositions, conductivity types, and thicknesses are deposited in direct interfaces with each other to produce optoeiectronic devices such as LEDs.

11 The doping and heterointerfaces both influence lattice parameters. Data for the a- and c-axis lattice parameters, and thermal expansion coefficients for the nitrides and the common substrates (SiC and sapphire) are shown in Table 1 (FIG. 3).

Cracking presents a considerable problem when GaN layers are doped n-type with silicon. Si atoms take the places of Ga atoms in the crystalline lattice. Si has an ionic radius more than 30% smaller than that of Ga.. As a consequence, the Si atoms are "too small" for the spaces they occupy in the lattice, and the extra space around the Si atoms weakens the lattice by creating stress and strain fields in the crystal.

Cracking also presents a problem when layers of differing compositions are deposited on one another. Cracking is especially troublesome when the layer grown on top has a smaller a-axis lattice parameter than the layer on which it is grown, due to the very rigid elastic constants exhibited by the 111-V nitrides.

Additionally, heterostructures consisting of nitride layers generally exhibit registry along the a-axis. the axis that is parallel to the substrate-film interface. Thus, when a layer has a smaller related a-axis parameter than the layer on which it is grown, tensile stress is induced in that layer in order to keep the interface in registry.

CONCLUSION

While the problems associated with lattice and thermal mismatch can be adequately addressed using existing nucleation layer technologies and by controlling the heating and cooling conditions associated with growth, cracking due to doping and compositionai fluctuations cannot be solved by such methods.

Therefore. there remains a need for a semiconductor device, and for a method for fabricating such a device, which overcomes the problem of cracking due to doping and compositional fluctuations.

12 It is therefore an object of the invention to provide a 111-V nitride semiconductor device which is formulated to achieve high quality layers and devices, and to overcome the problem of cracking due to doping and compositional fluctuations in these layers and devices.

It is a further object of the invention to provide a semiconductor device which is formulated to overcome all of the cracking problems discussed above.

To achieve these and other objects, there is provided, in accordance with the invention. a semiconductor device having, generally, a substrate, an active structure, and a buffer structure between the substrate and the active layen- The buffer structure includes one or more layers. Specifically, in a multilayer structure. at least one of these layers, preferably the one directly deposited on the substrate. is made of a 111-V nitride compound, in which the column 111 content is entirely or partially made up of indium. in accordance with the invention, that indium-containing layer serves as a buffer layer.

It has been found that a 111-V nitride buffer layer containing indium, in accordance with the invention, presents advantageous reduction in cracking, because the strain present in the active structure is modulated.

The invention is advantageous for use in AlinGaN epitaxy. By nucleating nitride films on these buffer layers, reductions in stress and cracking result, due to relaxation by the InN-containing layers. allowing more flexibility in composition and doping modulation.

Since the electrical and optical properties of the nitrides depend on the stress and strain states present. these properties can be tailored by controlling the composition and layer thickness of the nucleation layer.

The column 111 material can be entirely indium, making the buffer layer compound InK More broadly, the buffer layer may be any suitable Aluminum Gallium Iridium 13 Nitride intermediate. Such an intermediate is given generally as AI. InyGal-X-YN, where 0:5 x: 1 and 0 < y:5 1.

Specific quantities of the various column Ill elements will be given below, in connection with the discussion of the various embodiments of the invention. Experimentation has demonstrated that these particular ratios produce buffer structures which work well. However, the invention is broadly conceived to encompass other compositions and thicknesses.

Additionally, since high quality InGaN layers can be grown at temperatures much lower than those used for GaN, AIN, and A1GaN (less than 800 C versus greater than 1000 C). buffer layers containing InN and InGaN exhibit an advantageously high structural quality. not achieved in prior art fabrication technology.

Further in accordance with the invention, the buffer structure includes a cap layer on top. The cap layer may be GaN, AIN, or a suitable AlinGaN intermediate. In general, a 111-V nitride buffer layer containing a given fraction of indium may be capped by a 11 1-V nitride cap layer containing a lesser fraction of indium, where the fractions are suitably chosen for the temperature of the subsequent epitaxy step.

The cap layer provides the additional advantage that, in the fabrication process where a high-temperature active structure deposition step follows deposition of the buffer structure. the cap holds the rest of the buffer structure in place, and protects it from detrimental effects brought about by the high temperature.

It is also believed that the subsequent changes in the strain state created by using multistep nucleation layers will also have a beneficial effect on the electrical Properties. as well as the performance of an LED device according to the invention.

FIG. 1 is a schematic perspective view of a crystalline lattice and axes associated with the lattice.

14 FIG. 2 is a schematic diagram showing the fabrication of a conventional nitride LED.

FIG. 3 is a table, also designated TABLE l," giving parameter values for nitride and substrate materials.

FIG. 4 is a schematic diagram showing the fabrication of a nitride LED according to a first, basic embodiment of the invention.

FIGs. 5 and 6 are schematic diagrams showing the fabrication of nitride LEDs according to a first class of embodiments of the invention, the embodiments having multiple buffer layers.

FIGs. 7. 8. 9. and 10 are schematic diagrams showing the-fabrication of nitride LEDs according to a second class of embodiments of the invention, the embodiments having a cap layer.

FIG. 11 is a graph. called a "SIMS depth profile," showing characteristics of the device of FIG. 9.

FIG. 12 is a table. also designated 7ABLE ll," giving measurements from the device of FIG. 9.

FIGs. 13, 14. and 15 are schematic diagrams showing the fabrication of nitride LEDs according to a third class of embodiments of the invention, the embodiments having repeating (or nearly repeating) substructures within the buffer structure.

FIG. 16 is a table. also designated 7ABLE Ill," giving performance data from several devices according to the invention.

FIG. 17 is a table. also designated 7ABLE IV," showing further performance d ata.

In accordance with the invention, a iow-temperature nucleation layer is made up of several distinct layers of differing composition. Specifically, in a multilayer structure, at least one of these layers, preferably the one directly deposited on the substrate, is made up of an indium-containing nitride to serve as a buffer layer for use in AlinGaN epitaxy.

In general, the invention may be embodied two ways. They have in common a nitride compound buffer layer, containing indium, disposed directly on the substrate. By contrast, conventional buffer layer compounds have only included aluminum or gallium from column Ill. The two ways of embodying the invention differ in that the buffer layer is, on the one hand, InN (including only indium from column 111) and, on the other hand, a compound containing indium along with another column Ill element, preferably gallium. That compound. for instance, may be formulated as Ga,, In,,N, where 0 < x < InN melts around 1100 C, nearthe temperature used for GaN epitaxy. However, since the indium and nitrogen atoms bond relatively weakly with each other, an InN lattice may decompose at, or even somewhat below, this temperature. Consider, for instance, a case where. after an InN buffer layer is deposited, a subsequent step of GaN epitaxy takes place for the formation of a layer of an active structure. Because of the relatively high temperature of the GaN epitaxy step, the underlying InNlayer melts or "relaxes." This relaxation of the underlying InN buffer layer decreases the tendency toward cracking by providing a degree of compliancy between the substrate and the film.

Because of the relatively low melting points of InN and the other indium compounds used in accordance with the invention, it has been found desirable to provide a cap layer, preferably GaN. immediately above the indium-containing buffer iaver. As the indium-containing layer relaxes during the high-temperature epitaxy step, the inN layer is confined by a cap layer of material which remains solid at that temperature range. For brevity, this specification will refer to InGaNIGaN buffer layers, or the like. with the understanding that the structure being described is actually, e.g., an inGaN buffer layer beneath a GaN cap layer. Both the buffer layer and the cap layer are part of the overall buffer structure, between the substrate and the active structure.

16 EMBODIMENTS There are numerous possible embodiments of the invention. Many of the embodiments lend themselves well to categorization into classes of embodiments. A first, basic embodiment of the invention will be described, and then other classes of embodiments will be described as variations or elaborations upon the basic embodiment.

THE FIRST EMBODIMENT: A SINGLE BUFFER LAYER (FIG. 4) FIG. 4 illustrates the invention, in its simplest embodiment, has a single buffer layer 16, identical to that of FIG. 2, except that, in accordance with the invention, the buffer layer 4 is made of an indium- containing nitride compound.

In general, the indium-containing 111-V nitrides used in accordance with the invention are of the form Al,,In,Ga,,_^ where 0 < y:5 1 and 0: x:5 1. That is, the compound may contain aluminum andlor gallium in addition to the indium.

in addition to this basic buffer structure, numerous embodiments of the invention have buffer structures including multiple layers, some or all of the layers serving as buffer layers. Several such embodiments will be categorized into classes, and the classes of embodiments will be illustrated and discussed.

FIRST CLASS OF EMBODIMENTS: MULTIPLE LAYERS FIG. 5 shows a buffer structure in which a first buffer layer 18 is disposed directly on the substrate. and a second buffer layer 20 is disposed on the first buffer layer 18. As per the chemical formulas given in FIG. 5, both layers are indium-containing nitride compounds. but the exact ratios of column ill elements are different for the two layers. The first layer 18 can be InN, containing no AI or Ga. The column Ill portion of the second layer 20. however, is not pure indium, but can be either pure AI or pure Ga. In any event. the second layer 20 contains less indium then the first layer 18 does.

17 FIG. 6 shows a buffer structure similar to that of FIG. 5, except that a third buffer layer 22 is disposed on the second buffer layer 20. As per the chemical formulas given in FIG. 6, the first buffer layer 18 contains some indium, the second buffer layer 20 contains less indium than the first layer 18, and the third buffer layer 22 still less.

The embodiments of FIGs. 5 and 6 may be thought of as a first class of embodiments of the invention. Embodiments in this first class have a plurality of indium-containing buffer layers. While examples of two- and three-layer buffer structures have been shown, additional buffer layers may also be used.

However, this class of embodiments has in common that all layers are formulated such that they serve as buffers, by relaxing, at the temperatures of subsequent fabrication steps such as epitaxy. Other classes of embodiments, described below, have additional types of layers within their buffer structures.

SECOND CLASS OF EMBODIMENTS: CAP LAYERS: FiGs. 7,8,9, AND 10 FIGs. 7. 8, 9, and 10 illustrate a second class of embodiments of the invention. In these embodiments, the buffer structure includes a cap layer disposed above the buffer layer or layers.

In FIGs. 7 and 8, the buffer structures are given in terms of generic chemical compositions. FIGs. 9 and 10 correspond in structure with FIGs. 7 and 8, respectively, except that FIGs. 9 and 10 give concrete examples of devices that have been made and used.

A cap layer is preferably provided where the overall fabrication process includes a high-temperature step. such as an epitaxy step, which takes place after the buffer structure is fabricated. The already-deposited indium-containing buffer layer relaxes under the high temperature. The cap layer advantageously confines the indiumcontaining material in position (see, generally, FIGs. 7 and 8). Accordingly, cap layers are fabricated from 11 I-V nitride materials which better tolerate the high temperatures of later fabrication steps. Gallium Nitride (FIGs. 9 and 10) is a preferred cap layer 18 material, although, depending on the temperature of the epitaxy step, the cap layer may contain indium or other category Ill elements.

Referring now to FIG. 7, there is shown a first embodiment of the cap layer class. An indium-containing buffer layer 24 is covered by a cap layer 26 whose formulation is given in terms of the general 111-V nitride formula used above. The indium-containing buffer layer 24 can have any of the chemical formulations given above. In general, the cap layer 26 contains a lesser quantity of indium, chosen to reduce the tendency to relax at the temperature of later fabrication steps.

In the particular example of FIG. 9. however, a relatively small indium content, only up to 20% indium. the rest gallium.. is provided in the buffer layer 24. The thickness given has been used successfully, although the precise thickness given is not critical to the invention, and other thicknesses may be used. Data related to thicknesses, provided below, elaborates on the performance of structures fabricated in this manner. This formulation is suitable for a device whose active structure is to be fabricated at high enough temperatures that the buffer layer 24, even with a relatively modest amount of indium. still relaxes.

FIG. 8 shows another cap layer embodiment in which there are two buffer layers 28 and 30 disposed below a cap layer 32. Again, the buffer layers 28 and 30 and the cap layer 32 are given in terms of the general formulas for chemical composition. The first buffer layer 28 (directly on the substrate) is high in indium, for good relaxation. The second buffer layer 30 contains a mixture of column Ill elements less rich in indium.

Again. FIG. 10 shows a more specific structure. A pure InN layer 28 is provided for maximum relaxation and stress relief. an intermediate layer 30 having less indium is provided for better stability at the high temperature, and a GaN cap layer 32 is provided for confining the lower two layers 28 and 30 at the high temperatures. A cap layer of GaN tolerates such high temperature fabrication steps well. In the particular example shown. the middle layer 30 is indium gallium nitride, where the indium content is, again, 19 only up to 20%, to provide a good balance of relaxation and structural stability at a high active structure fabrication temperature..

FIG. 11 presents experimental data on the embodiment of FIG. 9, in the form of a "SIMS depth profile." The acronym SIMS stands for Secondary Ion Mass Spectrometry. A SIMS plot graphs secondary ion count as a function of depth below the surface of the device.

This SIMS depth profile is a graph showing the N and In traces from a SIMS profile of a single, n-type (Si-doped) GaN layer grown on the nucleation layer depicted in FIG. 9. An InGaN buffer layer interfaces with a sapphire substrate at a depth of about 0.8 pm.

Ion counts are provided for two elements, nitrogen and indium. The nitrogen curve is constant over most of the domain of the graph. This is intuitively reasonable, since most of the domain corresponds with nitride layers. The film contains about 50% nitrogen, and the substrate contains essentially no nitrogen. Therefore, the depth where the nitrogen counts drop off abruptly, at about 0.8 pm, is the substrate-film interface.

The graphs are plotted according to a logarithmic scale, so that the peaks in the indium curve, from a depth of 0.0 pm to about 0.7 pm are merely noise, about one onethousandth of the magnitude of the indium peak at around 0.8 pm. The conspicuous indium peak at 0.8 pm corresponds with the buffer layer, indicating that indium is incorporated and retained within the structure.

Since indium was provided for film growth in the ambient environment only during the growth of the inGaN portion of the InGaNIGaN buffer structure, the indium signal indicates the location and presence of the InGaN portion of the multilayered buffer layer. Additional confirmation that the indium is present at the film-substrate interface is provided by the fact that the indium signal peaks at the same depth where the nitrogen signal decreases.

The indium peak at the substrate-film interface also indicates that the cap layer (GaN in this case) holds the InGaN buffer layer in place.

FIG. 12 is a table (designated 'TABLE W') of Van der Pauw Hall measurements, that is, measurements of conductivity characteristics of device layers relevant to the operation of semiconductor devices. The devices for which these results were obtained each have active layers GaKSi (that is, layers of GaN doped with Si), of similar thickness and doping level, over nucleation layers. Two sets of values are given, one for a conventional GaN nucleation layer, such as that of FIG. 2, and one for a device according to the invention as shown in FIG. 9, having InGaNIGaN layers.

A noteworthy difference is that the electron mobility, preferably as high as possible to realize the highest conductivity and lowest input drive current in the layers, is about 5% higher for the InGaNIGaN device of FIG. 9 according to the invention than for a conventional sample grown on a GaN buffer layer (FIG. 2).

The overall resistivity, preferably as small as possible, is smaller for the device according to the invention than for the conventional device. This advantageous difference is believed to be due either to a beneficial change in the strain state, or to a reduction in the dislocation andlor point defect densities of the GaWSi overlayer, and is the result of the use, in accordance with the invention, of InGaN/GaN composite nucleation layers.

THIRD CLASS OF EMBODIMENTS: BUFFER SUBSTRUCTURES: FIGs. 13,14, AND 15 A third class of embodiments is broadly characterized as having a sequence of bufter substructures. Each substructure is either identical or analogous to the others. The buffer structures in the embodiments already described may be used as examples of substructures that are repeated in the present class of embodiments.

FIG. 13 shows a buffer structure including two substructures 34 and 36, each substructure including an indium nitride buffer layer (38 and 40) and a gallium nitride 21 cap layer (42 and 44). That is, if the cap layer buffer structure of FIG. 9 is repeated twice, then the result is the structure of FIG. 13 In this class of embodiments, the invention will be described and claimed in terms of buffer substructures. In FIG. 13 for instance, the buffer substructures 34 and 36 are shown as the two two-layer substructures.

Also, layers, within a substructure, will be described and claimed as substructure layers. Referring again to FIG. 13 the two indium nitride buffer layers 38 and 40 will be called substructure buffer layers, and the two gallium nitride cap layers 42 and 44 will be called substructure caD layers.

Referring next to FIG. 14 there is shown a buffer structure including three substructures 46, 48. and 50. Each of the three substructures is a FIG. 9-type cap layer substructure, including an indium gallium nitride buffer layer (52, 54, and 56) and a gallium nitride cap layer (58, 60, and 62). The buffer layers are shown as being identical (that is. identical in thickness and in composition for a consistent value of x for all layers), although the composition may vary from one buffer layer to ano ther.

Finally, FIG. 15 shows a buffer structure having an indefinite number of substructures. A bottom substructure 64 and a top substructure 66 are shown. A gap 68 in between the bottom and top substructures 64 and 66 represents any desired number of additional substructures.

Each of the substructures of FIG. 15 includes two substructure buffer layers. The chemical makeup of the substructure buffer layers is given in terms of the general, indium-containing 111-V nitride formula, as discussed above.

The lower substructure layer (70 and 72) of each substructure (including the lower layer of the first substructure.. which is directly adjacent to the substrate) contains a first (relativeiy high) quantity of indium, the quantity being related to the value of the subscript parameter y,. That quantity can be as great as 100% of the column Ill composition of the material.. i.e.. the material can be indium nitride. The second 22 substructure layer (74 and 76) of each substructure contains a lesser quantity of indium.

Again, while the same formula, and the same x, and y, parameters are used for the lower layer of each substructure, these formulations may vary from one substructure to another. The same is true for the upper layers of the substructures.

OTHER EMBODIMENTS From the discussion of these embodiments of the invention, it will be understood that numerous other configurations are possible. For instance, several three-layer substructures. each in accordance with the three- layer buffer structure of FIG. 8, may be used. Also, a substructure may be used which is similar to that of FIG. 8, except that the chemical formulation of the substructure buffer layers of the various substructures may vary in chemical formulation, and that the thicknesses may also vary.

In general, a layer of a given chemical composition may serve as either a buffer layer or a cap layer, depending, in part, on its chemical composition. A layer serves as a cap layer if its material remains substantially solid and rigid under the high temperatures of later fabrication steps. This assumes, of course, that beneath this layer is a layer of material which relaxes or melts at those high temperatures. Also, the greater a given layer's tendency to relax, the better it serves as a buffer layer. Finally, just how high that high temperature gets may determine whether a layer of a given composition serves as a buffer layer or as a cap layer.

in most cases. buffer layer growth is initiated at a temperature much lower than that used for nitride films by growing the buffer layer directly on the sapphire substrate. Typically. a buffer layer deposited on sapphire is deposited at 400900' C, while the rest of the structure is deposited at 700-120W C. Also, the composite nucleation layer is capped in order to protect it during the ramp to higher temperatures for the remainder of the growth process. The aggregate nucleation layer thickness may be any value 23 which a person skilled in the field would consider suitable. However, the preferred thickness used has been about 250-300 A.

GENERAL NOTES ON FABRICATION TECHNIQUES Buffer layers and cap layers are grown at temperatures from 200 to 1000 11 C, preferably in the 400-600' C range. The distinct layers need not necessarily be grown at the same temperature. Also, other conditions can be varied. For instance, the ambient conditions, such as the pressure of the growth atmosphere, may be changed.

Ambient growth atmospheres generally include an ambient gas which is unreactive or otherwise does not take direct part in the layer formation process. Such gases include Ar, He. H2. N2, a mixture of H2and N2, etc. Such ambient gases, and others, may be used in various ratios, combinations, etc., in ways known to persons skilled in the art.

Finally, where the column Ill (and column V) elements to be deposited are provided within the ambient atmosphere, their ratios and quantities may also be varied, including the column V to column Ill ratio.

EXPERIMENTAL DATA LED devices have also been grown on specific examples of several of the buffer structures shown and discussed above. LED performance data from each of the structures are presented in TABLE Ill (FIG. 16).

Light output values are presented as percentage gains, relative to a standardized run using a prior art optoelectronic device such as that of FIG. 2. Standardized runs, grown in the same time frame, are 5-7% external quantum efficient, and emit light in the 485-505 nanometer (rim) wavelength range. As it is desirable to produce LED devices delivering the highest possible light output, the advantages of using the invention described herein will be evident.

24 Note that the different embodiments produce light wavelengths which vary over about 15 rim (compared with a wavelength differential on the order of 50 rim between adjacent colors in the visible spectrum). Persons skilled in the LED field know of fabrication techniques which may be used in conjunction with the invention, to adjust the light wavelengths to precisely desired values.

Previous research has shown that the amount of strain present in the device structure can alter the composition of the active, or lightemitting, region of the structure. As the active layer composition determines the emission wavelength, the wavelength shifts observed here are indicative of a change in the strain state of the structure.

In all cases. the device light output and efficiency are comparable to, or even greater than, that of conventional LED devices grown on GaN nucleation layers during the same period of time. In the specific case shown in FIG. 9, modulating the inN mole fraction in the InGaN portion of the nucleation layer can also be seen to affect the device performance.

Data presented in Table IV (FIG. 17) show that the light output is increased for LED devices according to the invention, relative to that of the prior art device (0.00 InN mole fraction). Also, the wavelength of the light produced is affected by compositional variations in the 100 A InGaN portion of the buffer layer (FIG. 9). The column headed "O.OW represents the performance of the prior art device of FIG. 2. As is the case with the data presented in FIG. 16, the data in FIG. 17 also shows the performance improvements and changes in the strain state achieved in accordance with the invention.

Similar shifts in light output and wavelength are observed when the thickness of this InGaN layer is changed. As in the previous case where electrical transport properties were measured. these results can be directly correlated to either strain state or microstructural improvements brought about by employing the nucleation layer according to the invention.

Claims

1. A semiconductor device comprising: a substrate (2); a buffer structure (4) disposed on the substrate (2), the buffer structure including a first buffer layer (16) disposed directly on the substrate, (2), the first buffer layer(16) being made of a first indium-containing nitride compound; and an active structure (6) disposed on the buffer structure (4).

2. A semiconductor device as recited in claim 1, wherein the first buffer layer (16) is made of a first indium-containing nithde compound selected from the set consisting of A1.1n,Gal,,N, where 0 < y:! 1 and 0: x:5 1.

3. A semiconductor device as recited in claim 1, wherein the buffer structure further includes a second buffer layer (20) disposed on the first buffer layer (18), the second buffer layer (20) being made of a second indium-containing nithde compound.

4. A semiconductor device as recited in claim 1, wherein the buffer structure further includes a cap layer (26). the second layer (26) being made of a second indiumcontaining nitride compound disposed above the first buffer layer (24).

5. A semiconductor device as recited in claim 4, wherein the cap layer (26) is made of gallium nitride.

6. A semiconductor device as recited in claim 1, wherein the buffer structure further includes a first buffer layering substructure (34).

26

7. A semiconductor device as recited in claim 6, wherein: the first buffer layering substructure (34) includes a substructure buffer layer (38) made of an indium-containing nitride compound; and the first buffer layer is included within the substructure buffer layer of the first buffer layering substructure.

8. A semiconductor device as recited in claim 6, wherein the first buffer layering substructure (34) includes: a substructure buffer layer (38) made of an indium-containing nitride compound; and a substructure cap layer (42) disposed above the substructure buffer layer (38).

9. A semiconductor device as recited in claim 8, wherein the substructure cap layer (42) is made of gallium nitride.

10. A semiconductor device as recited in claim 6, wherein the first buffer layering substructure (64) includes: a first substructure buffer layer (70) made of a first indium-containing nitride compound; and a second substructure buffer layer (74) made of a second indium-containing nitride compound disposed on the first substructure buffer layer (70).

11. A semiconductor device as recited in claim 6, wherein the buffer structure further includes a second buffer layering substructure (36) disposed on the first buffer layering substructure (34).

27

12. A semiconductor device as recited in claim 11, wherein the first and second buffer layering substructures each include, respectively: a substructure buffer layer (83, 40) made of an indium-containing nitride compound; and a substructure cap layer (42, 44) disposed above the indiumcontaining nitride layer.

13. A semiconductor device as recited in claim 11, wherein the respective substructure cap layer (42, 44) in each of the first and second buffer layering substructures (34, 36) is made of gallium nitride.

14. A semiconductor device as recited in claim 11, wherein: the first buffer layering substructure (64) includes a substructure buffer layer (70) made of a first indium-containing nitride compound; and the second buffer layering substructure (66) includes a substructure buffer layer (72) made of a second indium-containing nitride compound.

15. A semiconductor device as recited in claim 11, wherein the first and second buffer layering substructures (64, 66) each include, respectively: a first substructure buffer layer (74, 76) made of a first indiumcontaining nitride compound: and a second substructure buffer layer made of a second indium-containing nitride compound disposed on the first substructure buffer layer.

16. A semiconductor device subsity as herein described with reference to Figs. 4 to 17 of the accompanying dravAngs.