JP4174913B2 - Group III nitride semiconductor light emitting device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a group III nitride semiconductor light emitting device manufactured by forming a laminated structure made of a group III nitride semiconductor crystal on a silicon (Si) single crystal substrate, and in particular, a suitable buffer layer is provided on the substrate. In particular, the present invention relates to a group III nitride semiconductor light emitting device manufactured using a laminated structure made of a group III nitride semiconductor crystal having good crystallinity.
[0002]
[Prior art]
A laminated structure made of a group III nitride semiconductor crystal containing nitrogen (N) as a constituent element is used in light emitting elements such as light emitting diodes (LEDs) and laser diodes (LD) for short wavelength visible light emission.
Conventionally, a laminated structure made of a group III nitride semiconductor crystal used in the above light emitting device is exclusively a hexagonal sapphire (Al ₂ O _Three On the substrate made of a single crystal) or silicon carbide (SiC) single crystal, constituent layers having a multilayer structure are sequentially laminated.
[0003]
In contrast, recently, there has been an example in which a light-emitting element for emitting short-wavelength visible light is produced using a laminated structure made of a group III nitride semiconductor crystal formed on a Si single crystal substrate.
The Si single crystal is used for the substrate. If the Si single crystal having a diamond structure is used as the substrate, (1) [011] cleavage into the individual element (chip) using the cleavage in the crystal direction. This is because (2) a laser diode can be easily cut, and has an advantage that an optical resonance surface can be easily formed by cleavage. In addition, since the Si single crystal substrate has conductivity, there is an advantage that an ohmic electrode can be formed on the back surface of the substrate.
[0004]
However, the difference in lattice constant (lattice mismatch degree) between Si single crystal and, for example, wurtzite hexagonal gallium nitride (GaN), which is one of group III nitride semiconductors, reaches about 17%. .
For this reason, when a laminated structure made of a group III nitride semiconductor crystal such as GaN is directly formed on a Si single crystal substrate, it is difficult to obtain a flat laminated structure with excellent crystallinity.
[0005]
For this reason, a method of forming a laminated structure made of a group III nitride semiconductor crystal on a Si single crystal substrate via a buffer layer has been conventionally used. In this case, there is an example in which a layer made of aluminum nitride (AlN) is used for the buffer layer (Japanese Patent Laid-Open No. 10-242586).
In this prior art, the AlN buffer layer is formed at 840 ° C. However, when a single-layer AlN buffer layer is laid on a Si single crystal substrate as in this prior art, the flatness of the surface of the group III nitride semiconductor crystal layer stacked on the buffer layer is not necessarily ensured. It was the current situation that has not been achieved.
[0006]
As another conventional technique, an aluminum arsenide (AlAs) layer and a gallium arsenide (GaAs) layer are stacked on the (111) surface of a Si single crystal substrate, and the AlAs layer and the GaAs layer are oxidized to form AlO. _x Layer and the α crystal type gallium trioxide (α-Ga on it) ₂ O _Three ) Layer, an α crystal type GaN (α-GaN) layer having a flat surface can be deposited thereon (Appl. Phys. Lett., 73 (11) (1998), 1553 to 1555).
However, in this prior art that provides a flat GaN layer, an AlAs layer and a GaAs layer are stacked in advance on the surface of the Si single crystal substrate, and the AlAs layer and the GaAs layer are further oxidized to form an AlO layer. _x Layer and the α crystal type gallium trioxide (α-Ga on it) ₂ O _Three ), A complicated process such as forming a buffer layer is required.
[0007]
[Problems to be solved by the invention]
As described above, in order to form a group III nitride semiconductor crystal layer having a flat surface on a Si single crystal substrate by a conventional method, a group III-V compound semiconductor layer containing arsenic (As) is once formed into a Si single crystal. A buffer layer made of an oxide is formed on a Si single crystal substrate by depositing on the substrate and further oxidizing it, and a group III nitride semiconductor crystal layer such as a GaN layer is stacked through the buffer layer. A complicated process was necessary.
[0008]
The present invention has been made in view of the problems of the prior art. In order to form a laminated structure made of a group III nitride semiconductor crystal having a flat surface and good crystallinity on a Si single crystal substrate, the present invention is simple. The present invention provides a buffer layer having a novel structure that can be formed in the following manner.
That is, the present invention forms a laminated structure composed of a group III nitride semiconductor crystal having a flat and excellent crystallinity on a Si single crystal substrate through a buffer layer having a novel structure that can be easily formed. An object of the present invention is to provide a group III nitride semiconductor light-emitting device having excellent characteristics by utilizing many of the features in device fabrication obtained by using a substrate.
[0009]
[Means for Solving the Problems]
That is, the present invention relates to a laminated structure comprising an n-type conductive silicon (Si) single crystal substrate, a buffer layer formed on the substrate, and a group III nitride semiconductor crystal formed on the buffer layer. And the buffer layer includes an oxide of gallium (Ga) formed in contact with the Si single crystal substrate in an amount of more than 50% by weight. It has the oxide buffer layer which has this.
[0010]
Further, the present invention is characterized in that the buffer layer has a second buffer layer made of a group III nitride semiconductor formed on the oxide buffer layer.
[0011]
Further, according to the present invention, the oxide buffer layer includes a beta (β) crystal type gallium trioxide (β-Ga). ₂ O _Three ) In an amount of more than 50% by weight.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
The present invention has an n-type conductivity in which the buffer layer formed on the Si single crystal substrate contains more than 50% by weight of a gallium (Ga) oxide formed in contact with the Si single crystal substrate. It has an oxide buffer layer.
Ga oxides generally include Ga ₂ O (gallium oxide), GaO (gallium oxide) and Ga ₂ O _Three (See Galle sesquioxide) (see LA SHEKA et al., “THE CHEMISTRY OF GALLIUM” (ELSEVIER Pub. Co., 1966), pages 29-36). The same Ga ₂ O _Three However, from the crystal form, α-type (α-Ga ₂ O _Three ), Β-type (β-Ga ₂ O _Three ), Γ type (γ-Ga ₂ O _Three ), Δ type (δ-Ga ₂ O _Three ) And ε-type (ε-Ga ₂ O _Three ) Etc.
The gallium oxide constituting the buffer layer of the present invention is GaO or Ga. ₂ Whether it is O or not can be identified from the lattice spacing of the crystal by X-ray diffraction analysis or the like because the lattice constant of the crystal differs depending on the type of gallium oxide.
[0013]
The oxide buffer layer of the present invention contains more than 50% by weight of gallium (Ga) oxide. That is, the oxide buffer layer of the present invention includes, for example, Ga ₂ O _Three More than 50% by weight, Ga ₂ O _Three And indium oxide (In ₂ O _Three )). Ga containing more than 50% by weight of Ga oxide ₂ O _Three And a mixture of calcium oxide (CaO).
The oxide buffer layer containing more than 50% by weight of the Ga oxide is, for example, tri-methoxy gallium: (H _Three CO) _Three It can be formed by a chemical vapor deposition (CVD) method using Ga) as a raw material. It can also be formed by a physical deposition method such as a sputtering method using a gallium oxide powder pressed as a target.
[0014]
The oxide buffer layer of the present invention is composed of an oxide layer having n-type conductivity. Although the oxide buffer layer may have p-type conductivity, the oxide buffer layer has n-type conductivity in consideration of stable controllability of the specific resistance of the oxide layer. A layer is advantageous.
Further, corresponding to the oxide buffer layer being n-type, an Si single crystal having n-type conductivity is used for the Si single crystal substrate of the present invention. As the n-type Si single crystal substrate, Sb-doped or P-doped Si single crystal to which an n-type impurity such as antimony (Sb) or phosphorus (P) is added can be used. As the plane orientation of the Si single crystal substrate, the (001) direction, the (111) direction, or one having an off angle from the above direction can be used. The action or effect of the present invention can be obtained regardless of the plane orientation of the Si single crystal substrate.
[0015]
The thickness of the oxide buffer layer of the present invention is preferably in the range of several nm to several μm. When the thickness of the oxide buffer layer is 1 nm or less, the oxide buffer layer lacks continuity and cannot sufficiently cover the surface of the Si single crystal substrate. On the other hand, if the thickness of the oxide buffer layer is 10 μm or more, irregularities are generated on the surface of the oxide buffer layer, resulting in lack of flatness. Particularly in the present invention, the thickness of the oxide buffer layer is preferably 10 nm or more and 1 μm or less.
When a buffer layer made of aluminum nitride (AlN) is formed on a Si single crystal substrate as in the prior art, the surface of the GaN layer formed on the buffer layer is impaired in flatness. (Unexamined-Japanese-Patent No. 10-242586). However, a laminated structure made of a group III nitride semiconductor crystal having a flat surface and excellent crystallinity can be grown on the buffer layer of the present invention. That is, the buffer layer of the present invention has an effect of providing a laminated structure having excellent flatness and good crystallinity.
[0016]
Moreover, it is preferable that the buffer layer of this invention has the 2nd buffer layer which consists of a group III nitride semiconductor formed on said oxide buffer layer. The second buffer layer has the general formula Al _X Ga _Y In _1-XY It can be composed of a group III nitride semiconductor represented by N (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ X + Y ≦ 1). The second buffer layer has a structure composed of polycrystalline and amorphous.
Due to the interposition of the second buffer layer, the laminated structure formed of the group III nitride semiconductor crystal formed thereon has excellent continuity and flatness.
[0017]
As the buffer layer having the structure in which the second buffer layer made of a group III nitride semiconductor is formed on the oxide buffer layer, for example, α-Ga directly in contact with the Si single crystal substrate is used. ₂ O _Three In this case, a second buffer layer made of GaN is formed on the oxide buffer layer made of. In addition, γ-Ga ₂ O _Three There is also an example in which an oxide buffer layer containing more than 50 wt% is formed in contact with a Si single crystal substrate, and a second buffer layer is formed from aluminum nitride (AlN) on the oxide buffer layer.
The oxide buffer layer and the second buffer layer do not need to contain a common group III element.
[0018]
The group III nitride semiconductor constituting the second buffer layer can be grown by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or vapor phase epitaxy (VPE). The MOCVD method, the MBE method, and the VPE method are collectively referred to as a vapor deposition method in this specification. In order to grow the second buffer layer, the growth temperature is preferably set to 350 ° C. to 550 ° C. in common with the vapor phase growth method. By setting the growth temperature to 350 ° C. to 550 ° C., the second buffer layer can have a structure made of polycrystalline and amorphous.
The layer thickness of the second buffer layer is preferably in the range of 2 nm to 200 nm. The second buffer layer can be composed of either an undoped layer or an n-type impurity doped layer. As the n-type impurity to be doped, a group IV element such as silicon (Si) or tin (Sn), or sulfur (S ) And selenium (Se). The second buffer layer preferably has n-type conductivity.
[0019]
Further, according to the present invention, the oxide buffer layer includes a beta (β) crystal type gallium trioxide (β-Ga). ₂ O _Three ) In an amount of more than 50% by weight. This is β-Ga ₂ O _Three However, GaO and Ga ₂ O or α-Ga ₂ O _Three Β-Ga ₂ O _Three Ga other than ₂ O _Three This is because it is superior in stability at high temperatures.
The growth temperature of a laminated structure made of a group III nitride semiconductor crystal is generally a high temperature of 1000 ° C. or higher. β-Ga ₂ O _Three Has sufficient stability to withstand such high temperatures. On the other hand, Ga ₂ O decomposes at about 700 ° C., and α-Ga ₂ O _Three Is β-Ga at about 300 ° C. to about 600 ° C. ₂ O _Three Transformation into β-Ga ₂ O _Three Other oxides of Ga tend to lack the stability of the form at high temperatures. Therefore, β-Ga ₂ O _Three If the oxide buffer layer containing more than 50% by weight of the oxide buffer layer is formed, the loss or damage of the buffer layer due to thermal dissociation or sublimation of the oxide buffer layer may be reduced during the growth of the laminated structure composed of the group III nitride semiconductor crystal. Can be prevented.
[0020]
β-Ga ₂ O _Three In order to form an oxide buffer layer containing more than 50 wt% on the Si single crystal substrate, it is necessary to set the formation temperature of the oxide buffer layer to 600 ° C. or higher. For example, when an oxide buffer layer is formed by a CVD method using an organic Ga compound having a methoxy group as a raw material, α-Ga is formed on a Si single crystal substrate at a formation temperature of 500 ° C. or lower. ₂ O _Three Is mainly generated. Moreover, at temperatures around 400 ° C. to 500 ° C., γ-Ga ₂ O _Three Is mainly formed.
The oxide buffer layer in the as-grown state is β-Ga ₂ O _Three Instead of eg α-Ga ₂ O _Three When the oxide buffer layer is heated to at least 600 ° C. or higher, preferably 1000 ° C. or higher, β-Ga ₂ O _Three Can be converted to an oxide buffer layer containing more than 50% by weight.
[0021]
On the buffer layer of the present invention, a laminated structure made of a group III nitride semiconductor crystal is formed at a temperature higher than the growth temperature of the buffer layer. The crystal structure inside the buffer layer of the present invention may be amorphous, polycrystalline, single crystal, or a mixture thereof, but the laminated structure formed of the group III nitride semiconductor crystal formed thereon is In order to play the role of the functional layer of the light emitting element, it is necessary to form a single crystal having excellent crystallinity. For this reason, it is necessary to set the growth temperature of the laminated structure to be higher than that of the buffer layer and to form a laminated structure made of a single crystal group III nitride semiconductor.
[0022]
Group III nitride semiconductors are generally Al _X Ga _Y In _1-XY N (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ X + Y ≦ 1). In addition, group III nitride semiconductors containing arsenic and phosphorus other than nitrogen, that is, the general formula Al _X Ga _Y In _1-XY N _a M _1-a A group III nitride semiconductor represented by (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ X + Y ≦ 1, M represents a group V element other than nitrogen, and 0 <a ≦ 1) is also a laminated structure Can be used.
For example, an n-type conductive oxide buffer layer containing more than 50% by weight of Ga oxide in contact with an Si single crystal substrate is formed, and an n-type GaN layer is formed thereon as a lower cladding layer, n Gallium nitride indium (Ga _Y In _1-Y N: 0 ≦ Y ≦ 1) layer as light emitting layer, p-type Al _X Ga _1-X By sequentially laminating N (0 <X ≦ 1) layers as upper clad layers to form a laminated structure, a laminated structure for a light emitting element that emits short-wavelength visible light to near ultraviolet light can be formed. Furthermore, if an ohmic electrode is provided on the back surface of the Si single crystal substrate and the surface of the laminated structure, a group III nitride semiconductor light emitting device such as an LED or LD can be configured.
[0023]
【Example】
(Example 1)
Hereinafter, the details of the present invention will be specifically described with reference to the case of manufacturing an LED. FIG. 1 is a schematic cross-sectional view showing the structure of an LED according to the first embodiment.
[0024]
The LED of Example 1 was manufactured using an epitaxial wafer in which the laminated structure 106 was formed on the Si single crystal substrate 101 with the buffer layer 102 interposed therebetween. In the epitaxial wafer, an oxide buffer layer 102 is formed on an n-type Si single crystal substrate 101 doped with antimony (Sb) having a (001) plane, and a group III nitride semiconductor crystal is formed thereon. The structure layers 103, 104, and 105 of the structure 106 are stacked.
The above epitaxial wafer was produced as follows.
[0025]
After placing the Si single crystal substrate 101 in a general MOCVD reactor used for growing a thin film by MOCVD, 95 vol% argon (Ar) and 5 vol% oxygen (O ₂ ) In an atmosphere consisting of a mixed gas.
Then 8 × 10 ^-Five The amount of trimethoxygallium ((H _Three CO) _Three Hydrogen gas accompanied by vapor of Ga) is introduced into the reactor to form α-type gallium trioxide (α-Ga) having a layer thickness of about 10 nm. ₂ O _Three The oxide buffer layer 102 is deposited on the Si single crystal substrate 101 in contact therewith.
Apart from the production of this epitaxial wafer, (H _Three CO) _Three Α-Ga formed to be approximately 0.8 μm thick on a high-resistance Si substrate under the same conditions as above, with the same Ga supply amount ₂ O _Three The oxide layer of n has n-type conductivity according to the usual Hall effect measurement method, and its carrier concentration is about 10 ¹⁷ -10 ¹⁸ cm ^-3 Met. Further, according to the X-ray diffraction analysis, the oxide layer formed by the above method is α-Ga. ₂ O _Three Was 75% by weight or more.
[0026]
After the formation of the oxide buffer layer 102 was completed, the atmosphere was changed to the above-described mixed gas of argon and oxygen, and the temperature of the substrate 101 was immediately increased to 1050 ° C. The heating rate was set to about 80 ° C./min.
After the temperature rise, trimethylgallium is used as a Ga raw material, and ammonia (NH _Three The lower cladding layer 103 made of n-type GaN doped with Si was grown by a normal atmospheric pressure MOCVD method using a nitrogen source. The thickness of the lower cladding layer 103 is about 3 μm, and the carrier concentration is about 3 × 10 ¹⁸ cm ^-3 It was. The surface of the lower cladding layer 103 grown on the oxide buffer layer 102 was flat and excellent in continuity.
[0027]
After the growth of the lower cladding layer 103, the temperature of the substrate 101 is lowered to 880 ° C., and the n-type Ga having an average indium (In) composition ratio of 0.17 on the lower cladding layer 103 _0.83 In _0.17 The N layer was stacked as the light emitting layer 104 by the atmospheric pressure MOCVD method. The light emitting layer 104 is n-type and has a carrier concentration of about 7 × 10. ¹⁸ cm ^-3 And the layer thickness was about 9 nm.
In particular, the light emitting layer 104 is composed of a crystal layer having a multi-phase structure including a matrix phase and a sub-phase having a different indium composition ratio between the main phase and the main phase. The subordinate phase is mainly composed of substantially spherical microcrystals, and some subordinate phases (microcrystals) scattered in the main phase have a strained layer (strain region) on the outer periphery. It was.
After the growth of the light emitting layer 104, the temperature of the substrate 101 is returned to 1050 ° C., the aluminum (Al) composition ratio (X) at the bonding interface 104a with the light emitting layer 104 is 0.20, and the Al composition ratio on the surface is Magnesium (Mg) doped p-type Al with a layer thickness of 100 nm _X Ga _1-X The N layer was stacked on the light emitting layer 104 as the upper cladding layer 105 that also serves as a contact layer.
As described above, the light emitting part of the pn junction type double hetero (DH) junction structure including the n-type lower clad layer 103, the n-type multiphase light-emitting layer 104, and the upper clad layer 105 is provided. An epitaxial wafer for LED was produced.
[0028]
Each of the constituent layers 103, 104, and 105 of the laminated structure 106 constituting the light emitting portion could be made from a group III nitride semiconductor crystal having excellent surface condition and good crystallinity with flatness. In particular, no gap or the like was observed between the oxide buffer layer 102 and the lower cladding layer 103, and a laminated structure 106 having excellent adhesion could be produced.
[0029]
The LED has an Al composition gradient with the back surface of the Si single crystal substrate 101 of the epitaxial wafer fabricated as described above. _X Ga _1-X An n-type ohmic electrode 108 and a p-type ohmic electrode 107 were formed on the surface of the upper cladding layer 105 made of N, respectively, and then separated into devices. Both the p-type and n-type ohmic electrodes 107 and 108 were made of Al.
[0030]
A 20 mA operating current was passed in the forward direction between the p-type and n-type ohmic electrodes 107 and 108 of the LED obtained as described above to cause the LED to emit light. Blue-green light having a spectrum with a peak wavelength of about 470 nm and a half-value width of about 15 nm was observed from the LED.
The intensity of luminescence measured using a general integrating sphere was about 15 μW. Thus, in Example 1, a high-intensity group III nitride semiconductor light-emitting device was obtained.
[0031]
(Example 2)
In Example 2, an example in which an LED including a buffer layer including an oxide buffer layer and a second buffer layer made of a group III nitride semiconductor formed on the oxide buffer layer is manufactured. The present invention will be specifically described.
FIG. 2 is a schematic sectional view showing the structure of the LED according to the second embodiment.
[0032]
An epitaxial wafer for LED according to Example 2 was manufactured as follows.
First, an oxide buffer layer 102 mainly made of polycrystal was deposited at 480 ° C. on a Si single crystal substrate 101 having an n-type (001) plane doped with phosphorus (P).
The oxide buffer layer 102 includes gallium trioxide (Ga ₂ O _Three )) In a general vacuum deposition method using a powdery mixture as a deposition source. According to the result of X-ray diffraction analysis, the main component of the oxide buffer layer 102 is γ-Ga. ₂ O _Three The composition ratio was about 80% by weight. In the oxide buffer layer 102, other α-Ga ₂ O _Three And δ-Ga ₂ O _Three The existence of The layer thickness of the oxide buffer layer 102 was about 18 nm. The oxide buffer layer 102 exhibited n-type conductivity.
[0033]
On the oxide buffer layer 102, trimethylgallium ((CH _Three ) _Three Ga), trimethylaluminum ((CH _Three ) _Three Al) and ammonia (NH _Three ) Aluminum nitride gallium (Al) with an aluminum composition ratio of 0.1 by a general atmospheric pressure MOCVD method using as a raw material _0.1 Ga _0.9 A second buffer layer 109 made of N) was laminated. The second buffer layer 109 had a structure composed of polycrystalline and amorphous, and the layer thickness was about 15 nm.
[0034]
On the second buffer layer 109, a laminated structure 106 including an n-type lower cladding layer 103, an n-type multiphase light-emitting layer 104, and an upper cladding layer 105 was formed by the same procedure as in Example 1. . In this manner, an epitaxial wafer for LED having a light emitting portion comprising the same n-type lower clad layer 103, n-type multiphase light emitting layer 104, and upper clad layer 105 as in Example 1 was produced.
Furthermore, by the same method as in Example 1, p-type and n-type ohmic electrodes 107 and 108 were formed on the epitaxial wafer, and separated into elements to produce LEDs. The peak wavelength of light emission when a forward current of 20 mA was passed through the LED produced as described above was about 470 nm. Further, the light emission intensity of the LED measured using a general integrating sphere was about 18 μW. That is, in Example 2, a Group III nitride semiconductor light-emitting device having higher emission intensity than the LED of Example 1 was obtained.
[0035]
(Example 3)
In Example 3, β-Ga ₂ O _Three The present invention will be specifically described by taking as an example a case where an LED is manufactured by forming a laminated structure made of a group III nitride semiconductor crystal on a buffer layer including an oxide buffer layer containing more than 50% by weight.
The structure of the LED according to Example 3 was the same as the LED shown in FIG.
[0036]
The LED according to Example 3 was manufactured by the following procedure.
Using a target material formed by molding a gallium oxide powder by a high-pressure press method on the surface of a Si single crystal substrate 101 having an n-type (001) plane doped with Sb, a general high frequency wave is used. Α-Ga at 400 ° C. by sputtering. ₂ O _Three An oxide layer mainly composed of was deposited. The thickness of the oxide layer was about 100 nm.
[0037]
Thereafter, the substrate on which the oxide layer was formed was heated at 1100 ° C. for 20 minutes in an argon (Ar) stream. From this, α-Ga constituting the oxide layer ₂ O _Three Β-Ga ₂ O _Three The oxide buffer layer 102 according to the present invention was formed. Β-Ga in the oxide buffer layer 102 ₂ O _Three The weight composition ratio was about 98%. Others are α-Ga ₂ O _Three Was almost.
α-Ga ₂ O _Three Is heated to β-Ga ₂ O _Three To β-Ga ₂ O _Three After forming the oxide buffer layer 102 containing more than 50% by weight, Al was formed on the oxide buffer layer in the same manner as in Example 2. _0.1 Ga _0.9 A second buffer layer 109 made of N was laminated.
[0038]
After that, on the second buffer layer 109, a laminated structure 106 composed of the n-type lower cladding layer 103, the n-type multiphase light-emitting layer 104, and the upper cladding layer 105 is formed in the same manner as in Example 1. Formed. All of the constituent layers 103, 104, and 105 of the laminated structure 106 were excellent in surface flatness.
[0039]
Then, LED was produced by the method similar to Example 1 using the epitaxial wafer obtained by said method.
The peak wavelength of light emission when a forward current of 20 mA was passed through the LED produced in Example 3 was about 472 nm. The emission intensity was 23 μW.
Thus, an LED having a strong emission intensity was obtained because the oxide buffer layer was almost β-Ga. ₂ O _Three And the second buffer layer made of a group III nitride semiconductor is stacked on the oxide buffer layer, so that the crystallinity of each component layer constituting the stacked structure is excellent. It is thought that it became.
As described above, in Example 3, a group III nitride semiconductor light-emitting device having high emission intensity was obtained.
[0040]
【The invention's effect】
According to the group III nitride semiconductor light-emitting device of the present invention, a laminated structure composed of a group III nitride semiconductor crystal having a flat surface and good crystallinity can be formed on a Si single crystal substrate, so that the emission intensity is high. A strong group III nitride semiconductor light emitting device can be produced.
In the above-described embodiments, the case where an LED is manufactured has been described. However, the present invention can also be used when an LD is manufactured.
[Brief description of the drawings]
1 is a schematic cross-sectional view showing the structure of an LED according to Example 1;
FIG. 2 is a schematic cross-sectional view showing the structure of an LED according to Examples 2 and 3;
[Explanation of symbols]
101 Si single crystal substrate
102 Oxide buffer layer
103 Lower cladding layer
104 Light emitting layer
104a Junction interface between light-emitting layer and upper cladding layer
105 Upper cladding layer
106 Laminated structure
107 p-type ohmic electrode
108 n-type ohmic electrode
109 Second buffer layer

Claims (3)

III having a silicon (Si) single crystal substrate having n-type conductivity, a buffer layer formed on the substrate, and a laminated structure made of a group III nitride semiconductor crystal formed on the buffer layer In the group nitride semiconductor light-emitting device, the buffer layer is formed in contact with the Si single crystal substrate and includes an oxide buffer having an n-type conductivity and containing more than 50% by weight of an oxide of gallium (Ga). A group III nitride semiconductor light-emitting device comprising a layer. 2. The group III nitride semiconductor light emitting device according to claim 1, wherein the buffer layer has a second buffer layer made of a group III nitride semiconductor formed on the oxide buffer layer. 3. _{3. The} group III nitride semiconductor according to claim 1, wherein the oxide buffer layer contains more than 50 wt% of beta (β) crystal type gallium trioxide (β-Ga ₂ O ₃ ). Light emitting element.

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