JP3577463B2 - III-nitride semiconductor light emitting diode - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a group III nitride semiconductor light emitting diode (LED) using a Si single crystal as a substrate, and a pn junction heterostructure type III nitride semiconductor having a high luminous intensity and reduced light absorption due to the single crystal substrate. It relates to a light emitting LED.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, silicon (Si) single crystal is well known as a typical semiconductor substrate material exhibiting conductivity which is superior to input / output of an element driving power supply and cleavage which is convenient for cutting into individual elements. Recently, a technique for forming a group III nitride semiconductor light emitting diode (LED) using a silicon single crystal (silicon) as a substrate has been disclosed (see Electron. Lett., 33 (23) (1997), pp. 1986-1987). ).
[0003]
Group III nitride semiconductor LEDs using a Si single crystal as a substrate include, for example, aluminum gallium nitride (Al_aGa_1-aN ≦ a ≦ 1) and gallium indium nitride (Ga_aIn_1-aA light emitting portion having a pn junction type double hetero (DH) structure composed of N: 0 ≦ a ≦ 1 is provided (see Appl. Phys. Lett., 72 (4) (1998), pp. 415-417). )
[0004]
The Si single crystal serving as the substrate and the group III nitride semiconductor forming the light emitting portion have a lattice mismatch relationship. As the prior art, many proposals have been made to provide an intermediate layer between the single crystal substrate and the LED light emitting portion to buffer the mismatch.
For example, there is a proposal to provide an intermediate layer made of aluminum nitride (AlN) in order to buffer lattice mismatch and obtain a high-quality light-emitting portion constituting layer. (See Appl. Phys. Lett. And JP-A-10-242586).
[0005]
In addition, a technique is known in which boron phosphide (BP) is provided as a buffer layer on a zinc-blend type single crystal substrate such as gallium phosphide (GaP) or Si (Japanese Patent Laid-Open No. 2-275682). No. JP-A-2-288371; JP-A-2-288388).
Further, there is a proposal to provide a metal film such as titanium (Ti) as an intermediate layer on a Si single crystal substrate (see Japanese Patent Application Laid-Open No. 2000-261333).
Furthermore, a technique has been disclosed in which a nitride layer such as a titanium nitride (TiN) layer or a cobalt (Co) layer is disposed as an intermediate layer on a Si single crystal substrate having a plane orientation of {111} (Japanese Patent Laid-Open No. 2000-286449). Reference).
[0006]
On the other hand, the band gap of a Si single crystal is about 1.1 electron volts (unit: eV) (Iwao Teramoto, "Introduction to Semiconductor Devices" (March 30, 1995, first edition, published by Baifukan Co., Ltd., p. 28). This band gap is smaller than, for example, half or less of the transition energy corresponding to light emission in the blue band. There is a disadvantage that short-wavelength light emitted from the semiconductor light emitting portion is absorbed by the Si single crystal substrate, that is, in a group III nitride semiconductor LED using Si as a substrate material, light emission caused by the Si single crystal substrate is present. There is a problem that it is difficult to obtain a high-brightness group-III nitride semiconductor LED because absorption of light is inevitable.
[0007]
Technical Means of Providing a Bragg Reflection (DBR) Structure Layer for Reflecting Light Emission Outside Between a Si Substrate and a Light-Emitting Part to Increase the Light Emission Intensity of a Group III Nitride Semiconductor LED Using Si as a Substrate (Mat. Res. Soc. Symp. Proc., Vol. 449 (1997), pp. 79-84). In the conventional DBR layer, Al having a different aluminum composition ratio (= a) is used._aGa_1-aIt is composed of a periodic laminated structure in which N (0 ≦ a ≦ 1) thin layers are repeatedly laminated. The reflectance of light emitted from the DBR layer can be increased by increasing the number of periodic units to be stacked, but there is a problem that the stacking operation is complicated.
[0008]
Although many proposals have been made to improve the light emission intensity of LEDs except for the substrate of the LED, it is reasonable to simply remove the substrate part from the LED to impair the mechanical strength of the LED. Measures are required. Therefore, development of a method for obtaining a group III nitride semiconductor light-emitting LED having sufficient mechanical strength and high luminous intensity using a simpler technique has been demanded.
[0009]
[Problems to be solved by the invention]
The present invention relates to a group III nitride semiconductor LED having a Si single crystal as a substrate, wherein the Si single crystal substrate is removed from the LED without losing the mechanical strength of the LED, and light emission from the light emitting portion is performed on the Si substrate. It is an object of the present invention to develop a technical means for reducing the degree of absorption into a Si substrate-based group III nitride semiconductor LED with high brightness.
[0010]
[Means for Solving the Problems]
That is, the present invention
[1] An intermediate layer, a light emitting portion of a pn junction type heterojunction structure composed of a group III nitride semiconductor on a surface of a conductive silicon (Si) single crystal substrate, a back electrode on a back surface of the single crystal substrate, In a group III nitride semiconductor light emitting diode in which a front surface electrode is provided on a front side light emitting portion, an intermediate layer is a III-V compound semiconductor film containing phosphorus (P), and a back surface electrode on the back surface of the single crystal substrate A group III nitride semiconductor light emitting device, wherein a perforated portion for extracting light is formed by removing a silicon (Si) single crystal substrate in a region other than the region, and the intermediate layer is exposed on a bottom surface of the perforated portion. diode,
[0011]
[2] The group III nitride semiconductor light-emitting diode according to the above [1], wherein a perforated portion for extracting a plurality of lights is provided on a back surface of the conductive silicon single crystal substrate.
[3] The substrate is a conductive {111} -silicon single crystal having a {111} -crystal plane as a surface, and a perforated portion for extracting the above-mentioned light that is exposed by removing the {111} -single crystal. Wherein the bottom surface of the group III is composed of boron phosphide (BP), wherein the group III nitride semiconductor light emitting diode according to the above [1] or [2],
[0012]
[4] The group III nitride semiconductor according to [1], wherein the bottom surface of the hole for extracting light is made of boron phosphide having a {111} -crystal plane as a surface. Light emitting diode,
[5] The above-mentioned [1] to [4], wherein the depth from the back surface of the silicon single crystal substrate on which the back surface electrode is provided to the bottom of the perforated portion for extracting light is 80 μm or more and 300 μm or less. ] The group III nitride semiconductor light-emitting diode according to any of [1],
[0013]
[6] The middle layer is MN_1-XP_X(Wherein, M represents a group III element other than boron, and X is in the range of 0 <X ≦ 1), wherein the group III nitride semiconductor light emitting diode according to the above [1],
[7] The middle layer is B_XM_1-XThe group III nitride semiconductor light-emitting diode according to the above [1], which is composed of P (wherein M represents a group III element other than boron, and X satisfies 0 <X ≦ 1). and
[8] The group III nitride semiconductor light-emitting diode according to the above [6] or [7], wherein the intermediate layer is formed as a composition gradient layer by giving a gradient to the concentration of the group III constituent element or the group V constituent element. Solved the above-mentioned problem.
[0014]
DESCRIPTION OF THE PREFERRED EMBODIMENTS
The group III nitride semiconductor light-emitting diode (LED) of the present invention can be formed using a conductive Si single crystal having a plane orientation of {100}, {111}, or {110} as a substrate. The substrate has a resistivity of 10³Ω · cm or less, preferably 10¹Any single crystal of n-type or p-type can be used as long as it has conductivity of Ω · cm or less. Since it is necessary to easily form an LED by laying an ohmic electrode on the back surface using the conductivity of the Si substrate, a high-resistance undoped Si single crystal cannot be suitably used as the substrate.
Since Si atoms are present more densely in the {111} crystal plane than in the {100} crystal plane, when a Si single crystal with a plane orientation of {111} is used as a substrate, Since diffusion and intrusion of elements constituting the layer from the layer into the Si single crystal substrate can be further suppressed, it is convenient to form an intermediate layer that is stoichiometrically balanced.
[0015]
The Si single crystal in the region where the ohmic electrode (back surface electrode = first electrode) is laid on the back surface of the Si single crystal substrate is left, and the Si single crystal material in the other region is removed using a known etching technique. If the substrate material is left only in the region where the back electrode (first electrode) is to be formed, the mechanical strength of the remaining substrate material is utilized as compared with the case where the entire substrate is removed. This has the effect of supporting the LED more firmly. Also, by leaving the conductive substrate material, there is an effect that a back electrode (first electrode) having low contact resistance and excellent ohmic properties is provided thereon.
[0016]
For example, it may be removed by a plasma etching method using a chlorine (Cl) -based gas, or may be removed by a wet etching technique using a mixed solution of hydrofluoric acid (HF) and nitric acid (HNO3). .
That is, the selective removal of the Si single crystal existing in the region other than the region where the back electrode is stacked can be performed through selective patterning using known photolithography. It is desirable that the region from which the Si single crystal is removed has a region other than the required back electrode as wide as possible. As the cross-sectional area of the region from which the Si single crystal is removed is increased, the absorption of light emitted from the light-emitting portion due to the Si substrate material is avoided, so that the area that can transmit light to the outside increases, contributing to the improvement of light emission intensity. it can.
[0017]
Regarding the cross-sectional shape of the region to be subjected to the selective patterning, an arbitrary shape is selected within the permissible range of the ease of the etching drilling, the size of the cross-sectional area, and the mechanical strength of the group III nitride semiconductor LED for the above-described reason. be able to. For example, as shown in FIG. 1, there is a configuration on the back surface 11 b side of the LED substrate 11 in which only a circular perforated portion 13 is provided in the back surface region of the Si single crystal 11 other than the back electrode 12. A plurality of the circular perforations may be arranged. FIG. 2 shows an example in which a plurality of circular perforations 13 are provided on the back surface 11b of the Si single crystal substrate 11 as an example. Although the horizontal cross-sectional shape of the perforated portion 13 illustrated in FIGS. 1 and 2 is circular, it is a circular shape such as an elliptical shape or a sector shape that forms a part of a circle, in which selective patterning can be easily achieved and etching can be performed. It is preferable if there is.
[0018]
Regardless of the shape, the emission intensity increases in proportion to the area of the total cross-sectional area of the perforated portion, rather than the influence of the cross-sectional shape of the perforated portion. For this reason, it is important that the cross-sectional area of the portion where the Si single crystal is removed is made as wide as possible to the extent that the mechanical support force of the light emitting portion does not extremely decrease due to the removal of the substrate.
[0019]
Further, a perforated portion having a rectangular cross section such as a square, a rectangle, a rhombus, or a parallelogram may be provided. In any case, similarly to the circular perforated portion described in the above embodiment, the cross-sectional shape of the perforated portion is a shape that can be easily obtained by etching.
FIG. 3 illustrates a configuration in which a band-shaped perforated portion 13 having a rectangular cross section is provided on the back surface 11b of the {111} -Si single crystal substrate 11. Even in the case of providing a perforated portion having a rectangular cross-sectional shape, the total cross-sectional area of the perforated portion is set to be large enough not to cause an extreme decrease in the mechanical supporting force of the light emitting portion due to removal of the substrate. Is essential. In order to expand the cross-sectional area from which the Si substrate has been removed, a plurality of rectangular holes can be provided.
[0020]
It is also possible to provide a band-shaped perforated portion in which several perforations are connected. There is no problem even if the circular and square perforated portions are connected to form a band-shaped perforated portion. When the rectangular and circular perforations are combined as illustrated in FIG. 4, the removal area of the substrate can be further increased and the area through which light can be transmitted can be increased as compared with a case where a rectangular perforation is simply provided. Can be fulfilled.
[0021]
In any of the above-described perforated portions having a horizontal cross-sectional shape, an ohmic electrode is disposed as a substrate back surface electrode around the perforated portion. A metal film such as gold (Au) is applied to the p-type Si substrate to form a back-side p-type ohmic electrode. For an n-type Si substrate, for example, an n-type ohmic electrode can be made of aluminum (Al) or aluminum-antimony (Al-Sb) alloy. A plurality of back electrodes can be provided at positions isolated from each other on the back surface of the Si substrate, but are preferably provided so as to be electrically continuous with each other and integrated.
[0022]
The bottom surface of the perforated portion in the group III nitride semiconductor LED of the present invention is a crystal plane of the intermediate layer. That is, the perforated portion is stopped when it reaches a portion constituting the intermediate layer (a point where the required strength can be maintained), and the constituent layer of the intermediate layer is exposed as the bottom surface of the perforated portion. In this case, the depth of the perforated portion having the intermediate layer as the bottom surface is substantially equal to the thickness of the Si single crystal substrate. Further, the constituent layer of the light emitting section layer provided on the intermediate layer may be configured as the bottom face of the perforated section. However, when the perforation is advanced so that the light-emitting portion constituting layer becomes the bottom surface, the luminous intensity increases, but the intermediate layer supporting the mechanical strength of the LED is weakened. As a result, the mechanical strength is deteriorated, which hinders the mechanical support of the light emitting unit. Therefore, if the perforated portion of the Si single crystal forming the substrate is stopped at the intermediate layer below the light emitting portion, and the bottom surface is formed as a constituent layer of the intermediate layer, a structure convenient for mechanically supporting the light emitting portion is obtained.
[0023]
In the perforated portion having the bottom surface as an intermediate layer, after the intermediate layer is laminated on the surface of the Si single crystal substrate, a single or double heterogeneous light emitting portion is provided on the intermediate layer. Can be previously formed. However, also in this case, it is necessary to insert the process of forming the perforated portion in the middle of the laminating step, so that the laminating step is discontinuous and the step becomes redundant. Further, it can be formed after forming the light emitting portion.
On the other hand, as the thickness of the Si single crystal substrate is smaller, the perforated portion can be formed more easily. Therefore, when a laminated structure (light emitting portion having a pn junction type hetero structure) is grown on the upper surface of the Si single crystal substrate, the back surface of the Si single crystal substrate is polished to reduce the thickness, and then the holes are easily drilled. A part can be formed.
[0024]
Further, by reducing the thickness of the Si single crystal substrate by grinding means such as lapping to reduce the thickness of the entire laminated structure, there is an advantage that cutting for individual elements can be easily performed.
If the grinding amount of the back surface of the Si single crystal substrate is made extremely large and the thickness of the substrate is reduced, the formation of the perforated portion and the cutting into individual elements become easy, but in order to support the mechanical strength of the LED, Will be insufficient. The thickness of the remaining Si substrate is preferably about 300 to 80 μm, and more preferably 250 to 100 μm.
[0025]
Means in which the intermediate layer is made of a high melting point metal such as titanium nitride (TiN) or zirconium nitride (ZrN) or a single metal such as aluminum or gold may be considered.
However, since the degree of absorption of light emitted from the light emitting portion is remarkably large in a single metal film, when the intermediate layer is formed of a metal film, the light emission is absorbed or shielded by the intermediate layer and is emitted to the outside from the perforated portion. There may be a case where the intensity of light emission is extremely reduced.
[0026]
Further, the nitride of the high melting point metal may be colored depending on the stoichiometric equivalent ratio between nitrogen and the metal element. Therefore, when the intermediate layer is formed using a metal nitride material, the intensity of the light emitted from the perforated portion may become unstable depending on the degree of coloring. Almost no single metal or metal nitride has a lattice constant substantially equal to that of a general group III nitride semiconductor forming a light emitting portion of a group III nitride semiconductor LED. For this reason, an intermediate layer made of a single metal or a metal nitride is not always suitable for laminating a group III nitride semiconductor layer constituting a light emitting portion having excellent crystallinity due to lattice mismatch. On the other hand, when the intermediate layer is made of a semiconductor material, the effect of reducing the absorption of light emission by the intermediate layer, which cannot be avoided by the metal material as described above, can be obtained.
[0027]
Therefore, a strong intermediate layer having excellent mechanical strength can be formed from a III-V compound semiconductor containing phosphorus as compared with a III-V compound semiconductor containing arsenic (As) as a constituent element. The melting point of boron arsenide (BAs) is about 1000 ° C., whereas that of boron phosphide (BP) is as high as about 3000 ° C. (Iwao Teramoto, “Introduction to Semiconductor Devices” (March 30, 1995, (Refer to the first edition published by Baifukan Co., Ltd., p. 28.) For this reason, from the phosphorus-containing III-V compound semiconductor, the step of depositing the upper group III nitride semiconductor layer at a high temperature exceeding about 1000 ° C. There is an advantage that an intermediate layer exhibiting heat resistance can be formed.
[0028]
Phosphorus-containing III-V compound semiconductors include boron phosphide (BP), gallium nitride phosphide (GaN)_1-XP_X: 0 <X ≦ 1, aluminum phosphide nitride (AlN)_1-XP_X: 0 <X ≦ 1), indium phosphide nitride (InN_1-XP_X: 0 <X ≦ 1) and aluminum boron phosphide (B_XAl_1-XP: 0 <X ≦ 1), gallium boron phosphide (B_XGa_1-XP: 0 <X ≦ 1) and indium boron phosphide (B_XIn_1-XP: 0 <X ≦ 1). The conduction type of the intermediate layer usually matches the conduction type of the conductive single crystal used as the substrate.
[0029]
For example, when the buffer layer is made of boron phosphide (BP) having a different lattice constant from that of the Si single crystal, the buffer layer (low-temperature buffer layer) grown at a relatively low temperature is composed of the Si single crystal and the multilayer structure. It effectively acts to alleviate the lattice mismatch (mismatch) with the constituent layer to provide a constituent layer having excellent crystallinity. For example, a BP low-temperature buffer layer formed at a relatively low temperature of 250 ° C. or more and 500 ° C. or less has a lattice mismatch of about 16.5% with a Si single crystal (Katsufusa Shono, “Semiconductor Technology (First Volume)” ( (Published by The University of Tokyo, June 25, 1992, ninth printing, p. 77)) to reduce the crystal defect density such as misfit dislocations and to provide the constituent layers of a high-quality multilayer structure. (See US Pat. No. 6,069,021).
[0030]
When the intermediate layer is formed of a crystal layer having a concentration gradient of a group III constituent element or a group V constituent element, it is convenient for alleviating lattice mismatch between the Si single crystal substrate and an upper layer, for example, a group III nitride semiconductor layer. . For example, the indium (In) composition ratio at the interface bonded to the Si single crystal substrate is set to 0.67, and the indium composition ratio is reduced toward the surface._XIn_1-XFrom the P: 0 <X ≦ 1) layer, for example, gallium phosphide nitride (GaN) having excellent crystallinity as an upper layer while relaxing lattice mismatch with the Si single crystal_1-XP_X0 <X ≦ 1) An intermediate layer providing a crystal layer can be formed. An intermediate layer having a composition gradient that can provide a group III nitride semiconductor layer having excellent crystallinity with few crystal defects such as dislocations due to lattice mismatch is formed of aluminum nitride phosphide (AlN_1-XP_X: 0 <X ≦ 1), indium nitride phosphide (InN1-XPX: 0 <X ≦ 1) and the like.
[0031]
The composition gradient layer in the intermediate layer of the group III nitride semiconductor LED of the present invention is, for example, gallium phosphide (GaN)._1-XP_X: 0 <X ≦ 1)_1-XP_X(0 <X ≦ 1, M represents a group III element.) In a mixed crystal, the composition ratio (= X) of phosphorus (P) other than the constituent element nitrogen (N) is increased in the direction of increasing the layer thickness. It is configured to decrease and correspondingly increase the nitrogen composition ratio (= 1−X). The gradient of the composition can be linear, curved, stepped, or the like (see JP-A-2000-22211). The intermediate layer having a composition gradient can be formed by changing the addition amount of the supply source of nitrogen and phosphorus added to the growth reaction system at the time of forming the same layer over time. The intermediate layer having a gradient in the composition of the group V element has an effect of relaxing lattice mismatch with the Si single crystal substrate to provide a group III nitride semiconductor layer having excellent crystallinity.
[0032]
Further, the intermediate layer can be constituted by a phosphorus-containing III-V compound semiconductor crystal layer in which the composition of the group III constituent elements is graded. In particular, for example, boron gallium phosphide (B) containing boron (B) as a group III constituent element_XGa_1-XP: 0 <X ≦ 1), indium boron phosphide (B_XIn_1-XP: composition formula B such as 0 <X ≦ 1)_XM_1-XA boron phosphide (BP) -based mixed crystal represented by P (0 <X ≦ 1, M represents a group III element) can constitute an intermediate layer effective for relaxing lattice mismatch with a Si single crystal substrate. . In a group III-V compound semiconductor composed of a plurality of group III constituent elements and a single group V constituent element, an intermediate layer is formed by giving a gradient to the composition of boron or other group III constituent elements.
[0033]
In particular, when a substrate is made of Si single crystal, the composition ratio (= X) of boron (B) is increased in the direction of increasing the layer thickness, and conversely, another composition such as gallium (Ga) or indium (In) is used. A composition gradient layer having a composition gradient so as to reduce the composition ratio of group III constituent elements can be suitably used as an intermediate layer.
[0034]
For example, the boron composition ratio (= X) at the bonding interface with the Si single crystal substrate is set to 0.02, and the boron composition ratio at the surface is set to 1.0._XGa_1-XP is lattice-matched to a Si single crystal (lattice constant: 5.431 °) substrate, and gallium phosphide (GaN) having a nitrogen composition ratio of 0.97 is used._0.97P_0.03: Lattice constant = 4.538 °), which is useful as an intermediate layer that achieves lattice matching.
The intermediate layer in which the composition of the group III element is graded is formed by, for example, changing the supply amount of the organometallic compound serving as the group III constituent element raw material to the reaction system over time when forming the intermediate layer by the MOCVD method. Can be formed by
[0035]
In the group III nitride semiconductor LED of the present invention, a pn junction type heterostructure composed of a group III nitride semiconductor conductor laminated on a surface of a conductive silicon (Si) single crystal substrate via an intermediate layer made of a semiconductor. A group III nitride semiconductor light-emitting diode including a light emitting portion having a junction structure and a back electrode on the back surface of the single crystal substrate and a front electrode on the light emitting portion on the front surface side, wherein the single crystal substrate has a back surface region. The perforated portion formed by removing the Si single crystal substrate in a region other than the back surface electrode forms a portion for extracting light emitted from the light emitting unit to the outside.
[0036]
The intermediate layer constituting the bottom surface of the perforated portion of the group III nitride semiconductor light emitting diode of the present invention has an action of firmly supporting the light emitting portion provided on the perforated portion.
In particular, the intermediate layer in which the plane orientation formed by the bottom surface of the perforated portion according to the present invention has the {111} plane suppresses the diffusion of the elements constituting the intermediate layer into the Si single crystal substrate and emits light provided on the top. It constitutes a part that supports the part more firmly.
[0037]
The intermediate layer composed of the III-V compound semiconductor film containing phosphorus (P) of the group III nitride semiconductor light-emitting diode of the present invention suffers from damage and erosion due to the perforation process when perforating the back surface of the Si single crystal substrate. An intermediate layer having excellent chemical resistance and the like for preventing the light emitting portion from being formed is formed.
[0038]
In particular, the intermediate layer composed of a composition gradient layer having a gradient in the composition of the group III constituent element or the group V constituent element relaxes the lattice mismatch between the Si single crystal substrate and the upper group III nitride semiconductor layer, A good quality group III nitride semiconductor layer having a small crystal defect density is provided, and the group III nitride semiconductor layer constituting the light emitting portion is firmly supported.
[0039]
A group III nitride semiconductor LED having an intermediate layer composed of a low-temperature buffer layer and a high-temperature buffer layer can be manufactured, for example, by the following method.
An n-type or p-type {111} -Si single crystal substrate is used as a substrate material, and a low-temperature buffer layer formed at a lower temperature than a high-temperature buffer layer provided thereon and a higher temperature than a low-temperature buffer layer provided on the low-temperature buffer layer An intermediate layer consisting of a high-temperature buffer layer formed by the above is provided. As the low-temperature buffer layer, an amorphous boron phosphide layer mainly composed of an amorphous material grown at a low temperature of about 250 to 550 ° C. by MOCVD means is grown, and then at about 750 to 1200 ° C., a single boron phosphide layer is formed by MOCVD means. Grow a crystal layer. The high-temperature buffer layer is for maintaining the mechanical strength of the LED, and is selected from a group III-V compound semiconductor having relatively excellent mechanical strength, and the low-temperature buffer layer assists the lamination of the substrate and the high-temperature buffer layer. Use a compound layer.
[0040]
On the intermediate layer, a light emitting section including a lower clad layer, a light emitting layer, and an upper clad layer is laminated. The lower cladding layer is an n-type or p-type group III nitride semiconductor crystal layer lattice-matched to the high-temperature buffer layer, for example, GaN matched to the BP high-temperature buffer layer_0.97P_0.03A crystal layer is provided at 850-1200 ° C. An n-type or p-type group III nitride semiconductor layer is formed thereon at a lower temperature than the lower cladding layer. This light emitting layer may have a quantum well structure. The upper cladding layer is a p-type or n-type group III nitride semiconductor layer having a conduction system opposite to that of the lower cladding layer. Next, a first-conductivity-type electrode is provided on the remaining portion of the etched substrate, and a second-conductivity-type electrode is provided on the upper cladding layer, to obtain a group III nitride semiconductor LED.
[0041]
The perforated portion may be perforated in any process after the lamination of the intermediate layer on the substrate and after the lamination of the intermediate layer and the light emitting portion on the substrate. Prior to the perforation, it is preferable that the back surface of the Si substrate is lapped and polished to a thickness of about 300 to 80 μm, and then perforated by wet etching at about 10 to 30 ° C. using a mixed solution of hydrofluoric acid and nitric acid.
[0042]
A group III nitride semiconductor LED having a composition gradient buffer layer as an intermediate layer can be manufactured, for example, by the following method.
An n-type or p-type {111} -Si single crystal substrate is used as a substrate material, and a composition gradient buffer layer in which gallium boron phosphide is increased in the direction of increasing the thickness of the layer by MOCVD means is formed on the substrate. Film. During the growth, the boron concentration is regulated so as to obtain the same lattice constant as that of the Si single crystal, and at the end, the gallium source is reduced so as to obtain the same lattice constant as that of the lower clad layer formed thereon. The composition gradient buffer layer can be grown at a temperature of approximately 600-1200C. During growth, the temperature may be kept constant or may be changed midway.
On this composition gradient buffer layer, a light emitting portion composed of a lower cladding layer, a light emitting layer and an upper cladding layer is laminated.
[0043]
The lower cladding layer is a p-type group III nitride semiconductor layer lattice-matched to the composition gradient layer, and is grown at about 850 to 1200 ° C. by MOCVD. Next, the light emitting layer is a p-type group III nitride semiconductor layer lattice-matched to the cladding layer, and the layer may have a quantum well structure. The upper cladding layer is an n-type group III nitride semiconductor crystal layer, and is formed by MOCVD.
The first conductivity type electrode uses aluminum or its alloy, and the second conductivity type electrode uses gold or its alloy.
Hereinafter, specific examples will be described.
[0044]
【Example】
(Example 1)
The present invention will be specifically described with reference to a group III nitride semiconductor LED using a Si single crystal substrate having a circular perforated portion on the back surface as a substrate. FIG. 5 schematically shows a cross-sectional structure of the LED 10 according to the present embodiment.
[0045]
As the substrate 101, a boron (B) -doped p-type (100) -Si single crystal was used. On the substrate 101, a low-temperature buffer layer 102 made of boron phosphide (BP) was deposited. The low-temperature buffer layer 102 is made of triethyl boron ((C₂H₅)₃B) / phosphine (PH₃) / Hydrogen (H₂) System It was grown at 350 ° C. by normal pressure MOCVD.
The thickness of the buffer layer 102 was about 14 nm. On the surface of the low-temperature buffer layer 102, a p-type BP layer doped with magnesium (Mg) at 950 ° C. was laminated as a high-temperature buffer layer 103 by using the above-mentioned MOCVD vapor deposition method. As a doping source of magnesium, biscyclopentadienyl magnesium (molecular formula: bis- (C₅H₄)₂Mg) was used. The carrier concentration of the high temperature buffer layer 103 is about 7 × 10¹⁸cm^-3And The layer thickness was about 350 nm.
[0046]
On the high-temperature buffer layer 103, a magnesium-doped p-type gallium nitride phosphide (composition formula: GaN) having a phosphorus (P) composition ratio of 0.03 (= 3%)_0.97P_0.03) Layer was laminated as lower cladding layer 104. GaN_0.97P_0.03The layer is made of trimethylgallium ((CH₃)₃Ga) / PH3 / ammonia (NH₃) / H₂It was grown at 950 ° C. by a system normal pressure MOCVD method. Cubic p-type GaN_0.97P_0.03The carrier concentration of the layer is about 8 × 10¹⁷cm^-3And the layer thickness was about 85 nm.
[0047]
On the lower cladding layer 104, an n-type gallium indium nitride (composition formula Ga_XIn_1-XN: 0 ≦ X ≦ 1). Silicon (Si) doped Ga forming the light emitting layer 105_XIn_1-XThe N layer includes (CH₃)₃Ga / trimethylindium ((CH₃)₃In) / disilane (Si)₂H₆) / NH₃/ H₂It was grown at 850 ° C. by a system normal pressure MOCVD method. The average composition ratio of indium (In) in the light emitting layer 105 was 0.10. The layer thickness of the light emitting layer 105 was about 80 nm. Carrier concentration is about 3 × 10¹⁸cm^-3Set to.
[0048]
Ga_0.90In_0.10On the N light-emitting layer 105, a silicon (Si) -doped n-type aluminum-gallium nitride mixed crystal (Al_γGa_{1- γ}The N) layer was laminated as the upper cladding layer 106. The Al composition ratio (= γ) monotonically decreased substantially linearly from 0.2 to 0 (zero) in the direction of increasing the layer thickness. The layer thickness was 200 nm.
[0049]
The above p-type GaN_0.97P_0.03Lower cladding layer 104, n-type Ga_0.90In_0.10N light emitting layer 105 and n-type Al_γGa_{1- γ}The light emitting section 107 having a pn junction type double hetero junction structure was formed from the upper cladding layer 106 composed of an N composition gradient layer.
[0050]
Using a known photolithography technique and a selective etching technique, as shown in FIG. 6, a central portion of the back surface of the p-type Si single crystal substrate 101 was perforated into a hollow cylindrical shape having a bottom diameter of about 150 μm. The perforated portion 109 is made of hydrofluoric acid (HF) and nitric acid (HNO₃The silicon single crystal was removed by etching with the mixed solution of (1). The depth of the perforated portion 109 was about 300 μm corresponding to the layer thickness of the substrate 101. The etching was allowed to proceed until the BP low-temperature buffer layer 102 was exposed on the bottom surface 109a of the perforated portion 109. A p-type ohmic electrode 110 made of a gold (Au) film was arranged on Si single crystal substrate 101 left around perforated portion 109. At the center of the surface of the upper cladding layer 106, a circular ohmic electrode 108 made of gold (Au) was arranged. The diameter of the n-type ohmic electrode 108 was about 130 μm. The center of the circular bottom surface 109 a of the perforated portion 109 was aligned with the center of the horizontal shape of the surface ohmic electrode 108.
[0051]
An LED driving current was passed between both ohmic electrodes 108 and 110. The current-voltage (IV characteristics) showed normal rectification characteristics based on good pn junction characteristics of the light emitting unit 107. The forward voltage (so-called Vf) obtained from the IV characteristics was about 3 V (forward current = 20 mA). The reverse voltage was about 15 V (reverse current = 10 μA). When an operating current of 20 milliamperes (mA) was passed in the forward direction, blue light having an emission center wavelength of about 470 nm was emitted. The half width of the emission spectrum was about 18 nm. The light emission intensity in a chip state measured using a general integrating sphere was about 18 microwatts (μW), and a group III nitride semiconductor light emitting device with high light emission intensity was provided.
[0052]
(Example 2)
Phosphorus (P) -doped n-type {111} -Si single crystal substrate 201 has diborane (molecular formula: B₂H₆) / (CH₃)₃Ga / PH₃/ H₂Boron phosphide / gallium phosphide (composition formula: B) in which the composition ratio (= X) of boron (B) is increased in the direction of increasing the layer thickness at 650 ° C. by the reduced pressure MOCVD method._XGa_1-XP) A buffer layer 202 composed of a composition gradient layer was laminated. The pressure of the reaction system during growth is about 1.3 × 10⁴Pascal (unit: Pa) was set. The thickness of the buffer layer 202 was 0.8 μm. B_XGa_1-XThe boron (B) composition ratio (= X) at the junction surface of the P composition gradient layer 202 with the Si single crystal 201 was set to 0.02, at which the same lattice constant (= 5.431 °) as that of the Si single crystal was obtained. . The boron composition ratio at the surface is determined by the upper layer GaN_0.97P_0.03The lattice constant was set to 1.0 so as to obtain the same lattice constant (= 4.538 °) as that of the lower cladding layer. The boron composition ratio (= X) was linearly increased in the direction in which the thickness of the buffer layer 202 increased. The boron composition ratio increases the supply amount of diborane as a boron source to the MOCVD reaction system with time, and conversely, trimethylgallium ((CH) as a gallium (Ga) source₃)₃The supply amount of Ga) was reduced and changed. B_XGa_1-XDuring the growth of the P composition gradient layer 202, disilane (Si₂H₆) -H₂Silicon (Si) was doped using the mixed gas.
[0053]
B_XGa_1-XOn the P composition gradient buffer layer 202, a silicon (Si) -doped n-type gallium phosphide having a phosphorus (P) composition ratio of 0.03 (= 3%) (composition formula: GaN)_0.97P_0.03) Layer was laminated as lower cladding layer 204. GaN_0.97P_0.03The layer is made of trimethylgallium (molecular formula: (CH₃)₃Ga) / PH₃/ NH₃/ H₂It was grown at 950 ° C. by a system normal pressure MOCVD method. Cubic n-type GaN_0.97P_0.03The carrier concentration of the layer is about 8 × 10¹⁷cm^-3And the layer thickness was about 85 nm.
[0054]
On the lower cladding layer 204, an n-type gallium indium nitride (composition formula Ga_XIn_1-XN: 0 ≦ X ≦ 1). Silicon (Si) doped Ga forming the light emitting layer 205_XIn_1-XThe N layer includes (CH₃)₃Ga / (CH₃)₃In / Si₂H₆/ NH₃/ H₂It was grown at 850 ° C. by a system normal pressure MOCVD method. The average indium (In) composition ratio of the light emitting layer 205 was set to 0.10. The thickness of the light emitting layer 205 is about 80 nm, and the carrier concentration is about 3 × 10¹⁸cm^-3Set to.
[0055]
Ga_0.90In_0.10On the N light emitting layer 205, a p-type gallium nitride mixed crystal (GaN) layer doped with both zinc (Zn) and magnesium (Mg) was laminated as an upper cladding layer 206.
[0056]
The above n-type GaN_0.97P_0.03Lower cladding layer 204, n-type Ga_0.90In_0.10A light emitting portion 207 having a pn junction type double hetero junction structure was constituted by the N light emitting layer 205 and the upper cladding layer 206 made of a p-type GaN layer. FIG. 7 schematically shows a cross-sectional structure of the laminated structure of the present embodiment.
[0057]
Next, the back surface of the {111} -Si single crystal substrate 201 was polished to reduce the thickness of the substrate from about 350 μm to about 150 μm. Thereafter, using a known photolithography technique and a selective etching technique, a rectangular perforated portion 209 as shown in FIG. 8 was formed at the center of the back surface of the n-type Si single crystal substrate 201. The length of the short side of the perforated portion 209 was 200 μm, and the length of the long side was 250 μm. The perforated portion 209 was formed by removing the Si single crystal 201 using plasma etching means using a chlorine-based gas. The depth of the perforated portion 209 from the back surface of the substrate 201 was about 150 μm. On the bottom surface 209a of the perforated portion 209, a {111} -B obtained by using a Si single crystal having a plane orientation of {111} as the substrate 201 is used._XGa_1-XThe surface of the P buffer layer 202 was exposed. An n-type ohmic electrode 208 made of gold (Au) was provided on the Si single crystal left so as to surround the perforated portion 209.
[0058]
On almost the entire surface of the upper cladding layer 206, a p-type ohmic electrode 210 made of a thick film having a multilayer structure of gold (Au) and nickel oxide (NiO) was formed. The thickness of the gold coating was about 2 μm, and the thickness of the nickel oxide was about 0.5 μm.
[0059]
After the p-type ohmic electrode 210 side of the LED 20 configured as described above was electrically connected to the support and bonded to the support, the intensity of light emitted through the perforated portion 209 and emitted to the outside was measured. The light emission intensity measured using a general integrating sphere in this mounted state was about 16 microwatts (μW), and a group III nitride semiconductor light emitting device with high light emission intensity was provided. The center wavelength of the light emission was about 470 nm, and the half width of the light emission spectrum was about 20 nm. The forward voltage (Vf) was about 3 V (forward current = 20 mA). The reverse voltage was about 15 V (reverse current = 10 μA).
[0060]
【The invention's effect】
The present invention relates to light emission of a pn-junction type heterojunction structure composed of a group III nitride semiconductor laminated on a surface of a conductive silicon (Si) single crystal substrate via an intermediate layer composed of a metal or a semiconductor. A III-nitride semiconductor light emitting diode comprising at least a portion, a back electrode on the back surface of the single crystal substrate, and a front electrode on the light emitting portion on the front side. Since a perforated portion formed by removing the crystal substrate is provided, and an ohmic electrode is disposed on the remaining conductive Si single crystal substrate around the perforated portion to constitute an LED, mechanical Absorption of luminescence due to the Si single crystal substrate is completely or significantly reduced without losing the intensity, and the luminescence of the LED can be extracted to the outside by passing through the perforated part. It is possible to provide a LED.
[0061]
Further, in this case, when the Si single crystal is reliably removed such that the bottom surface of the perforated portion exposes the crystal plane of the intermediate layer, absorption of light emission caused by the Si single crystal in the perforated portion is completely avoided. In addition, since light emission can be extracted to the outside without lowering the light emission intensity, a group III nitride semiconductor LED with high light emission intensity can be provided.
Further, when the single crystal of the perforated portion is reliably removed and the {111} crystal plane of the intermediate layer is exposed on the bottom surface, it is possible to avoid the absorption of light emitted by the single crystal silicon substrate, It is possible to provide a substrate-removed type III-nitride semiconductor LED including a light-emitting portion that is firmly held by compensating for a decrease in the supporting force of the light-emitting portion due to the removal of the crystal substrate.
[0062]
In particular, when the intermediate layer is formed from a III-V compound semiconductor film containing phosphorus (P), the mechanical strength is excellent and the melting point is extremely high as compared with a III-V semiconductor containing arsenic as a constituent element. Thus, a group III nitride semiconductor LED that can firmly support the light emitting portion and has an intermediate layer having excellent heat resistance can be configured.
Further, by forming a composition gradient layer in which the composition of the group III constituent element or the group V constituent element is graded as the intermediate layer, an intermediate layer lattice-matched to both the Si single crystal and the upper group III nitride semiconductor layer is formed. Therefore, the crystal defect density due to lattice mismatch at the interface with the light emitting layer can be reduced, so that a group III nitride semiconductor layer having good crystallinity can be obtained, and a group III nitride semiconductor LED having high emission intensity Is brought.
[Brief description of the drawings]
FIG. 1 is a schematic plan view illustrating a perforated shape of a perforated portion.
FIG. 2 is a schematic plan view illustrating a shape of a perforated portion;
FIG. 3 is a schematic plan view illustrating a shape of a perforated portion;
FIG. 4 is a schematic plan view illustrating a perforation shape of a perforation portion.
FIG. 5 is a schematic sectional view of the LED described in Example 1.
FIG. 6 is a schematic diagram showing the structure of the back surface of the LED described in Example 1.
FIG. 7 is a schematic sectional view of the LED described in Example 2.
FIG. 8 is a schematic diagram showing the structure of the back surface of the LED described in Example 2.
[Explanation of symbols]
10,20 Group III nitride semiconductor LED
11, 101, 201 Si single crystal substrate
11b Backside of substrate
12 Back electrode
13 Perforated part
102 Boron phosphide (BP) low temperature buffer layer
103 BP high temperature crystal layer
202 Composition gradient buffer layer
104, 204 Lower cladding layer
105, 205 light emitting layer
106, 206 Upper cladding layer
107, 207 light emitting unit
108,208 n-type ohmic electrode
109,209 Perforated part
109a, 209a Perforated bottom surface
110, 210 p-type ohmic electrode

Claims (8)

On the surface of a conductive silicon (Si) single crystal substrate, an intermediate layer, a light emitting portion having a pn junction type heterojunction structure composed of a group III nitride semiconductor, a back electrode on the back surface of the single crystal substrate, In a group III nitride semiconductor light emitting diode in which a surface electrode is provided on a light emitting portion, an intermediate layer is a group III- V compound semiconductor film containing phosphorus (P) , and a region other than the back surface electrode on the back surface of the single crystal substrate. A group III nitride semiconductor light-emitting diode , wherein a perforated portion for extracting light is formed by removing the silicon (Si) single crystal substrate of step (a) , and the intermediate layer is exposed on the bottom surface of the perforated portion . On the back surface of the conductive silicon single-crystal substrate, III-nitride semiconductor light emitting diode according to 請 Motomeko 1, wherein a plurality of perforations for taking out light is provided. The substrate is a conductive {111} -silicon single crystal having a {111} -crystal plane as a surface, and the bottom surface of the perforated portion for removing the above-described light that has been exposed by removing the {111} -single crystal is , And boron phosphide (BP). III Group nitride semiconductor light emitting diode. The bottom surface of the perforated portion for extracting light is made of boron phosphide having a {111} -crystal plane as a surface. III Group nitride semiconductor light emitting diode. The depth from the back surface of the silicon single crystal substrate on which the back electrode is provided to the bottom of the perforated portion for extracting light is 80 μm or more and 300 μm or less, according to any one of claims 1 to 4, wherein Stated III Group nitride semiconductor light emitting diode. The III according to claim 1, wherein the intermediate layer is composed of MN _1-X P _X (where M represents a Group III element other than boron, and X is in the range of 0 <X ≦ 1). Group nitride semiconductor light emitting diode. Intermediate layer B _X M _1-X P (wherein, M represents a group III element other than boron, X is 0 <a range of X ≦ 1.) Of claims 1 to 6 in which was formed from 13. The group III nitride semiconductor light-emitting diode according to claim 1. 8. The group III nitride semiconductor light emitting diode according to claim 6, wherein the intermediate layer is a composition gradient layer in which the concentration of the group III constituent element or the group V constituent element is graded.

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