JP2002246645A - Group iii nitride semiconductor light emitting diode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-brightness Si substrate type group III nitride semiconductor LED from which a Si single crystal substrate is removed to reduce the absorption ratio of light emission by the Si substrate, without losing a mechanical strength. SOLUTION: The group III nitride semiconductor light emitting diode comprises at least a group III nitride semiconductor-made light emitting part having a p-n junction type hetero-junction structure laminated on the surface of a conductive silicon single crystal substrate through a metal or semiconductor intermediate layer, a backside electrode on the backside of the substrate, a surface electrode on the light emitting part at the surface side and a hole part formed by removing the Si single crystal substrate in regions of the single crystal substrate backside other than the backside electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a group III nitride semiconductor light emitting diode (LED) using a Si single crystal as a substrate, and a pn junction heterojunction having a high luminous intensity and reduced light absorption due to the single crystal substrate. Structure type III nitride semiconductor light emitting LE
D and its manufacturing method.

[0002]

2. Description of the Related Art Conventionally, silicon (Si) single crystal is well known as a typical semiconductor substrate material exhibiting conductivity which is superior to input / output of an element driving power supply and cleavage which is convenient for cutting into individual elements. . Recently, a group III nitride semiconductor light-emitting diode (LE) using silicon single crystal (silicon) as a substrate
D) is disclosed (Electro
n. Lett. , 33 (23) (1997), 1986.
1987 page).

[0003] Group III nitride semiconductor LEDs using a Si single crystal as a substrate include, for example, aluminum gallium nitride (A
_{l a Ga 1-a N:} 0 ≦ a ≦ 1) and gallium indium nitride _{(Ga a In 1-a N} : 0 ≦ a ≦ 1) pn consists
A light emitting portion having a junction type double hetero (DH) structure is provided (Appl. Phys. Lett., 72 (4)
(1998), pp. 415-417).

Constituting a light emitting part with a Si single crystal serving as a substrate
The group III nitride semiconductor has a lattice mismatch. Many proposals have been made in the prior art to provide an intermediate layer between the single-crystal substrate and the LED light-emitting portion to buffer the mismatch. For example, there is a proposal to provide an intermediate layer made of aluminum nitride (AlN) in order to buffer lattice mismatch and obtain a high-quality light-emitting portion constituting layer. (The above Appl.P
hys. Lett. , And JP-A-10-242586).

Further, a technique is known in which boron phosphide (BP) is provided as a buffer layer on a zinc-blend type single crystal substrate such as gallium phosphide (GaP) or Si (Japanese Patent Laid-Open Publication No. HEI 9-26139). JP-A-2-275682;
88371; see JP-A-2-288388. Further, there is a proposal to provide a metal film such as titanium (Ti) as an intermediate layer on a Si single crystal substrate (Japanese Patent Application Laid-Open No. 200-200200).
0-261333). Furthermore, a technique has been disclosed in which a nitride layer such as a titanium nitride (TiN) layer or a cobalt (Co) layer is disposed as an intermediate layer on a Si single crystal substrate having a plane orientation of {111} (Japanese Patent Laid-Open No. 2000-2000).
-286449).

On the other hand, the band gap of a Si single crystal is about 1.1 electron volts (unit: eV) (Iwao Teramoto,
"Introduction to Semiconductor Devices" (March 30, 1995,
(See the first edition published by Baifukan Co., Ltd., page 28). This band gap is, for example, less than half as small as the transition energy corresponding to the emission in the blue band. For this reason, in an LED configured with a Si single crystal as a substrate, II
There is a disadvantage that short-wavelength light emitted from the group I nitride semiconductor light-emitting portion is absorbed by the Si single crystal substrate. That is,
In a group III nitride semiconductor LED using Si as a substrate material,
Since the absorption of light emission due to the Si single crystal substrate is inevitable,
There is a problem that it is difficult to obtain a high-luminance group III nitride semiconductor LED.

Group III nitride semiconductor LE using Si as substrate
In order to enhance the light emission intensity of D, Bragg for reflecting light emission to the outside between the Si substrate and the light emitting portion is used.
g) Technical means for providing a reflective (DBR) structure layer are known (Mat. Res. Soc. Symp. Pro).
c. , Vol. 449 (1997), pp. 79-84). The conventional DBR layer has a composition ratio of aluminum (=
It is composed of a periodic laminated structure in which thin layers of Al _a Ga _1-a N (0 ≦ a ≦ 1) different from a) are repeatedly laminated.
The reflectance of light emitted from the DBR layer can be increased by increasing the number of periodic units to be stacked, but there is a problem that the stacking operation becomes complicated.

Conventionally, except for the LED substrate, LED
Although many proposals have been made to improve the light emission intensity of the LED, it is inevitable that the mechanical strength of the LED will be impaired if the substrate is simply removed from the LED, so that a reasonable countermeasure is required. Therefore, development of a method for obtaining a group III nitride semiconductor light-emitting LED having a sufficient luminous intensity and having sufficient mechanical strength by using a simpler technique has been demanded.

[0009]

SUMMARY OF THE INVENTION The present invention relates to a group III nitride semiconductor LED using a Si single crystal as a substrate.
Without removing the mechanical strength of D, the Si single crystal substrate is removed from the LED to reduce the degree to which light emitted from the light emitting portion is absorbed by the Si substrate, and a high-luminance Si-based group III nitride semiconductor LED The aim is to develop technical means to bring about.

[0010]

That is, the present invention provides [1]
Includes at least a light emitting portion of a pn junction type heterojunction structure composed of a group III nitride semiconductor, which is stacked on a surface of a conductive silicon (Si) single crystal substrate via an intermediate layer composed of a metal or a semiconductor. A perforated portion provided with a back electrode on the back surface of the single crystal substrate and a front electrode on the light emitting portion on the front surface, and formed by removing the Si single crystal substrate in a region other than the back electrode on the back surface of the single crystal substrate Is provided, a group III nitride semiconductor light emitting diode,

[2] The II as described in [1] above, wherein the back electrode of the Si single crystal substrate is a continuous and integral metal film electrode.
I-nitride semiconductor light-emitting diode, [3] The III-nitride according to [1] or [2], wherein the back electrode of the Si single crystal substrate is formed as an integral metal film electrode continuous with the outer periphery of the perforated portion. Object semiconductor light emitting diode,

[4] The group III nitride semiconductor light-emitting diode according to any one of [1] to [3], wherein the bottom surface of the perforated portion is the above-mentioned intermediate layer, [5] The intermediate layer is made of phosphorus (P) ), The group III nitride semiconductor light emitting diode according to the above [4], wherein the intermediate layer is MN _1-X P _X (where M is boron Wherein X is in the range of 0 <X ≦ 1.) [4] or [5].
Group III nitride semiconductor light emitting diode according to [7],
[4] or [4] wherein the intermediate layer is composed of B _X M _1-X P (where M represents a Group III element other than boron and X is in the range of 0 <X ≦ 1). [5] The group III nitride semiconductor light-emitting diode according to [7], wherein the intermediate layer is a composition gradient layer obtained by giving a gradient to the concentration of the group III constituent element or the group V constituent element. The group III nitride semiconductor light-emitting diode according to

[9] An intermediate layer composed of a low-temperature buffer layer and a high-temperature buffer layer is provided on a conductive Si single crystal substrate, followed by a lower cladding layer having a pn junction type heterojunction structure, a light emitting layer, and an upper cladding layer. Before or after providing the light emitting portion, the back surface of the Si single crystal substrate is perforated in a hollow cylindrical shape to form a perforated portion, and the first conductive type electrode and the upper cladding layer are formed on the remaining back surface of the Si single crystal substrate. A method of manufacturing a group III nitride semiconductor light emitting diode, wherein a second conductivity type electrode is provided on the upper surface, [10] The low temperature buffer layer is a MOCV
A layer grown at 250 to 550 ° C. by means D,
High temperature buffer layer is 750-1200 ° C by MOCVD means
[11] The method for manufacturing a group III nitride semiconductor light-emitting diode according to the above [9], wherein an intermediate layer made of a composition gradient buffer layer is provided on a conductive Si single crystal substrate, followed by a pn junction type Before or after providing the light emitting portion comprising the lower cladding layer, the light emitting layer and the upper cladding layer of the hetero junction structure, the back surface of the Si single crystal substrate is punched into a hollow cylindrical shape to provide a hole, and the remaining portion is provided. A method of manufacturing a group III nitride semiconductor light-emitting diode, wherein a first conductivity type electrode is provided on the back surface of the Si single crystal substrate and a second conductivity type electrode is provided on the upper clad layer, and [12] The above [9] wherein the plane orientation of the crystal substrate is {111}.
[13] The method for producing a group III nitride semiconductor light-emitting diode according to any one of [11] to [13], after providing an intermediate layer on the surface of the Si single crystal substrate, grinding the back surface of the Si single crystal substrate. [9] to [12] above, in which the thickness of the substrate is set to 300 to 80 μm, and the perforated portion is provided by removing the single crystal substrate in a portion other than the region where the ohmic electrode is laid.
The above-mentioned problem has been solved by developing a method for manufacturing a group III nitride semiconductor light-emitting diode according to any one of the above.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION The group III nitride semiconductor light emitting diode (LED) of the present invention can be constituted by using a conductive Si single crystal having a plane orientation of {100}, {111} or {110} as a substrate. . The substrate has a resistivity of 10
Any n-type or p-type Si single crystal can be used as long as it has a conductivity of ³ Ω · cm or less, preferably 10 ¹ Ω · cm or less. An ohmic electrode is laid on the back surface using the conductivity of the Si substrate, and LE
Since it is necessary to form D, a high-resistance undoped Si single crystal cannot be suitably used as a substrate. $ 1
The crystal plane of {11} is smaller than that of {100} etc.
Since the i-atoms exist densely, the plane orientation is {111}
When a Si single crystal was used as the substrate, the diffusion of the constituent elements from the intermediate layer into the Si single crystal substrate,
Since intrusion can be further suppressed, it is convenient to form a stoichiometrically balanced intermediate layer.

The Si single crystal in the region where the ohmic electrode (back surface electrode = first electrode) is laid on the back surface of the Si single crystal substrate is left, and the Si single crystal material in the other region is formed by using a known etching technique. Remove. If the substrate material is left only in the region where the back electrode (first electrode) is to be formed, the mechanical strength of the remaining substrate material is utilized as compared with the case where the entire substrate is removed. This has the effect of supporting the LED more firmly. Also, by leaving the conductive substrate material, there is an effect that a back electrode (first electrode) having low contact resistance and excellent ohmic properties is provided thereon.

For example, it is removed by a plasma etching method using a chlorine (Cl) -based gas, or by a wet etching technique using a mixed solution of hydrofluoric acid (HF) and nitric acid (HNO3). May be. That is, the selective removal of the Si single crystal existing in the region other than the region where the back electrode is stacked can be performed through selective patterning using known photolithography. It is desirable that the region from which the Si single crystal is removed has a region other than the required back electrode as wide as possible. As the cross-sectional area of the region from which the Si single crystal is removed is increased, the absorption of light emitted from the light-emitting portion due to the Si substrate material is avoided, so that the area that can transmit light to the outside increases, contributing to the improvement of light emission intensity. it can.

The cross-sectional shape of the region to be subjected to selective patterning may be any shape within the allowable range of the easiness of etching drilling, the size of the cross-sectional area, and the mechanical strength of the group III nitride semiconductor LED for the reasons described above. Can be selected. For example, as shown in FIG. 1, there is a configuration on the back surface 11 b side of the LED substrate 11 in which only the circular perforated portion 13 is provided in the back surface region of the Si single crystal 11 other than the back surface electrode 12. A plurality of the circular perforations may be arranged. 1
FIG. 2 shows an example in which a plurality of circular perforations 13 are provided on the back surface 11b of the Si single crystal substrate 11. Although the horizontal cross-sectional shape of the perforated portion 13 illustrated in FIGS. 1 and 2 is circular, it is a circular shape such as an elliptical shape or a sector shape that forms a part of a circle, in which selective patterning can be easily achieved and etching can be performed. It is preferable if there is.

Regardless of the shape, the luminous intensity increases in proportion to the area of the total cross-sectional area of the perforated portion, rather than the influence of the cross-sectional shape of the perforated portion. For this reason, it is important that the cross-sectional area of the portion where the Si single crystal is removed is made as wide as possible to the extent that the mechanical support force of the light emitting portion is not extremely reduced due to the removal of the substrate.

Further, a perforated portion having a rectangular cross section such as a square, a rectangle, a rhombus, or a parallelogram may be provided. In any case, similarly to the circular perforated portion described in the above embodiment, the cross-sectional shape of the perforated portion is a shape that can be easily obtained by etching. 3 in FIG.
A configuration in which a band-shaped perforated portion 13 having a rectangular cross section is provided on the back surface 11b of the 1｝ -Si single crystal substrate 11 will be exemplified. Even when providing a perforated portion having a rectangular cross-sectional shape, the total cross-sectional area of the perforated portion should be wide enough to prevent an extreme decrease in the mechanical support force of the light emitting portion due to removal of the substrate. Is essential. In order to expand the cross-sectional area from which the Si substrate has been removed, a plurality of rectangular holes can be provided.

It is also possible to provide a band-shaped perforated portion in which the perforated portions are connected in several shapes. There is no problem even if the circular and square perforated portions are connected to form a band-shaped perforated portion.
When the rectangular and circular perforations are combined as illustrated in FIG. 4, the removal area of the substrate can be further increased and the area through which light can be transmitted can be increased as compared with the case where the rectangular perforations are simply provided. Can be fulfilled.

In any of the above-described perforated portions having a horizontal cross-sectional shape, an ohmic electrode is disposed as a back surface electrode of the substrate around the perforated portion. A metal film such as gold (Au) is applied to the p-type Si substrate to form a back-side p-type ohmic electrode. For an n-type Si substrate, for example, aluminum (Al) or aluminum-antimony (Al-S
b) An n-type ohmic electrode can be composed of an alloy or the like. Although a plurality of back electrodes can be provided at positions isolated from each other on the back surface of the Si substrate, it is preferable that the back electrodes be provided so as to be electrically continuous and integral with each other.

The perforations in the group III nitride semiconductor LED of the present invention have the bottom surface as the crystal plane of the above-mentioned intermediate layer.
That is, the perforated portion is stopped when it reaches a portion constituting the intermediate layer (a point where the required strength can be maintained), and the constituent layer of the intermediate layer is exposed as the bottom surface of the perforated portion. In this case, the depth of the perforated portion having the intermediate layer as the bottom surface is substantially equal to the thickness of the Si single crystal substrate. Further, the constituent layer of the light emitting portion layer provided on the intermediate layer may be configured as the bottom surface of the perforated portion.
However, when the perforation is advanced to make the light-emitting portion constituting layer the bottom surface, the luminous intensity increases, but the intermediate layer supporting the mechanical strength of the LED is weakened, so that the LED is made thinner as a whole, As a result, the mechanical strength is deteriorated, which hinders the mechanical support of the light emitting unit. Therefore, if the perforated portion of the Si single crystal forming the substrate is stopped at the intermediate layer below the light emitting portion and the bottom surface is formed as a constituent layer of the intermediate layer, a configuration convenient for mechanically supporting the light emitting portion is obtained.

The perforated portion having a bottom surface as an intermediate layer is formed by stacking an intermediate layer on the surface of a Si single crystal substrate and then forming a single (s) on the intermediate layer.
It can be formed before providing an ingle or double heterogeneous light emitting portion. However, also in this case, it is necessary to insert the process of forming the perforated portion in the middle of the laminating step, so that the laminating step is discontinuous and the step becomes redundant. Further, it can be formed after forming the light emitting portion. On the other hand, as the thickness of the Si single crystal substrate is smaller, the perforated portion can be formed more easily. Therefore, when a laminated structure (light-emitting portion having a pn junction type hetero structure) is grown on the upper surface of the Si single crystal substrate, the back surface of the Si single crystal substrate is polished to reduce the thickness, and then the hole is easily drilled. A part can be formed.

[0024] Further, by reducing the thickness of the Si single crystal substrate by grinding means such as lapping or the like to reduce the thickness of the entire laminated structure, there is an advantage that cutting for individual elements can be easily performed. . If the amount of grinding on the back surface of the Si single crystal substrate is made extremely large and the thickness of the substrate is reduced, the formation of perforated portions and cutting into individual elements become easy, but in order to support the LED with mechanical strength Will be insufficient. The thickness of the remaining Si substrate is approximately 300 to 80
μm, preferably 250 to 100 μm.

Means for forming the intermediate layer from a high melting point metal such as titanium nitride (TiN) or zirconium nitride (ZrN) or a single metal such as aluminum or gold may be considered. However, since the degree of absorption of light emitted from the light emitting portion is remarkably large in a single metal film, when the intermediate layer is formed of a metal film, the light emission is absorbed or shielded by the intermediate layer and is emitted to the outside from the perforated portion. There may be a case where the intensity of light emission is extremely reduced.

The nitride of the high melting point metal may be colored depending on the stoichiometric equivalent ratio between nitrogen and the metal element. Therefore, when the intermediate layer is formed using a metal nitride material, the intensity of light emitted from the perforated portion may become unstable depending on the degree of coloring. III-nitride semiconductor LED
There is hardly any single metal or metal nitride having a lattice constant substantially equal to that of a general group III nitride semiconductor forming the light emitting portion. For this reason, an intermediate layer made of a single metal or a metal nitride is not always suitable for laminating a group III nitride semiconductor layer constituting a light emitting portion having excellent crystallinity due to lattice mismatch. On the other hand, when the intermediate layer is made of a semiconductor material, the effect of reducing the absorption of light emitted by the intermediate layer, which is inevitable with the metal material as described above, is obtained.

Therefore, a strong intermediate layer having excellent mechanical strength can be formed from a III-V compound semiconductor containing phosphorus as compared with a III-V compound semiconductor containing arsenic (As) as a constituent element. The melting point of boron arsenide (BAs) is about 1
3,000 ° C, whereas that of boron phosphide (BP) is as high as about 3000 ° C (Iwao Teramoto, “Introduction to Semiconductor Devices” (March 30, 1995, Baifukan Co., Ltd., first edition,
See page 28). Therefore, from the phosphorus-containing III-V compound semiconductor, there is an advantage that an intermediate layer exhibiting heat resistance can be formed even in a process at a high temperature exceeding about 1000 ° C. when depositing the upper group III nitride semiconductor layer. is there.

The phosphorus-containing III-V compound semiconductors include boron phosphide (BP) and gallium nitride phosphide (GaN).
_1-X P _X : 0 <X ≦ 1), aluminum nitride phosphide (Al
N _{1 -X} P _X : 0 <X ≦ 1), indium phosphide nitride (In)
N _{1 -X} P _X : 0 <X ≦ 1), aluminum boron phosphide (B _X Al _{1 -X} P: 0 <X ≦ 1), gallium boron phosphide (B _X Ga _{1 -X} P: 0 <X) ≦ 1), and indium boron phosphide (B _X In _1-X P: 0 <X ≦ 1). The conduction type of the intermediate layer usually matches the conduction type of the conductive single crystal used as the substrate.

For example, when the buffer layer is made of boron phosphide (BP) having a different lattice constant from that of the Si single crystal, the buffer layer grown at a relatively low temperature (low temperature buffer layer) is composed of the Si single crystal and the multilayer. Lattice mismatch (mism) with the constituent layers of the structure
act) to effectively provide a constituent layer having excellent crystallinity. For example, a BP low-temperature buffer layer formed at a relatively low temperature of not less than 250 ° C. and not more than 500 ° C.
Lattice mismatch with 5% Si single crystal (Katsufusa Shono, "Semiconductor Technology (1st volume)" (The University of Tokyo Press,
(See, 9th printing, June 25, 1992, p. 77), which is effective in providing a constituent layer of a high-quality multilayer structure having a low density of crystal defects such as misfit dislocations (US Pat. 069,021).

When the intermediate layer is formed of a crystal layer having a concentration gradient of a group III constituent element or a group V constituent element, the lattice mismatch between the Si single crystal substrate and the upper layer, for example, a group III nitride semiconductor layer can be reduced. It will be convenient. For example, indium (In) composition ratio at the interface of bonding the Si single crystal substrate was 0.67, boron indium phosphide having a reduced indium composition ratio toward the front surface _{(B X In 1-X P} : 0 <X
≦ 1), an intermediate layer that provides, for example, a gallium phosphide nitride (GaN _1-X P _X : 0 <X ≦ 1) crystal layer having excellent crystallinity as an upper layer while alleviating lattice mismatch with a Si single crystal. Layers can be configured. The intermediate layer having a composition gradient that can provide a group III nitride semiconductor layer excellent in crystallinity with few crystal defects such as dislocations due to lattice mismatch is formed of aluminum nitride phosphide (AlN _1−X P _X : 0 <X) ≦ 1), indium phosphide nitride (InN1-XPX: 0 <X ≦ 1) or the like.

The composition gradient layer in the intermediate layer of the group III nitride semiconductor LED of the present invention is composed of, for example, gallium nitride phosphide (GaN _1-X P _X : 0 <X ≦ 1) or the like with a composition formula MN _1-X P
_X (0 <X ≦ 1, M represents a group III element) is a mixed crystal, and the composition ratio (= X) of phosphorus (P) other than nitrogen (N), which is a constituent element, is determined by the increasing direction of the layer thickness. And the nitrogen composition ratio (= 1−X) is correspondingly increased. The gradient of the composition may be linear, curved, or stepwise (see Japanese Patent Application Laid-Open No. 2000-22211). The intermediate layer having a composition gradient can be formed by changing the addition amount of the supply source of nitrogen and phosphorus added to the growth reaction system at the time of forming the same layer. The intermediate layer in which the composition of the group V element is graded has the effect of relaxing the lattice mismatch with the Si single crystal substrate to provide a group III nitride semiconductor layer having excellent crystallinity.

The intermediate layer can be composed of a phosphorus-containing III-V compound semiconductor crystal layer having a gradient in the composition of the group III constituent elements. In particular, for example, including boron (B) as a Group III constituent element, boron phosphide gallium _{(B X Ga 1-X P} : 0 <
X ≦ 1), indium boron phosphide (B _X In _1-X P: 0 <
Composition formula B _X M _1-X P (0 <X ≦ 1, M is III
Represents a group element. The boron phosphide (BP) -based mixed crystal described in ()) can form an intermediate layer effective for alleviating lattice mismatch with a Si single crystal substrate. In a group III-V compound semiconductor composed of a plurality of group III constituent elements and a single group V constituent element, an intermediate layer is formed by giving a gradient to the composition of boron or other group III constituent elements.

In particular, when a substrate is made of Si single crystal, the composition ratio (= X) of boron (B) is increased in the direction of increasing the layer thickness, and conversely, gallium (Ga) or indium (I
A composition gradient layer having a composition gradient so as to reduce the composition ratio of other group III constituent elements such as n) can be suitably used as an intermediate layer.

For example, when the boron composition ratio (= X) at the bonding interface with the Si single crystal substrate is 0.02 and the boron composition ratio at the surface is 1.0, B _X Ga _{1 -X} P is Gallium phosphide (GaN _0.97 P) lattice-matched to a single crystal (lattice constant = 5.431 °) substrate and having a nitrogen composition ratio of 0.97
_0.03 : lattice constant = 4.538 °), which is useful as an intermediate layer that achieves lattice matching. The intermediate layer having a gradient in the composition of the group III element can be obtained by, for example, changing the supply amount of the organometallic compound serving as the group III constituent element material to the reaction system over time when forming the intermediate layer by the MOCVD method. Can be formed.

In the group III nitride semiconductor LED of the present invention, a pn composed of a group III nitride semiconductor conductor laminated on a surface of a conductive silicon (Si) single crystal substrate via an intermediate layer made of a semiconductor. A III-nitride semiconductor light-emitting diode comprising a light-emitting portion having a junction-type heterojunction structure and comprising a back electrode on the back surface of the single-crystal substrate and a front electrode on the light-emitting portion on the front surface side; The perforated portion formed by removing the Si single crystal substrate in a region other than the back surface electrode in the back surface region forms a portion for extracting light emitted from the light emitting portion to the outside.

The intermediate layer forming the bottom surface of the perforated portion of the group III nitride semiconductor light emitting diode of the present invention has a function of firmly supporting the light emitting portion provided on the perforated portion. In particular, the intermediate layer in which the plane orientation formed by the bottom surface of the perforated portion according to the present invention has a {111} plane suppresses the diffusion of elements constituting the intermediate layer into the Si single crystal substrate and emits light provided on the top. It constitutes a part that supports the part more firmly.

The intermediate layer composed of the III-V compound semiconductor film containing phosphorus (P) of the group III nitride semiconductor light emitting diode of the present invention is damaged by the perforation processing when perforating the back surface of the Si single crystal substrate. Forming an intermediate layer having excellent chemical resistance for preventing erosion from reaching the light emitting portion.

In particular, the intermediate layer composed of a composition gradient layer having a gradient in the composition of the group III constituent element or the group V constituent element relaxes the lattice mismatch between the Si single crystal substrate and the upper group III nitride semiconductor layer. As a result, a high-quality group III nitride semiconductor layer having a low crystal defect density is provided, and the group III nitride semiconductor layer constituting the light emitting portion is firmly supported.

A group III nitride semiconductor LED having an intermediate layer consisting of a low-temperature buffer layer and a high-temperature buffer layer can be manufactured, for example, by the following method. An n-type or p-type {111} -Si single crystal substrate is used as a substrate material, and a low-temperature buffer layer formed at a lower temperature than a high-temperature buffer layer provided thereon and a higher temperature than a low-temperature buffer layer provided on the low-temperature buffer layer An intermediate layer consisting of a high-temperature buffer layer formed by the above is provided. As the low-temperature buffer layer, about 250 to 550 ° C. by MOCVD means
At 750-1200 ° C. to form an amorphous boron phosphide layer grown at a low temperature.
A single boron phosphide single crystal layer is grown by OCVD means. The high-temperature buffer layer is for maintaining the mechanical strength of the LED, and is selected from a group III-V compound semiconductor having relatively excellent mechanical strength, and the low-temperature buffer layer assists the lamination of the substrate and the high-temperature buffer layer. Use a compound layer.

On the intermediate layer, a light emitting portion composed of a lower cladding layer, a light emitting layer and an upper cladding layer is laminated. Lower cladding layer is n-type or p-type lattice-matched to high-temperature buffer layer
A group III nitride semiconductor crystal layer, for example, a GaN _0.97 P _0.03 crystal layer matching the BP high temperature buffer layer is provided at 850-1200 ° C. An n-type or p-type group III nitride semiconductor layer is formed thereon at a lower temperature than the lower cladding layer.
This light emitting layer may have a quantum well structure. The upper cladding layer is a p-type or n-type group III nitride semiconductor layer having a conduction system opposite to that of the lower cladding layer. Next, a first-conductivity-type electrode is provided on the etched remaining part of the substrate, and a second-conductivity-type electrode is provided on the upper cladding layer, to obtain a group III nitride semiconductor LED.

The perforated portion may be perforated in any step after the lamination of the intermediate layer on the substrate and after the lamination of the intermediate layer and the light emitting portion on the substrate. Prior to drilling, wrap the back surface of the Si substrate to about 300-80 μm
After polishing to a thickness of, it is preferable to perform perforation by wet etching at about 10 to 30 ° C. using a mixed solution of hydrofluoric acid and nitric acid.

Further, a composition gradient buffer layer is provided as an intermediate layer.
The group III nitride semiconductor LED can be manufactured, for example, by the following method. An n-type or p-type {111} -Si single crystal substrate is used as a substrate material, and a composition gradient buffer layer in which boron content is increased in the direction of increasing the layer thickness by MOCVD means on this substrate is formed by gallium boron phosphide. Film.
At the time of growth, the boron concentration is regulated so as to obtain the same lattice constant as that of the Si single crystal, and the gallium source is reduced at the final stage so as to obtain the same lattice constant as that of the lower clad layer formed thereon. The composition gradient buffer layer is approximately 600 to 120
It can grow at a temperature of 0 ° C. During the growth, the temperature may be kept constant or may be changed midway. On this composition gradient buffer layer, a light emitting portion composed of a lower cladding layer, a light emitting layer and an upper cladding layer is laminated.

The lower cladding layer is a p-type group III nitride semiconductor layer lattice-matched to the composition gradient layer, and is grown at about 850 to 1200 ° C. by MOCVD. Next, the light emitting layer is a p-type group III nitride semiconductor layer lattice-matched to the cladding layer, and this layer may have a quantum well structure. The upper cladding layer is an n-type group III nitride semiconductor crystal layer,
The film is formed by CVD means. The first conductivity type electrode uses aluminum or its alloy, and the second conductivity type electrode uses gold or its alloy. Hereinafter, specific examples will be described.

[0044]

(Embodiment 1) S having a circular perforation on the back surface
The present invention will be specifically described by taking a group III nitride semiconductor LED using an i single crystal as a substrate as an example. FIG. 5 schematically shows a cross-sectional structure of the LED 10 according to the present embodiment.

As the substrate 101, a boron (B) -doped p-type (100) -Si single crystal was used. On the substrate 101, a low-temperature buffer layer 102 made of boron phosphide (BP) was deposited. The low-temperature buffer layer 102 is made of triethyl boron ((C ₂ H ₅ ) ₃
B) / phosphine (PH ₃ ) / hydrogen (H ₂ ) based atmospheric pressure MOC
It was grown at 350 ° C. by the VD method. The thickness of the buffer layer 102 was about 14 nm. On the surface of the low-temperature buffer layer 102, 950 is applied using the MOCVD vapor deposition means described above.
A p-type BP layer doped with magnesium (Mg) at ° C. was laminated as a high-temperature buffer layer 103. Biscyclopentadienyl magnesium doping source of magnesium (molecular _{formula: bis- (C 5 H 4)} 2 Mg) were used. The carrier concentration of the high-temperature buffer layer 103 was about 7 × 10 ¹⁸ cm ⁻³ . The layer thickness was about 350 nm.

On the high temperature buffer layer 103, a magnesium-doped p-type gallium phosphide (composition formula: GaN _0.97 P _0.03 ) layer having a phosphorus (P) composition ratio of 0.03 (= 3%) is formed as a lower cladding layer. It was laminated as 104. GaN _0.97 P
_{The 0.03} layer is made of trimethylgallium ((CH ₃ ) ₃ Ga) / P
It was grown at 950 ° C. by an H3 / ammonia (NH ₃ ) / H ₂ system atmospheric pressure MOCVD method. Cubic p-type GaN
The carrier concentration of the _0.97 P _0.03 layer was about 8 × 10 ¹⁷ cm ⁻³ , and the layer thickness was about 85 nm.

On the lower cladding layer 104, an n-type gallium indium nitride (composition formula Ga _X In _{1 -X} N: 0 ≦ X ≦
The light emitting layer 105 of 1) was laminated. Light emitting layer 105
(Si) -doped Ga _x In _{1 -x} N layer
₃ ) ₃ Ga / trimethylindium ((CH ₃ ) ₃ In) /
It was grown at 850 ° C. by a disilane (Si ₂ H ₆ ) / NH ₃ / H ₂ system normal pressure MOCVD method. The average indium (In) composition ratio of the light-emitting layer 105 was 0.10. The layer thickness of the light emitting layer 105 was about 80 nm. The carrier concentration was set to about 3 × 10 ¹⁸ cm ⁻³ .

On the Ga _0.90 In _0.10 N light emitting layer 105,
Silicon (Si) with graded aluminum (Al) composition
Doped n-type aluminum nitride-gallium mixed crystal (Al _γ G
a _{1 -γN} ) layer was laminated as the upper cladding layer 106.
The Al composition ratio (= γ) ranges from 0.2 to 0 in the increasing direction of the layer thickness.
(Zero) monotonically decreased substantially linearly. 200n layer thickness
m.

The lower cladding layer 104 composed of the p-type GaN _0.97 P _0.03 lower cladding layer 104, the n-type Ga _0.90 In _0.10 N light-emitting layer 105, and the n-type Al _γ Ga _1-γ N composition gradient layer is used to form a pn junction type. The light emitting section 107 having a double hetero junction structure was formed.

Using a known photolithography technique and a selective etching technique, as shown in FIG.
It was perforated into a hollow cylindrical shape having a thickness of 0 μm. The perforated portion 109 was formed by etching and removing a Si single crystal with a mixed solution of hydrofluoric acid (HF) and nitric acid (HNO ₃ ). The depth of the perforated portion 109 was set to about 300 μm corresponding to the thickness of the substrate 101.
The etching was allowed to proceed until the BP low-temperature buffer layer 102 was exposed on the bottom surface 109a of the perforated portion 109. Gold (A) is formed on the Si single crystal substrate 101 left around the perforated portion 109.
u) A p-type ohmic electrode 110 made of a coating was arranged. In the center of the surface of the upper cladding layer 106, gold (Au)
A circular ohmic electrode 108 made of The diameter of the n-type ohmic electrode 108 was about 130 μm. The center of the circular bottom surface 109a of the perforated portion 109 was aligned with the center of the horizontal shape of the surface ohmic electrode 108.

LE between both ohmic electrodes 108 and 110
D drive current was passed. The current-voltage (IV characteristics) showed normal rectification characteristics based on good pn junction characteristics of the light emitting unit 107. The forward voltage (so-called Vf) obtained from the IV characteristics was about 3 V (forward current = 20 mA). The reverse voltage is about 15 V (reverse current = 10 μm).
A). When an operating current of 20 milliamperes (mA) is passed in the forward direction, the emission center wavelength is about 470 nm.
Blue light was emitted. The half width of the emission spectrum was about 18 nm. The light emission intensity in a chip state measured using a general integrating sphere was about 18 microwatts (μW), and a group III nitride semiconductor light emitting device with high light emission intensity was provided.

Example 2 Phosphorus (P) -doped n-type # 11
On a 1 ラ ン -Si single crystal substrate 201, diborane (molecular formula:
_{B 2 H 6) / (CH} 3) 3 Ga / PH 3 / H 2 system vacuum MOCV
Boron phosphide / gallium phosphide (composition formula: B) in which the boron (B) composition ratio (= X) is increased in the direction of increasing the layer thickness at 650 ° C. by the method D.
A buffer layer 202 composed of a (B _X Ga _{1 -X} P) composition gradient layer was laminated. The pressure of the reaction system during growth was set to about 1.3 × 10 ⁴ Pascal (unit: Pa). The thickness of the buffer layer 202 was 0.8 μm. S of the B _X Ga _1-X P composition gradient layer 202
Boron (B) composition ratio at the interface with the i-single crystal 201 (=
X) is the same lattice constant as the Si single crystal (= 5.431)
Å) was set to 0.02 so that Å) was obtained. The boron composition ratio on the surface was set to 1.0 which obtains the same lattice constant (= 4.538 °) as that of the upper GaN _0.97 P _0.03 lower cladding layer. The boron composition ratio (= X) was linearly increased in the direction in which the thickness of the buffer layer 202 increased. The boron composition ratio increases the supply amount of diborane as a boron source to the MOCVD reaction system with time,
Conversely, the supply amount of trimethylgallium ((CH ₃ ) ₃ Ga) as a gallium (Ga) source was reduced and changed.
During the growth of B _X Ga _1-X P compositional gradient layer 202, doped with silicon (Si) using disilane (Si ₂ H ₆₎ -H ₂ mixed gas.

On the B _x Ga _{1 -x} P composition gradient buffer layer 202, a silicon (Si) -doped n-type gallium nitride phosphide having a phosphorus (P) composition ratio of 0.03 (= 3%) (composition formula) : Ga
N _0.97 P _0.03 ) layer was laminated as the lower cladding layer 204. The GaN _0.97 P _0.03 layer is made of trimethyl gallium (molecular formula: (CH ₃ ) ₃ Ga) / PH ₃ / NH ₃ / H ₂ normal pressure MO.
It was grown at 950 ° C. by the CVD method. Cubic n-type G
The carrier concentration of the aN _0.97 P _0.03 layer is about 8 × 10 ¹⁷ cm ⁻³
And the layer thickness was about 85 nm.

On the lower cladding layer 204, an n-type gallium indium nitride (composition formula: Ga _X In _{1 -X} N: 0 ≦ X ≦
The light emitting layer 205 composed of 1) was laminated. Light emitting layer 205
(Si) -doped Ga _x In _{1 -x} N layer
₃ ) The film was grown at 850 ° C. by the atmospheric pressure MOCVD method based on ₃ Ga / (CH ₃ ) ₃ In / Si ₂ H ₆ / NH ₃ / H ₂ . The average indium (In) composition ratio of the light emitting layer 205 is 0.10
And The thickness of the light emitting layer 205 was set to about 80 nm, and the carrier concentration was set to about 3 × 10 ¹⁸ cm ⁻³ .

On the Ga _0.90 In _0.10 N light emitting layer 205,
A p-type gallium nitride mixed crystal (GaN) layer doped with both zinc (Zn) and magnesium (Mg) was laminated as the upper cladding layer 206.

The light emitting portion 207 having a pn junction type double hetero junction structure is formed from the n-type GaN _0.97 P _0.03 lower cladding layer 204, the n-type Ga _0.90 In _0.10 N light emitting layer 205, and the upper cladding layer 206 composed of the p-type GaN layer. Was configured.
FIG. 7 schematically shows a cross-sectional structure of the laminated structure of the present embodiment.

Next, the {111} -Si single crystal substrate 20
1 was polished to reduce the thickness of the substrate from about 350 μm to about 150 μm. Thereafter, using known photolithography technology and selective etching technology, n-type Si
A rectangular perforated portion 209 as shown in FIG. 8 was provided in the center of the back surface of the single crystal substrate 201. The length of the short side of the perforated portion 209 was 200 μm, and the length of the long side was 250 μm. The perforated portion 209 was formed by removing the Si single crystal 201 using plasma etching means using a chlorine-based gas.
The depth of the perforated portion 209 from the back surface of the substrate 201 is about 150 μm.
m. On the bottom surface 209 a of the perforated portion 209, a {111} -B _X Ga _{1 -X} P buffer layer 2 obtained by using a Si single crystal having a plane orientation of {111} as the substrate 201.
02 was exposed. On the Si single crystal left so as to surround the perforated portion 209, n (gold) made of gold (Au)
An ohmic electrode 208 was provided.

On almost the entire surface of the upper cladding layer 206, a p-type ohmic electrode 210 made of a thick film having a multilayer structure of gold (Au) and nickel oxide (NiO) was formed.
The thickness of the gold coating was about 2 μm, and the thickness of the nickel oxide was about 0.5 μm.

After bonding the p-type ohmic electrode 210 side of the LED 20 configured as described above to the support by conduction,
The intensity of light emitted through the perforated portion 209 and emitted to the outside was measured. Emission intensity measured using a general integrating sphere in this mounted state is about 16 microwatts (μW)
Thus, a group III nitride semiconductor light-emitting device having a high emission intensity was provided. The center wavelength of light emission was about 470 nm, and the half width of the light emission spectrum was about 20 nm. The forward voltage (Vf) was about 3 V (forward current = 20 mA).
The reverse voltage is about 15 V (reverse current = 10 μA)
Met.

[0060]

According to the present invention, a p-type nitride semiconductor composed of a group III nitride semiconductor is laminated on a surface of a conductive silicon (Si) single crystal substrate via an intermediate layer composed of a metal or a semiconductor.
A group III nitride semiconductor light-emitting diode including at least a light-emitting portion having an n-junction heterojunction structure, a back electrode on the back surface of the single crystal substrate, and a front electrode on the light-emitting portion on the front surface side, Providing a perforated portion formed by partially removing the single crystal substrate on the back surface of the crystal substrate, and arranging an ohmic electrode on the remaining conductive Si single crystal substrate around the perforated portion to constitute an LED; Therefore, without completely losing the mechanical strength of the LED, the absorption of luminescence due to the Si single crystal substrate is completely or significantly reduced, and the luminescence of the LED can be extracted to the outside through the perforated portion. It is possible to provide a group III nitride semiconductor LED having excellent characteristics.

In this case, when the Si single crystal is surely removed so that the crystal plane of the intermediate layer is exposed on the bottom surface of the perforated portion, the absorption of light emission caused by the Si single crystal in the perforated portion is completely eliminated. Since the light emission can be extracted to the outside without reducing the light emission intensity, it is possible to provide a group III nitride semiconductor LED with high light emission intensity. Further, when the single crystal of the perforated portion is reliably removed and the {111} crystal plane of the intermediate layer is exposed on the bottom surface, the absorption of light emitted by the single crystal silicon substrate can be avoided and the single crystal silicon can be avoided. It is possible to provide a substrate-removed group III nitride semiconductor LED having a light-emitting portion that is firmly held, by compensating for a decrease in the supporting force of the light-emitting portion caused by removing the crystal substrate.

In particular, when the intermediate layer is formed from a III-V compound semiconductor film containing phosphorus (P), the mechanical strength is superior to that of a III-V semiconductor containing arsenic as a constituent element.
In addition, since the melting point is extremely high, a group III nitride semiconductor LED having an intermediate layer that can firmly support the light emitting portion and has excellent heat resistance can be configured. III
By forming a composition gradient layer in which the composition of the group-constituting element or the group V-constituting element is graded, an intermediate layer lattice-matched to both the Si single crystal and the upper group III nitride semiconductor layer can be formed. Since the density of crystal defects caused by lattice mismatch at the interface with the semiconductor layer can be reduced, a group III nitride semiconductor layer having good crystallinity can be obtained, and a group III nitride semiconductor LED having high emission intensity can be obtained.

[Brief description of the drawings]

FIG. 1 is a schematic plan view illustrating a perforated shape of a perforated portion.

FIG. 2 is a schematic plan view illustrating a perforation shape of a perforation portion.

FIG. 3 is a schematic plan view illustrating a perforation shape of a perforation portion.

FIG. 4 is a schematic plan view illustrating a perforation shape of a perforation portion.

FIG. 5 is a schematic sectional view of the LED described in Example 1.

FIG. 6 is a schematic diagram showing the structure of the back surface of the LED described in Example 1.

FIG. 7 is a schematic sectional view of the LED described in Example 2.

FIG. 8 is a schematic diagram showing the structure of the back surface of the LED described in Example 2.

[Explanation of symbols]

 10, 20 Group III nitride semiconductor LED 11, 101, 201 Single crystal silicon substrate 11b Substrate back surface 12 Back surface electrode 13 Perforated portion 102 Boron phosphide (BP) low-temperature buffer layer 103 BP high-temperature crystal layer 202 Composition gradient buffer layer 104, 204 Lower cladding layer 105, 205 Light emitting layer 106, 206 Upper cladding layer 107, 207 Light emitting portion 108, 208 N-type ohmic electrode 109, 209 Perforated portion 109a, 209a Perforated portion bottom surface 110, 210 P-type ohmic electrode

Claims (13)

[Claims] 1. A pn-junction heterojunction structure composed of a group III nitride semiconductor laminated on a surface of a conductive silicon (Si) single crystal substrate via an intermediate layer composed of a metal or a semiconductor. At least a light emitting portion, a back electrode on the back surface of the single crystal substrate, a front electrode on the light emitting portion on the front side, and removing the Si single crystal substrate in a region other than the back electrode on the back surface of the single crystal substrate. A group III nitride semiconductor light-emitting diode, characterized in that a perforated portion formed by forming is provided. 2. The group III nitride semiconductor light emitting diode according to claim 1, wherein the back electrode of the Si single crystal substrate is a continuous and integral metal film electrode. 3. The group III nitride semiconductor light emitting diode according to claim 1, wherein the back electrode of the Si single crystal substrate is formed as an integral metal film electrode continuous with the outer periphery of the perforated portion. 4. The group III nitride semiconductor light emitting diode according to claim 1, wherein the bottom surface of the perforated portion is the intermediate layer. 5. The group III nitride semiconductor light emitting diode according to claim 4, wherein the intermediate layer is formed of a group III-V compound semiconductor film containing phosphorus (P). 6. An intermediate layer comprising MN _1-X P _X (where M represents a Group III element other than boron, and X is in the range of 0 <X ≦ 1). 6. The group III nitride semiconductor light-emitting diode according to 4 or 5. 7. The intermediate layer according to claim 1, wherein B _X M _1-X P (where M represents a Group III element other than boron, and X is in the range of 0 <X ≦ 1). Item 6. The group III nitride semiconductor light emitting diode according to item 4 or 5. 8. The group III nitride semiconductor light emitting diode according to claim 7, wherein the intermediate layer is formed as a composition gradient layer by giving a gradient to the concentration of a group III constituent element or a group V constituent element. 9. A low-temperature buffer layer on a conductive Si single crystal substrate,
A single-crystal Si substrate is provided before or after providing a light emitting part comprising a lower cladding layer, a light emitting layer and an upper cladding layer of a pn junction type heterojunction structure provided with an intermediate layer comprising a high temperature buffer layer. The back surface is pierced into a hollow cylindrical shape to provide a pierced portion, and a first surface is formed on the back surface of the remaining Si single crystal substrate.
A method for manufacturing a group III nitride semiconductor light-emitting diode, comprising: providing a conductive type electrode and a second conductive type electrode on an upper surface of an upper cladding layer. 10. The low-temperature buffer layer is formed by MOCVD means.
A layer grown at 50 to 550 ° C.
Grown at 750-1200 ° C. by OCVD means,
A method for manufacturing a group III nitride semiconductor light emitting diode according to claim 9. 11. An intermediate layer made of a composition gradient buffer layer is provided on a conductive Si single crystal substrate, and subsequently, a light-emitting portion consisting of a lower clad layer, a light-emitting layer, and an upper clad layer having a pn junction type hetero-junction structure is provided. Before or after providing the light emitting portion, the back surface of the Si single crystal substrate is perforated in a hollow cylindrical shape to form a perforated portion, and the first conductive type electrode is provided on the back surface of the remaining Si single crystal substrate, and the second conductive material is provided on the upper surface of the upper cladding layer. A method for manufacturing a group III nitride semiconductor light emitting diode, comprising providing a shaped electrode. 12. The method for manufacturing a group III nitride semiconductor light emitting diode according to claim 9, wherein the plane orientation of the conductive Si single crystal substrate is {111}. 13. After providing an intermediate layer on the surface of the Si single crystal substrate, grinding the back surface of the Si single crystal substrate to a thickness of 300 to 80 μm, and then excluding the region other than the region where the ohmic electrode is laid. The III according to any one of claims 9 to 12, wherein a perforated portion is provided by removing a part of the single crystal substrate.
A method for manufacturing a group III nitride semiconductor light emitting diode.