JP3541775B2 - Group III nitride semiconductor light emitting device wafer, method of manufacturing the same, and group III nitride semiconductor light emitting device - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a group III nitride semiconductor light emitting device having a group III nitride semiconductor layer provided on a surface of a silicon (Si) single crystal substrate via a buffer layer made of boron phosphide (BP) material. The present invention relates to a wafer, a method of manufacturing the same, and a group III nitride semiconductor light emitting device such as a light emitting diode or a laser diode using a group III nitride semiconductor layer manufactured from the wafer as a light emitting unit.
[0002]
[Prior art]
Conventionally, a group III nitride semiconductor represented by the general formula Al _X Ga _Y In _Z N (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ Z ≦ 1, X + Y + Z = 1) has a blue band or green band. It is used as a material for forming a light emitting element such as a light emitting diode (LED) or a laser diode (LD) that emits short wavelength visible light such as a band. In recent years, a technique has been known in which a light emitting portion having a pn junction type double hetero (DH) structure made of the above-mentioned group III nitride semiconductor is formed on a substrate made of silicon (Si) single crystal (Japanese Patent Laid-Open No. Hei 11 (1999)). -40850 publication). In this case, the plane orientation of the Si single crystal used as the substrate is usually {100} or {111} (Japanese Patent Application Laid-Open No. 10-242586).
[0003]
More recently, when a group III nitride semiconductor layer is deposited on a Si substrate having a {100} surface by a vapor phase growth method, a crystal layer made of a boron phosphide (BP) -based material is used as a buffer layer. (Japanese Patent Application Laid-Open No. H11-162848). The zinc-blende BP crystal (lattice constant = 4.538 °) has a lattice mismatch (mismatch) degree of about 0.6% with cubic gallium nitride (GaN) having a lattice constant of 4.510 °. It is. Therefore, when the buffer layer is made of BP crystal, it is advantageous to form a GaN crystal layer having a low crystal defect density thereon.
[0004]
Japanese Patent Application Laid-Open No. 11-266006 discloses that a buffer layer made of boron nitride phosphide (BP _1-X N _x , where 0 ≦ X ≦ 1), which is one of BP-based materials, is provided on a Si single crystal substrate. A technique for laminating a GaN-based group III nitride semiconductor layer has been disclosed. Since BP _0.94 N _0.06 having a composition ratio of nitrogen (N) of about 6% achieves lattice matching with cubic GaN, using a buffer layer made of BP _0.94 N _0.06 causes crystal defects on the Si single crystal substrate. This is advantageous for forming a semiconductor layer composed of a small amount of GaN.
[0005]
[Problems to be solved by the invention]
However, the magnitude of the lattice mismatch between the substrate single crystal Si (lattice constant = 5.4308 °) and, for example, zinc-blende crystal-type BP reaches about 17% (“Journal of the Japan Society for Crystal Growth”, Vol. 25, No. 3 (1998), page A28).
Therefore, when the buffer layer made of BP is formed on the Si single crystal substrate, the buffer layer made of the BP formed on the Si single crystal substrate having the {100} plane and the BP formed on the substrate is caused by the lattice mismatch. Adhesion becomes insufficient, and the BP buffer layer is easily peeled off from the Si substrate.
[0006]
On the other hand, since the general planar shape of the group III nitride semiconductor light emitting device is a square, when a Si single crystal having a {111} plane is used as a substrate, a rectangular shape is formed by using cleavage in the [110] direction. There is a problem that it is difficult to stably form a light emitting element. Therefore, it is not preferable in terms of manufacturing a light emitting element to use a Si single crystal having a {111} plane as a substrate for a light emitting element instead of a Si single crystal substrate having a {100} plane.
[0007]
The present invention has been made in order to overcome the above-mentioned problems of the prior art. The present invention provides a method in which a rectangular light emitting element can be easily formed by cleavage, and the substrate is formed on a Si single crystal substrate having a {100} surface. A wafer for a group III nitride semiconductor light emitting device manufactured by forming a buffer layer made of a BP-based material in close contact with the substrate, and further forming a group III nitride compound semiconductor layer on the buffer layer, a method for manufacturing the same, and the wafer It is an object of the present invention to provide a group III nitride semiconductor light emitting device manufactured from the same.
[0008]
[Means for Solving the Problems]
That is, the invention of the present application provides a substrate made of silicon (Si) single crystal, a buffer layer made of a boron phosphide (BP) material provided on the surface of the substrate, and a group III nitride film provided on the buffer layer. A III-nitride semiconductor light-emitting device wafer comprising: a semiconductor layer; and a substrate having a {100} surface, and a quadrangular pyramid-shaped narrow surface having {111} side walls on the surface. A hole is provided.
In the above invention, it is preferable that the length (W) of one side of the bottom surface of the quadrangular pyramid-shaped pore is in a range of 10 μm or more and 500 μm or less.
Further, in the above invention, it is preferable that the quadrangular pyramid-shaped fine holes are regularly provided on the substrate surface at regular intervals.
Further, the invention of the present application is a group III nitride semiconductor light emitting device manufactured using the above-described wafer for a group III nitride semiconductor light emitting device.
[0009]
Another invention of the present application is directed to a substrate made of silicon (Si) single crystal, a buffer layer made of a boron phosphide (BP) -based material provided on the surface of the substrate, and a III layer provided on the buffer layer. A method of manufacturing a group III nitride semiconductor light emitting device wafer comprising: a group III nitride semiconductor layer, a quadrangular pyramid having a {100} surface and having a {111} side wall on the surface. A buffer layer made of a BP-based material is formed by a vapor phase growth method on the surface of the Si single crystal substrate provided with the pores described above. In the above invention, it is desirable to further form a group III nitride semiconductor layer on the buffer layer made of the BP-based material by a vapor phase growth method.
Further, in the above invention, it is desirable that the vapor phase epitaxy is an organometallic thermal decomposition vapor phase epitaxy (MOCVD).
Further, in the above invention, it is preferable that the quadrangular pyramid-shaped pores are provided by etching.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a schematic plan view of a Si single crystal substrate having a {100} plane according to the present invention. FIG. 2 is a cross-sectional view of the Si single crystal substrate shown in FIG. 1 along the broken line AA ′, and is a schematic diagram particularly showing the cross-sectional shape of the pores.
[0011]
Referring to FIG. 1, the feature of a Si single crystal substrate 10 having a surface of {100} plane used as a substrate in the present invention is that a side wall 12 is formed on a surface 11 of the substrate 10 having a {100} plane. That is, a pyramid-shaped pore (pit) 13 having a {111} plane is formed.
The pores 13 can be formed by wet etching using, for example, an aqueous solution of sodium hydroxide (NaOH) or an aqueous solution of potassium hydroxide (KOH). As a typical method for forming the pores 13, for example, wet etching of the surface 11 of the Si single crystal substrate 10 is performed using an aqueous NaOH solution having a weight concentration of about 5% at a temperature of 85 ° C. for about 5 minutes. There is a way. This method can be used regardless of whether the conductivity type of the substrate 10 is n-type or p-type. Alternatively, the pores 13 of the present invention are formed on the surface 11 of the Si single crystal substrate 10 by etching the surface 11 of the substrate 10 at 65 ° C. for about 5 minutes using a KOH aqueous solution having a weight concentration of about 50%. Can be formed.
[0012]
Although the pores 13 can be formed irregularly on the surface 11 of the Si single crystal substrate 10, it is better to form the pores 13 uniformly on the surface 11 of the Si single crystal substrate in a later step. It is convenient to form
As a means for forming regular pores 13 having a constant distance between each other on the surface 11 of the Si single crystal substrate 10, a desired region of the surface 11 of the Si single crystal substrate 10 is heat-resistant such as silicon dioxide (SiO ₂ ). There is a method in which the pores 13 are formed by selective etching such as, for example, gas etching after partially covering with a water-resistant and chemical-resistant film. In the case of such gas etching, a gas containing halogen (halogen) such as hydrogen chloride (HCl) or a mixed gas of hydrogen and hydrogen can be used as an etching gas.
[0013]
If the method of forming the pores 13 using the selective etching described above is used, the area of the bottom surface 13a of the pores 13 can be adjusted by adjusting the plane area of the region covered with the film. That is, the length of one side of the bottom surface 13 a of the pore 13 which is substantially square (denoted by the symbol “W” in FIGS. 1 and 2) is the size of the region not covered by the coating on the surface 11 of the substrate. By selectively etching the surface of a substrate in which regions not covered by a film are regularly arranged on the surface 11 in the same plane shape and plane area, the pores 13 having a constant W are formed in the Si single crystal substrate 10. And can be formed by regularly arranging them on the surface 11.
[0014]
As described above, the degree of lattice mismatch between the BP crystal and cubic GaN or cubic aluminum nitride (AlN) is as small as about 1% or less. Further, the lattice spacing (about 3.21) of the {110} crystal plane of the BP crystal is a hexagonal wurtzite crystal type GaN (a-axis lattice constant = 3.18) or AlN (a-axis lattice constant). = 3.11Å). Therefore, the buffer layer made of a BP crystal advantageously acts on forming a high-quality group III nitride semiconductor layer having a low density of crystal defects due to lattice mismatch.
On the other hand, there is a crystal lattice mismatch of about 17% between the Si single crystal (lattice constant = 5.4308 °) and the BP crystal. However, the spacing between the {111} planes of the Si single crystal is about 3.14, which is almost equal to the spacing between the {110} crystal planes (about 3.19) of the BP crystal. The formation of a high-quality BP crystal layer is promoted on the surface composed of planes. That is, a high quality BP crystal layer can be formed on the surface of the {111} plane of the Si single crystal, and as a result, the adhesion between the Si single crystal substrate and the BP buffer layer thereon can be improved. It becomes.
[0015]
However, Si single crystals having {111} planes cannot be cleaved in directions orthogonal to each other, which is inconvenient for manufacturing a rectangular light emitting device. On the other hand, Si single crystals having {100} planes are orthogonal to each other. [110] A rectangular group III nitride semiconductor light emitting device can be easily formed by utilizing cleavage along the crystal orientation.
Therefore, in the present invention, the pores having the {111} faces exposed are formed as described above on the {100} faces of the Si single crystal substrate, and the pores are formed on the basis of the {111} side walls of the pores. By growing a high-quality BP crystal layer, a buffer layer made of a BP crystal having excellent adhesion to a Si single crystal substrate can be formed from a {100} plane without deteriorating the advantage of manufacturing a light-emitting element by cleavage. It can be formed on a Si substrate having a surface. As a result, a high-quality group III nitride semiconductor layer can be formed on the Si substrate having the surface of the {100} plane via the buffer layer.
[0016]
Further, in the present invention, the value of the length (W) of one side of the bottom surface 13a of the pore 13 shown in FIGS. That is, in the manufacture of the light emitting device, it is advantageous to use, as the substrate 10, a Si single crystal having a {100} plane in which the pores 13 having the sizes defined below are formed.
[0017]
The depth (shown by the symbol D in FIG. 2) of the quadrangular pyramid-shaped pore 13 having the {111} plane as the side wall 12 increases as the length W of one side of the bottom surface 13a of the pore 13 increases. That is, there is a relationship between the depth D and the length W of one side, which is approximated by D = 0.58 × W.
If W is extremely large and thus the depth D is extremely large, it is difficult to sufficiently bury the pores 13 with the buffer layer made of a BP-based material. When the pores 13 are not sufficiently buried by the buffer layer, “dents” are generated on the surface of the pores 13 even after the buffer layer is formed. Therefore, the flatness of the surface of the buffer layer made of the BP-based material formed on the surface 11 of the Si substrate 10 is impaired. As described above, on the buffer layer in which a step is formed between the pores 13 and the surface other than the pores 13, a problem occurs that a group III nitride semiconductor layer having no unevenness and excellent surface flatness cannot be formed. . The value of W suitable for sufficiently filling the pores 13 with the buffer layer is approximately 500 μm or less.
[0018]
When W is less than 10 μm, the pores 13 are easily buried in the buffer layer because D becomes shallow. However, in pores having a shallow D as in this case, the pores 13 were easily filled with a crystal made of a BP-based material that rapidly grew on the {111} plane of the Si crystal forming the sidewalls of the pores. In addition, (1.1.-1), (-1.1.-1), (-1.1.1.-1), and (1) constituting the side walls of the pores in the process of forming the buffer layer Pyramidal projections are formed by a crystal made of a BP-based material that grows predominantly in the direction perpendicular to each crystal plane of the .-1.-1) plane. Due to the pyramid-shaped protrusions, the flatness of the surface of the buffer layer becomes inferior, and further, the group III nitride semiconductor layer formed on the buffer layer also becomes inferior in the flatness of the surface.
Therefore, it is preferable that the value of the length W of one side of the bottom surface 13a of the pore 13 be in the range of 10 μm or more and 500 μm or less.
[0019]
It is preferable that the pores having the size of W defined as described above are regularly formed at regular intervals on the surface formed of the {100} plane of the Si substrate. For example, when fabricating a square group III nitride semiconductor light emitting device having a side length (= L) of 350 μm, square pyramid-shaped pores having W of 20 μm have apexes 13b (see FIG. 2) at intervals. An S substrate that is regularly arranged on the surface so as to have a thickness of 30 μm can be used. Due to the presence of the regularly arranged pores, the strength of adhesion between the buffer layer formed of the BP-based material formed on the Si substrate and the surface of the Si substrate can be uniformly increased. In addition, by regularly arranging the pores, for example, in an LED using a group III nitride semiconductor, the intensity of light emitted from the light emitting unit can be made uniform.
[0020]
The buffer layer made of a BP-based material refers to a buffer layer made of a crystal containing boron (B) and phosphorus (P) as constituent elements. That is, the BP-based material also includes, for example, boron nitrided phosphide (BP _1-X N _X , where 0 ≦ X <1) and boron arsenide (BP _1-Y As _Y , where 0 ≦ Y <1). .
The buffer layer made of a BP-based material provided on the surface of the Si substrate is preferably grown by a vapor phase growth method. This buffer layer is formed by, for example, halogen-based vapor phase epitaxy (VPE) using boron trichloride (BCl ₃ ) or phosphorus trichloride (PCl ₃ ) as a raw material, or phosphine (PH ₃ ) instead of phosphorus trichloride. It can be grown by a vapor phase growth method such as a hydride VPE method using a raw material, or a metal organic chemical vapor deposition (MOCVD) method using a trialkyl boron as a boron raw material. Further, it can also be formed by the MO-MBE method which combines the MOCVD method and the molecular beam epitaxial method (MBE method).
[0021]
When a buffer layer made of a BP-based material is used as a buffer layer for mitigating a lattice mismatch between a Si substrate and a group III nitride semiconductor layer such as GaN, the growth temperature of the buffer layer depends on the growth temperature. Regardless of the method, it is preferable to set the temperature to about 200 ° C. or more and 500 ° C. or less. Further, a buffer layer made of a BP-based material is grown on the Si substrate in this temperature range, and a buffer layer made of the BP-based material is grown again at a higher temperature to form a buffer layer having a two-layer structure. It becomes a more suitable buffer layer for growing a low-density group III nitride semiconductor layer.
[0022]
[Action]
A pore having an exposed {111} plane is formed on a {100} plane of the Si single crystal substrate, and a good quality BP crystal layer is formed on the basis of the sidewall of the {111} plane of the Si single crystal substrate. When grown on the surface of the substrate, a buffer layer made of BP crystal having excellent adhesion to the Si single crystal substrate can be formed on the Si substrate.
Further, the buffer layer made of a BP crystal advantageously acts on forming a high-quality group III nitride semiconductor layer having a low density of crystal defects caused by lattice mismatch.
[0023]
【Example】
Hereinafter, an example in which a group III nitride semiconductor light emitting device according to the present invention is manufactured will be described. FIG. 3 is a schematic plan view of the LED 100 according to the present embodiment using a single crystal Si as a substrate and using a group III nitride semiconductor layer as a light emitting unit. FIG. 4 is a schematic cross-sectional view of the LED 100 shown in FIG. 3 along the broken line BB ′.
[0024]
The LED 100 was manufactured from an epitaxial wafer provided with a Si single crystal substrate 101 and a crystal layer sequentially formed on the surface thereof by a vapor deposition method. The Si single crystal substrate 101 and each crystal layer constituting the epitaxial wafer are as follows.
(1) Formed by wet selective etching on a surface consisting of a {100} plane inclined by 2 ° in the <110> direction, with the length of one side of the bottom being approximately 30 μm and the interval between vertices being constant at 45 μm. A substrate 101 made of an n-type Si single crystal doped with antimony (Sb) in which pores 109 are regularly arranged.
(2) On the substrate 101, at a temperature of 350 ° C. and at a temperature of 350 ° C., PH ₃ and ((C ₂ H ₅ ) ₃ B) / phosphine (PH ₃ ) / hydrogen (H ₂ ) are applied by MOCVD at normal pressure. It is made of undoped n-type boron phosphide (BP) having a layer thickness of about 15 nm and grown by setting the supply ratio (V / III ratio) of C ₂ H ₅ ) ₃ B to about 300. First buffer layer 102.
(3) Disilane (Si ₂ H ₆ ) is used as a doping material of silicon (Si), and is stacked at about 1050 ° C. on the low-temperature buffer layer 102 made of BP by the same MOCVD method as described above. A second buffer layer 103 made of Si-doped n-type BP having a carrier concentration of about 2 × 10 ¹⁸ cm ⁻³ .
(4) A layer thickness grown on the second buffer layer 103 at 1050 ° C. by a normal pressure MOCVD method using trimethylgallium ((CH ₃ ) ₃ Ga) / ammonia (NH ₃ ) / H _2. A lower cladding layer 104 made of Si-doped n-type gallium nitride (GaN) having a thickness of about 500 nm and a carrier concentration of about 1 × 10 ¹⁸ cm ⁻³ .
(5) Atmospheric pressure MOCVD using (CH ₃ ) ₃ Ga / cyclopentadienyl indium (I) (C ₅ H ₅ In (I)) / NH ₃ / H ₂ on the lower cladding layer 104 A multi-phase structure composed of a plurality of phases having different In compositions, with an average indium (In) composition ratio of about 0.12, and a layer thickness of about 70 nm. Light-emitting layer 105 made of gallium nitride-indium mixed crystal (Ga _0.88 In _0.12 N).
(6) On the light emitting layer 105, grown at 1030 ° C. by normal pressure MOCVD using (CH ₃ ) ₃ Ga / NH ₃ / H ₂ , the layer thickness is about 650 nm, and the carrier concentration is about 3 × An upper cladding layer 106 made of p-type gallium nitride (GaN) having a thickness of 10 ¹⁷ cm ^-3 .
[0025]
The LED 100 was manufactured using an epitaxial wafer manufactured by sequentially forming the above crystal layers on the surface of the Si single crystal substrate 101 by a vapor growth method. The LED 100 was manufactured by forming the following p-type and n-type ohmic electrodes 107 and 108 on the above-described epitaxial wafer by using a well-known photolithography (photolithography) technique.
(1) A circular p-type ohmic electrode 107 made of gold (Au) and having a diameter of about 130 μm, formed on the uppermost cladding layer 106.
(2) An n-type ohmic electrode 108 made of aluminum (Al) formed on substantially the entire back surface of the Si single crystal substrate 101.
Next, utilizing the cleavage property of the Si single crystal substrate 101 in the [110] direction, the epitaxial wafer on which the p-type and n-type ohmic electrodes 107 and 108 are formed is divided into individual LEDs by a general scribe means. did. The planar shape of the LED was a square with one side of about 350 μm.
[0026]
With respect to this LED, a gold (Au) wire is connected (bonded) to the p-type ohmic electrode 107, the bonding strength is measured, and the Si single crystal substrate 101, the first buffer layer 102, and the second buffer layer 103 are measured. Was evaluated for adhesion.
In a general pull test for measuring the bonding strength, in the case of about 500 LED samples according to the present embodiment, the first load from the surface of the Si single crystal substrate 101 with respect to a tensile load of 5 g was measured. No peeling of the buffer layer 102 and the second buffer layer 103 was observed.
[0027]
On the other hand, in the conventional LED in which the pores according to the present invention are not provided on the surface of the Si single crystal substrate, in the same tensile test in which the tensile load was set to 5 g, 20% of the sample was compared with the buffer with the buffer. Partial delamination between the layers occurred.
[0028]
Further, with respect to the LED of this example, current was passed between the p-type and n-type ohmic electrodes 107 and 108, and the following characteristics were obtained.
(A) Emission wavelength = 456 nm (however, forward current = 20 mA)
(B) Emission luminance = 1.2 candela (cd) (however, forward current = 20 mA)
(C) Forward voltage = 3.8 volts (V) (however, forward current = 20 mA)
(D) Reverse voltage = 15 V or more (However, reverse current = 10 μA)
[0029]
【The invention's effect】
According to the present invention, in a Si single crystal substrate having a {100} plane as a surface, quadrangular pyramid-shaped pores having a {111} plane as a side wall are formed on the surface. A buffer layer made of a boron phosphide (BP) -based material having excellent properties can be formed, and a group III nitride semiconductor layer having excellent crystallinity can be formed on the buffer layer. From the semiconductor light emitting device wafer thus manufactured, a group III nitride semiconductor light emitting device can be easily manufactured by utilizing the cleavage property.
[Brief description of the drawings]
FIG. 1 is a schematic plan view of a Si single crystal substrate having a {100} plane according to the present invention.
FIG. 2 is a cross-sectional view of the Si single crystal substrate shown in FIG. 1 along the broken line AA ′.
FIG. 3 is a schematic plan view of an LED according to an embodiment of the present invention.
FIG. 4 is a schematic cross-sectional view of the LED shown in FIG. 3 along the broken line BB ′.
[Explanation of symbols]
Reference Signs List 10 Si single crystal substrate 11 Surface 12 Side wall 13 Pores 13a Pores bottom 13b Apex of pores W Length of one side of the bottom of pores D Depth of pores 100 LED
101 Si single crystal substrate 102 First buffer layer 103 Second buffer layer 104 Lower cladding layer 105 Light emitting layer 106 Upper cladding layer 107 p-type ohmic electrode 108 n-type ohmic electrode 109 pore

Claims (8)

A substrate made of silicon (Si) single crystal; a buffer layer made of a boron phosphide (BP) -based material provided on the surface of the substrate; and a group III nitride semiconductor layer provided on the buffer layer In the group III nitride semiconductor light emitting device wafer, the substrate has a surface of {100} plane, and the surface is provided with quadrangular pyramid-shaped pores having side walls of {111} plane. A wafer for a group III nitride semiconductor light emitting device, characterized in that: 2. The group III nitride semiconductor light emitting device wafer according to claim 1, wherein a length (W) of one side of a bottom surface of the quadrangular pyramid-shaped pore is in a range from 10 μm to 500 μm. 3. 3. The group III nitride semiconductor light emitting device wafer according to claim 1, wherein the quadrangular pyramid-shaped pores are regularly provided on a substrate surface at regular intervals. 4. A substrate made of silicon (Si) single crystal; a buffer layer made of a boron phosphide (BP) -based material provided on the surface of the substrate; and a group III nitride semiconductor layer provided on the buffer layer The method for manufacturing a wafer for a group III nitride semiconductor light-emitting device, comprising: a surface having a {100} plane, and a quadrangular pyramid-shaped pore having a side wall of a {111} plane is provided on the surface. A method for manufacturing a wafer for a group III nitride semiconductor light emitting device, comprising forming a buffer layer made of a BP-based material on a surface of the Si single crystal substrate by a vapor phase growth method. The method for manufacturing a group III nitride semiconductor light emitting device wafer according to claim 4, wherein a group III nitride semiconductor layer is further formed on the buffer layer made of the BP-based material by a vapor phase growth method. The method of manufacturing a group III nitride semiconductor light emitting device wafer according to claim 4 or 5, wherein the vapor phase growth method is a metal organic chemical vapor deposition (MOCVD) method. The method according to claim 4, wherein the quadrangular pyramid-shaped pores are provided by etching. A group III nitride semiconductor light emitting device manufactured using the group III nitride semiconductor light emitting device wafer according to claim 1.

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