JP2000252219A - PRODUCTION OF GaN SUBSTRATE - Google Patents

PRODUCTION OF GaN SUBSTRATE

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Publication number
JP2000252219A
JP2000252219A JP5341499A JP5341499A JP2000252219A JP 2000252219 A JP2000252219 A JP 2000252219A JP 5341499 A JP5341499 A JP 5341499A JP 5341499 A JP5341499 A JP 5341499A JP 2000252219 A JP2000252219 A JP 2000252219A
Authority
JP
Japan
Prior art keywords
nitride semiconductor
substrate
gan
layer
gan substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5341499A
Other languages
Japanese (ja)
Other versions
JP3896718B2 (en
Inventor
Osamu Miki
修 三木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nichia Chemical Industries Ltd
Original Assignee
Nichia Chemical Industries Ltd
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Filing date
Publication date
Application filed by Nichia Chemical Industries Ltd filed Critical Nichia Chemical Industries Ltd
Priority to JP05341499A priority Critical patent/JP3896718B2/en
Publication of JP2000252219A publication Critical patent/JP2000252219A/en
Application granted granted Critical
Publication of JP3896718B2 publication Critical patent/JP3896718B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To obtain a GaN substrate in which crystal defect is suppressed by growing a second nitride semiconductor and removing at least up to a different kind of substrate and then growing a third nitride semiconductor on the second nitride semiconductor thereby suppressing warp during production. SOLUTION: A second nitride semiconductor 3 is grown by HVPE on a first epitaxially grown nitride semiconductor layer 2. It is then polished from the side where a different kind of substrate 1 is exposed thus removing the second nitride semiconductor 3 at least up to the different kind of substrate 1. When the different kind of substrate 1 is removed by polishing, stress dependent on the different kind of substrate will depend on the nitride semiconductor and a significantly warped nitride semiconductor is obtained at the stage where the different kind of substrate 1 is removed entirely. Subsequently, a third nitride semiconductor 4 is grown on the nitride semiconductor by HVPE. When a thick film of third nitride semiconductor 4 is formed by HVPE, a GaN substrate where warp is suppressed can be obtained.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、例えばLED(発光ダ
イオード)、LD(レーザダイオード)等の窒化物半導
体(InXAlYGa1-X-YN、0≦X、0≦Y、X+Y
≦1)に使用されるGaN基板の製造方法に関する。
The present invention relates, for example, LED (light emitting diode), LD (laser diode) nitride such as semiconductor (In X Al Y Ga 1- XY N, 0 ≦ X, 0 ≦ Y, X + Y
<1) The present invention relates to a method for manufacturing a GaN substrate used in <1).

【0002】[0002]

【従来の技術】本出願人は、窒化物半導体基板の上に積
層した様々な層構成でもって、例えば青色等の高輝度な
発光ダイオード(LED)、室温で長時間にわたる連続
発振を可能とした青色のレーザダイオード(LD)のよ
うな、窒化物半導体素子を実現してきた。また、窒化物
半導体の用途はこれだけにとどまらず、他の窒化物半導
体素子への利用が提案され、様々な研究機関により精力
的な研究がなされている。
2. Description of the Related Art The applicant of the present invention has realized various kinds of layer structures laminated on a nitride semiconductor substrate, for example, a light emitting diode (LED) having a high luminance such as blue light, and a continuous oscillation for a long time at room temperature. A nitride semiconductor device such as a blue laser diode (LD) has been realized. Further, the use of the nitride semiconductor is not limited to this, and the use of the nitride semiconductor to other nitride semiconductor devices has been proposed, and intensive research has been conducted by various research institutions.

【0003】このような窒化物半導体は、一般的にサフ
ァイアに代表されるような異種基板上に積層させた窒化
物半導体層を基板として、この上に種々の層を積層する
ことで所望の素子が製造されている。具体的に発光素子
を例としてあげると、サファイア基板上に窒化物半導体
層をエピタキシャル成長させた後、n層、p層を積層
し、それぞれの層に対応する電極を設けることである。
[0003] Such a nitride semiconductor is obtained by stacking various layers on a nitride semiconductor layer generally formed on a heterogeneous substrate represented by sapphire as a substrate. Are manufactured. As a specific example of a light-emitting element, an n-layer and a p-layer are stacked after a nitride semiconductor layer is epitaxially grown on a sapphire substrate, and electrodes corresponding to the respective layers are provided.

【0004】このように、窒化物半導体と格子整合する
窒化物半導体基板の製造実現への要望は高まるばかりで
あるが、GaNバルク結晶を例にとっても、様々な研究
機関により試みられているにもかかわらず、数mmのも
のが報告されるにとどまっている。
As described above, the demand for realizing the production of a nitride semiconductor substrate lattice-matched with a nitride semiconductor is only increasing, but the GaN bulk crystal is taken as an example and various research institutions have tried it. Regardless, only a few mm are reported.

【0005】窒化物半導体基板を製造する方法として、
サファイア基板に酸化亜鉛の中間層を形成した後、窒化
物半導体を積層し、前記中間層を湿式エッチングにより
サファイア基板を剥離する方法が特開平7−20226
5号公報に開示されている。しかし、この方法により得
られる窒化物半導体層では結晶性の良好な窒化物半導体
基板が得られなかった。しかしGaN単結晶サファイア
基板を薄くした際、サファイア基板とGaNとの格子不
整合により応力が発生し、基板に反りが生じてしまい、
この基板上に窒化物半導体を形成して良好な窒化物半導
体素子を得ようとしても限度があった。
[0005] As a method of manufacturing a nitride semiconductor substrate,
JP-A-7-20226 discloses a method of forming an intermediate layer of zinc oxide on a sapphire substrate, laminating a nitride semiconductor, and peeling the intermediate layer from the sapphire substrate by wet etching.
No. 5 discloses this. However, a nitride semiconductor layer having good crystallinity could not be obtained with the nitride semiconductor layer obtained by this method. However, when the GaN single crystal sapphire substrate is thinned, stress is generated due to lattice mismatch between the sapphire substrate and GaN, and the substrate is warped.
There has been a limit in obtaining a good nitride semiconductor device by forming a nitride semiconductor on this substrate.

【0006】また、酸化物基板上にGaNを成膜した
後、サファイア基板側から研磨をして、GaNのみにす
る方法が特開平11−1399号公報に開示されてい
る。この方法は酸化物基板上にGaNを成長させてHV
PE法により一定の厚さの1次のGaNを形成し、この
1次のGaN層の成長された窒化物半導体基板を研磨し
て酸化物基板の一部を除去し、1次のGaN層上に2次
のGaN層を成長させ、再度研磨して除去し、この窒化
物半導体基板が完全に除去された1次および2次のGa
N層上に再び所定の厚さのGaN層を成長させてGaN
単結晶を成長させ、最後にGaN単結晶を研磨してGa
N基板を得る。しかしこの方法で得られるGaN基板は
非常に欠陥が多く、この基板を用いて窒化物半導体を作
製しても特性の良い素子は得られず、また層構成の複雑
な窒化物半導体レーザ素子に至っては発振さえしなかっ
た。
Japanese Patent Application Laid-Open No. H11-1399 discloses a method in which GaN is formed on an oxide substrate and then polished from the sapphire substrate to only GaN. In this method, GaN is grown on an oxide substrate and HV is grown.
A primary GaN having a certain thickness is formed by the PE method, a nitride semiconductor substrate on which the primary GaN layer is grown is polished to remove a part of the oxide substrate, and a primary GaN layer is formed on the primary GaN layer. A secondary GaN layer is then grown and polished and removed again to remove the primary and secondary Ga from which the nitride semiconductor substrate has been completely removed.
A GaN layer having a predetermined thickness is grown again on the N layer to form a GaN layer.
A single crystal is grown, and finally a GaN single crystal is polished to
Obtain an N substrate. However, the GaN substrate obtained by this method has very many defects, and even if a nitride semiconductor is produced using this substrate, an element having good characteristics cannot be obtained, and a nitride semiconductor laser element having a complicated layer structure has been obtained. Did not even oscillate.

【0007】[0007]

【発明が解決しようとする課題】本発明は上述の事情に
鑑みてなされたものであり、GaN基板上に窒化物半導
体が積層されて窒化物半導体素子となるGaN基板にお
いて、作製時に生じる反りが軽減した結晶欠陥の非常に
少ないGaN基板の製造方法を提供し、素子特性の良好
な窒化物半導体素子を歩留良く得ることを目的とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned circumstances, and a warp that occurs during fabrication of a GaN substrate in which a nitride semiconductor is stacked on a GaN substrate to form a nitride semiconductor device. It is an object of the present invention to provide a method of manufacturing a GaN substrate having reduced crystal defects and having very few crystal defects, and to obtain a nitride semiconductor device having good device characteristics with a high yield.

【0008】[0008]

【課題を解決するための手段】本発明者は、上記目的を
達成するため、GaN基板について研究した結果、サフ
ァイア基板上にGaNを厚膜で形成した後に、サファイ
ア基板側から研磨をしてGaNのみにすると反りが生じ
てしまうが、このGaN基板にさらに厚膜でGaNを積
層することによって、サファイアとGaNとの格子不整
合によって発生した際のひずみ応力が緩和され、反りが
軽減した良好なGaN基板を得ることに成功した。
The present inventor studied the GaN substrate to achieve the above object. As a result, after forming GaN in a thick film on the sapphire substrate, the GaN substrate was polished from the sapphire substrate side. If only GaN is used, warpage occurs. However, by laminating GaN with a thicker film on this GaN substrate, strain stress caused by lattice mismatch between sapphire and GaN is alleviated, and good warpage with reduced warpage is achieved. We succeeded in obtaining a GaN substrate.

【0009】さらに本発明の製造方法によって得られる
GaN基板は、ラテラル成長したGaNを利用して作製
するため、結晶欠陥の非常に少ないGaN基板を比較的
厚い膜で得ることができ、またGaNの劈開により共振
面を作製出来ることから、特に層構成の複雑な窒化物半
導体レーザ素子の作製に有用である。
Further, since the GaN substrate obtained by the manufacturing method of the present invention is manufactured using laterally grown GaN, a GaN substrate having very few crystal defects can be obtained as a relatively thick film. Since a resonance surface can be formed by cleavage, it is particularly useful for manufacturing a nitride semiconductor laser device having a complicated layer structure.

【0010】すなわち、本発明は、GaN基板上に窒化
物半導体を積層して窒化物半導体素子となるGaN基板
の製造方法であって、窒化物半導体と異なる異種基板上
にラテラル成長によるGaNを含む第1の窒化物半導体
層を成長させる第1の工程と、その上に第2の窒化物半
導体を成長させる第2の工程と、第2の工程後、少なく
とも異種基板までを除去する第3の工程と、第3の工程
後、第2の窒化物半導体の上に第3の窒化物半導体を成
長させる第4の工程とを有することを特徴とする。
That is, the present invention relates to a method of manufacturing a GaN substrate which is a nitride semiconductor device by laminating a nitride semiconductor on a GaN substrate, and includes GaN by lateral growth on a substrate different from the nitride semiconductor. A first step of growing a first nitride semiconductor layer, a second step of growing a second nitride semiconductor thereon, and a third step of removing at least a heterogeneous substrate after the second step. And a fourth step of growing a third nitride semiconductor on the second nitride semiconductor after the third step.

【0011】前記第1の工程は、異種基板上にGaNを
成長させた後、そのGaN表面に凹凸を形成し、少なく
とも凹部から凸部の表面にわたって、GaNをほぼ横方
向に成長させる工程であることを特徴とする。
In the first step, after growing GaN on a heterogeneous substrate, irregularities are formed on the surface of the GaN, and GaN is grown substantially laterally at least over the surface from the concave portion to the convex portion. It is characterized by the following.

【0012】前記第4の工程後、異種基板を除去した側
から第2の窒化物半導体の一部または全部、あるいは第
3の窒化物半導体の一部までを除去する第5の工程を有
することを特徴とする。
After the fourth step, there is provided a fifth step of removing part or all of the second nitride semiconductor or part of the third nitride semiconductor from the side from which the heterogeneous substrate is removed. It is characterized by.

【0013】前記第2の窒化物半導体層の厚さは、10
μm以上400μm以下に調整することを特徴とし、前
記第3の窒化物半導体層の厚さは、100μm以上40
0μm以下に調整することを特徴とする。
The thickness of the second nitride semiconductor layer is 10
The thickness is adjusted to not less than 400 μm and not more than 400 μm, and the thickness of the third nitride semiconductor layer is not less than 100 μm and not more than 40 μm.
It is characterized in that it is adjusted to 0 μm or less.

【0014】さらに前記第1の工程はMOVPE法によ
り、第2の工程および第4の工程はHVPE法により窒
化物半導体を成長させることを特徴とする。
Further, the first step is characterized in that the nitride semiconductor is grown by the MOVPE method, and the second step and the fourth step are grown by the HVPE method.

【0015】前記第5の工程後、GaN基板を研磨して
厚さを100μm以上300μm以下にして、この上に
デバイス構造を作製することを特徴とする。これは3層
以上の構造を有するGaN基板の総膜厚をこの範囲とす
ることで、この上に窒化物半導体を積層して得られる窒
化物半導体素子の特性が良好となる。
After the fifth step, the GaN substrate is polished to a thickness of 100 μm or more and 300 μm or less, and a device structure is formed thereon. By setting the total thickness of a GaN substrate having a structure of three or more layers in this range, the characteristics of a nitride semiconductor device obtained by laminating a nitride semiconductor thereon are improved.

【0016】前記窒化物半導体と異なる異種基板は、C
面を基準としてオフアングルされたサファイア基板を用
いることを特徴とする。
The different substrate different from the nitride semiconductor is C
It is characterized by using a sapphire substrate that is off-angled with respect to the surface.

【0017】前記第2の窒化物半導体層および/または
第3の窒化物半導体層に、SiあるいはSnをドープす
ることを特徴とする。
The second nitride semiconductor layer and / or the third nitride semiconductor layer is doped with Si or Sn.

【0018】[0018]

【発明の実施の形態】以下、本発明について詳細に説明
する。図1〜6は本発明の製造方法の具体例を示す模式
図である。まず第1の工程として、図1に示すように、
MOVPE法によりサファイア基板などの窒化物半導体
と異なる異種基板1上に窒化物半導体の下地層を成長さ
せこれを第1の層と称し、次にエピタキシャル成長によ
る窒化物半導体を形成する。エピタキシャル成長とは結
晶欠陥の少ない単結晶の成長をいい、特に窒化物半導体
では厚さ方向に対して横方向に選択成長(ラテラル成
長)させることで、結晶欠陥が厚さ方向に成長すること
がなくなり、良好なエピタキシャル成長層が得られるこ
とが知られている。
BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail. 1 to 6 are schematic views showing specific examples of the production method of the present invention. First, as a first step, as shown in FIG.
An underlayer of a nitride semiconductor is grown on a heterogeneous substrate 1 different from a nitride semiconductor such as a sapphire substrate by the MOVPE method, this is referred to as a first layer, and then a nitride semiconductor is formed by epitaxial growth. Epitaxial growth refers to the growth of a single crystal with few crystal defects. In particular, in the case of nitride semiconductors, the crystal defects are prevented from growing in the thickness direction by performing selective growth (lateral growth) in the direction transverse to the thickness direction. It is known that a good epitaxial growth layer can be obtained.

【0019】具体的に横方向に選択成長(ラテラル成
長)させる方法としては、GaNからなる第1の層を形
成し、この第1の層を部分的に凹凸を形成して(2a)
凹部側面に窒化物半導体の横方向の成長が可能な面を露
出させ、その上に窒化物半導体を成長させる(2b)。
More specifically, as a method of performing lateral selective growth (lateral growth), a first layer made of GaN is formed, and the first layer is partially formed with irregularities (2a).
A surface capable of laterally growing the nitride semiconductor is exposed on the side surface of the concave portion, and the nitride semiconductor is grown thereon (2b).

【0020】その他にラテラル成長させる方法として
は、GaNからなる窒化物半導体層上にSiO2等のマ
スクを部分的に形成し(例えばストライプ状)、この上
に窒化物半導体を成長させる。どちらの方法によっても
窒化物半導体はラテラル成長し、どちらも結晶欠陥の非
常に少ないエピタキシャル成長層は得られるが、SiO
2等のマスク材料は、窒化物半導体が良好な単結晶とし
て得られる温度、例えば1000℃以上の温度で分解す
るおそれがあり、また窒化物半導体が異常成長する原因
にもなるために、凹凸を形成する方法によってラテラル
成長させる方が好ましい。
Other methods for lateral growth include
Is SiO 2 on a nitride semiconductor layer made of GaN.TwoEtc.
A mask is partially formed (for example, in a stripe shape), and
Next, a nitride semiconductor is grown. Either way
Nitride semiconductors grow laterally, both of which have crystal defects.
Although a small number of epitaxially grown layers is always obtained,
TwoFor the mask material, etc., the nitride semiconductor is a good single crystal.
Decomposes at a temperature obtained, for example, at a temperature of 1000 ° C. or higher.
Cause abnormal growth of nitride semiconductors
The method of forming the irregularities will make
It is preferred to grow.

【0021】また、窒化物半導体と異なる異種基板1
は、C面、R面、A面を含むサファイアの他、スピネル
(MgAl24)のような絶縁性基板、SiC(6H、
4H、3Cを含む)、ZnS、ZnO、GaAs、Si
等の従来知られている窒化物半導体と異なる基板材料を
用いることができる。
In addition, a heterogeneous substrate 1 different from the nitride semiconductor
Is sapphire including C-plane, R-plane and A-plane, an insulating substrate such as spinel (MgAl 2 O 4 ), SiC (6H,
4H, 3C), ZnS, ZnO, GaAs, Si
For example, a substrate material different from a conventionally known nitride semiconductor can be used.

【0022】また、本発明に用いる窒化物半導体と異な
る異種基板1はステップ状にオフアングル(傾斜)され
た基板を用いることが望ましい。サファイア基板を用い
る場合、サファイアA面に対し垂直(サファイアのM軸
方向と平行)にオフアングルし、そのオフアングルのオ
フ角を0.1°〜0.3°の範囲にすることで、良好な
窒化物半導体素子が得られる。
Further, it is desirable to use a substrate that is off-angled (inclined) in a step-like manner as the heterogeneous substrate 1 different from the nitride semiconductor used in the present invention. When a sapphire substrate is used, the off-angle is perpendicular to the sapphire A plane (parallel to the M-axis direction of sapphire), and the off-angle is preferably in the range of 0.1 ° to 0.3 °. A nitride semiconductor device can be obtained.

【0023】オフ角を0.1°〜0.3°の範囲にする
と、HVPE法で積層した第2の窒化物半導体と第3の
窒化物半導体の表面形態が、異種基板のステップに平行
なすじ状となる。この窒化物半導体表面のステップ(段
差に沿う方向)はレーザ素子を作製する際の導波路方向
と同じとなり,導波路構造内にステップ状の段差ができ
ることがなく、最も良い。さらに好ましくは0.15°
〜0.25°とすると良い。
When the off angle is in the range of 0.1 ° to 0.3 °, the surface morphology of the second nitride semiconductor and the third nitride semiconductor laminated by the HVPE method is parallel to the steps of the heterogeneous substrate. It becomes a streak. The steps (the direction along the step) on the surface of the nitride semiconductor are the same as the direction of the waveguide at the time of manufacturing the laser element, and there is no step-like step in the waveguide structure, which is the best. More preferably 0.15 °
It is good to be set to ~ 0.25 °.

【0024】オフ角が0.1°より小さいか、またはオ
フアングルされていないサファイアを用いると、第2の
窒化物半導体層と第3の窒化物半導体層の表面形態は六
角錘状(または六角錘に似た形)となり、この上に作製
する窒化物半導体表面にも六角パターンが反映され、素
子特性が悪くなってしまう。また、オフ角が0.3°よ
り大きいサファイアを用いると表面が荒れてしまい、サ
ファイアのC面からのずれが大きくなり、エピタキシャ
ル成長が困難になる。
When sapphire having an off angle smaller than 0.1 ° or not off-angle is used, the surface morphology of the second nitride semiconductor layer and the third nitride semiconductor layer becomes hexagonal pyramid (or hexagonal). (A shape similar to a weight), and the hexagonal pattern is also reflected on the surface of the nitride semiconductor formed thereon, which deteriorates the device characteristics. In addition, when sapphire having an off angle of more than 0.3 ° is used, the surface becomes rough, the deviation of the sapphire from the C plane increases, and epitaxial growth becomes difficult.

【0025】また、本発明のラテラル成長する第1の工
程は繰り返し2回以上行っても良い。繰り返し行うこと
で、その上に形成する窒化物半導体層の結晶欠陥の数を
さらに少なくすることができる。繰り返してラテラル成
長を形成する際は、そのまえに行ったラテラル成長の際
の凹凸に対して、凸部上に凹部、凹部上に凸部となるよ
うに形成する。
The first step of the lateral growth of the present invention may be repeated twice or more. By repeating this, the number of crystal defects in the nitride semiconductor layer formed thereon can be further reduced. When the lateral growth is repeated, the concave and convex portions formed on the convex portion and the convex portions on the concave portion are formed with respect to the irregularities in the lateral growth performed before that.

【0026】次に第2の工程として、図2に示すよう
に、エピタキシャル成長した第1の窒化物半導体層2上
にHVPE法を用いて第2の窒化物半導体3を成長させ
る。このHVPE法による窒化物半導体は厚膜で形成
し、下地層を含めて400μm以下にすることが望まし
い。400μmより厚く成長すると、異種基板との格子
不整合あるいは熱膨張係数差によって発生する反りが大
きくなりすぎてしまい、素子構造となる窒化物半導体を
積層する際に不都合が生じてしまう。これは窒化物半導
体と異種基板との間で発生する格子不整合あるいは熱膨
張係数差によるひずみが、はじめは異種基板の方が膜厚
が大きいために格子不整合あるいは熱膨張係数差によっ
て発生する応力は異種基板1に依存し、窒化物半導体の
方がひずみ応力を受けた状態となっていた。しかし、窒
化物半導体が400μmより大きくなると、次第に応力
は窒化物半導体に依存するようになってくるため、窒化
物半導体にかかっていたひずみ応力が緩和されはじめ、
今度は異種基板の方がひずみ応力を受けるようになり、
そこで大きな反りが発生してしまう。
Next, as a second step, as shown in FIG. 2, a second nitride semiconductor 3 is grown on the epitaxially grown first nitride semiconductor layer 2 by using the HVPE method. It is desirable that the nitride semiconductor formed by the HVPE method is formed as a thick film and has a thickness of 400 μm or less including the underlayer. If the thickness is more than 400 μm, the warpage caused by lattice mismatch with a heterogeneous substrate or a difference in thermal expansion coefficient becomes too large, which causes inconvenience when laminating a nitride semiconductor as an element structure. This is caused by strain due to lattice mismatch or thermal expansion coefficient difference between the nitride semiconductor and the heterogeneous substrate, but initially due to lattice mismatch or thermal expansion coefficient difference because the heterogeneous substrate has a larger film thickness. The stress depends on the dissimilar substrate 1, and the nitride semiconductor is in a state of receiving a strain stress. However, when the nitride semiconductor is larger than 400 μm, since the stress gradually depends on the nitride semiconductor, the strain stress applied to the nitride semiconductor begins to be relaxed,
This time, the dissimilar substrate came to receive strain stress,
Then, a large warpage occurs.

【0027】さらにこの第2の工程を行うことによって
次のような効果もある。第1の工程においてラテラル成
長による第1の窒化物半導体層2を成長させた場合、第
1の窒化物半導体層表面では結晶欠陥の数が不均一であ
ったものが、第2の窒化物半導体層3を成長させると、
第2の窒化物半導体中で結晶欠陥が拡散され、第2の窒
化物半導体層表面ではほぼ均一となり、その上に成長さ
せる窒化物半導体も均一な層として成長させることがで
きる。
Further, performing the second step has the following effects. When the first nitride semiconductor layer 2 is grown by lateral growth in the first step, the number of crystal defects on the surface of the first nitride semiconductor layer is non-uniform, but the second nitride semiconductor When layer 3 is grown,
Crystal defects are diffused in the second nitride semiconductor, become substantially uniform on the surface of the second nitride semiconductor layer, and the nitride semiconductor grown thereon can be grown as a uniform layer.

【0028】またこの第2の窒化物半導体層3を成長さ
せるとき、SiあるいはSnのn型不純物をドープする
ことが望ましい。これはn電極とのオーミック性を良く
するためで、GaN基板上にn層、活性層、p層の順に
素子構造を形成した場合、p層側にp電極を形成して、
p電極とは反対のn層側すなわちGaN基板にn電極を
形成する場合に、SiまたはSnをドープすると、オー
ミック性が良好となる。
When growing the second nitride semiconductor layer 3, it is desirable to dope n-type impurities of Si or Sn. This is to improve the ohmic property with the n-electrode. When an element structure is formed on a GaN substrate in the order of an n-layer, an active layer, and a p-layer, a p-electrode is formed on the p-layer side.
When forming an n-electrode on the n-layer side opposite to the p-electrode, that is, on the GaN substrate, doping with Si or Sn improves the ohmic properties.

【0029】このSiまたはSnのn型不純物は、5×
1016/cm3〜5×1021/cm3の範囲でドープする
ことが望ましい。5×1016/cm3より少ないと、オ
ーミック性が悪くなってしまい、また5×1021/cm
3より多いと、不純物濃度が大きいために結晶性が悪く
なり、結晶欠陥が増大する傾向にある。好ましい範囲と
しては、1×1017/cm3〜1×1020/cm3とす
る。
The n-type impurity of Si or Sn is 5 ×
It is desirable to dope in the range of 10 16 / cm 3 to 5 × 10 21 / cm 3 . If it is less than 5 × 10 16 / cm 3 , the ohmic properties will be poor and 5 × 10 21 / cm 3
If it is more than 3 , the crystallinity is deteriorated due to the high impurity concentration, and the crystal defects tend to increase. A preferable range is 1 × 10 17 / cm 3 to 1 × 10 20 / cm 3 .

【0030】次に第3の工程として、図3に示すよう
に、第2の窒化物半導体3までを形成した後、異種基板
1の露出した面側から研磨していき、少なくとも異種基
板までを除去する。研磨により取り除く層はSiO2
のマスク材料を用いてエピタキシャル成長層を形成した
場合はマスク材料等までを除去することが望ましい。こ
の異種基板1を研磨により除去していくと、前述の説明
と同じように、異種基板に依存していた応力が窒化物半
導体に依存するようになり、結果的に異種基板1をすべ
て除去した段階で、大きく反った状態の窒化物半導体が
得られる。
Next, as a third step, as shown in FIG. 3, after forming up to the second nitride semiconductor 3, polishing is performed from the exposed surface side of the heterogeneous substrate 1, and at least up to the heterogeneous substrate. Remove. When the epitaxially grown layer is formed using a mask material such as SiO 2, it is desirable that the layer to be removed by polishing be removed up to the mask material and the like. When the dissimilar substrate 1 is removed by polishing, the stress dependent on the dissimilar substrate becomes dependent on the nitride semiconductor, as described above. As a result, the dissimilar substrate 1 is completely removed. At this stage, a nitride semiconductor in a greatly warped state is obtained.

【0031】この大きく反りのある窒化物半導体を次に
第4の工程として、図4に示すように、HVPE法を用
いて第3の窒化物半導体4を成長させる。このHVPE
による第3の窒化物半導体4を厚膜で形成することで反
りの軽減したGaN基板が得られる。これは異種基板1
との格子不整合によってひずみ応力を受けた第2の窒化
物半導体3が、異種基板が除去された状態でさらに窒化
物半導体を積層していくことで、次第にひずみ応力が取
り除かれるようになり、反りが軽減したと考えられる。
この第3の窒化物半導体は10μm〜800μmで形成
し、好ましくは200μm〜500μmで形成する。
Using the nitride semiconductor having a large warp as a fourth step, a third nitride semiconductor 4 is grown by HVPE as shown in FIG. This HVPE
By forming the third nitride semiconductor 4 as a thick film by the method described above, a GaN substrate with reduced warpage can be obtained. This is a heterogeneous substrate 1
The second nitride semiconductor 3 which has been subjected to the strain stress due to lattice mismatch with the nitride semiconductor is further laminated with the nitride semiconductor in a state where the heterogeneous substrate has been removed, so that the strain stress is gradually removed, It is considered that the warpage was reduced.
This third nitride semiconductor is formed to have a thickness of 10 μm to 800 μm, preferably 200 μm to 500 μm.

【0032】次に好ましくは第5の工程として、図5に
示すように、得られたGaN基板を異種基板1を除去し
た側から第2の窒化物半導体3の一部または全部、ある
いは第3の窒化物半導体4の一部までを除去する。これ
は第1の窒化物半導体2はラテラル成長を得るために、
SiO2等のマスクを含んでいたり、凹凸を形成した上
に窒化物半導体を形成したりしており、ひずみ応力が取
り除かれにくくなっているため、第1の窒化物半導体層
および第2の窒化物半導体層の一部または全部を研磨に
より除去することが望ましい。この研磨によって最終的
なGaN基板としての膜厚は、50μm〜500μm、
好ましくは100μm〜300μmとする。
Next, preferably, as a fifth step, as shown in FIG. 5, a part or all of the second nitride semiconductor 3 or the third Of the nitride semiconductor 4 is removed. This is because the first nitride semiconductor 2 obtains lateral growth.
Since a mask such as SiO 2 is included or a nitride semiconductor is formed on top of forming irregularities, it is difficult to remove a strain stress. Therefore, the first nitride semiconductor layer and the second nitride semiconductor are formed. It is desirable to remove part or all of the semiconductor layer by polishing. By this polishing, the final film thickness as a GaN substrate is 50 μm to 500 μm,
Preferably, it is 100 μm to 300 μm.

【0033】以上のようにして作製したGaN基板4’
を用いると、GaN基板上にn型窒化物半導体、活性
層、p型窒化物半導体を形成して窒化物半導体素子を作
製したとき、反りも小さく、また欠陥も少ないために、
歩留が良く、発光効率の優れた窒化物半導体素子が得ら
れる。
The GaN substrate 4 'manufactured as described above
Is used, when an n-type nitride semiconductor, an active layer, and a p-type nitride semiconductor are formed on a GaN substrate to produce a nitride semiconductor device, the warpage is small and the number of defects is small.
A nitride semiconductor device with good yield and excellent luminous efficiency can be obtained.

【0034】[0034]

【実施例】[実施例1]異種基板1として、2インチ
φ、C面を主面とし、オリフラ面をA面とするサファイ
ア基板1をMOVPE反応容器内にセットし、温度を5
10℃にして、キャリアガスに水素、原料ガスにアンモ
ニアとTMG(トリメチルガリウム)とを用い、サファ
イア基板1上にGaNよりなるバッファ層(図示されて
いない)を約200オングストロームの膜厚で成長させ
る。
[Example 1] A sapphire substrate 1 having a 2-inch φ, C surface as a main surface and an orientation flat surface as an A surface was set in a MOVPE reaction vessel as a heterogeneous substrate 1, and the temperature was set at 5 ° C.
At 10 ° C., a buffer layer (not shown) made of GaN is grown to a thickness of about 200 Å on the sapphire substrate 1 using hydrogen as the carrier gas and ammonia and TMG (trimethylgallium) as the source gas. .

【0035】バッファ層を成長後、TMGのみ止めて、
温度を1050℃まで上昇させる。1050℃になった
ら、さらにTMGを用いて、GaNよりなる窒化物半導
体層2を2.5μmの膜厚で成長させる。
After growing the buffer layer, only TMG is stopped,
Increase temperature to 1050 ° C. When the temperature reaches 1050 ° C., a nitride semiconductor layer 2 made of GaN is further grown to a thickness of 2.5 μm using TMG.

【0036】窒化物半導体層2を成長後、ストライプ状
のフォトマスクを形成し、CVD装置によりストライプ
幅(凸部の上部になる部)2μm、ストライプ間隔(凹
部の底部となる部分)10μmにパターニングされたS
iO2膜を形成し、続いて、RIE装置によりSiO2
の形成されていない部分の第1の窒化物半導体層2を第
1の窒化物半導体2が残る程度に途中までエッチングし
て凹凸を形成することにより、凹部側面に第1の窒化物
半導体2を露出させる(図1の2a)。図1のように凹
凸を形成した後、凸部上部のSiO2を除去する。な
お、ストライプ方向は、図6に示すように、オリフラ面
に対して垂直な方向(GaNのM軸方向)で形成する。
After the nitride semiconductor layer 2 is grown, a stripe-shaped photomask is formed and patterned by a CVD apparatus so as to have a stripe width (the upper portion of the convex portion) of 2 μm and a stripe interval (the lower portion of the concave portion) of 10 μm. Done S
An iO 2 film is formed, and then the first nitride semiconductor layer 2 in a portion where the SiO 2 film is not formed is etched halfway by an RIE apparatus so that the first nitride semiconductor 2 remains, thereby removing irregularities. By forming, the first nitride semiconductor 2 is exposed on the side surface of the concave portion (2a in FIG. 1). After forming the irregularities as shown in FIG. 1, the SiO 2 above the convex portions is removed. As shown in FIG. 6, the stripe direction is formed in a direction perpendicular to the orientation flat surface (M-axis direction of GaN).

【0037】次に、MOVPE反応容器内にセットし、
温度を1050℃で、原料ガスにTMG、アンモニアを
用い、アンドープのGaNよりなる窒化物半導体層2b
を15μmの膜厚で成長させ、これを第1の窒化物半導
体層2とする。
Next, it is set in a MOVPE reaction vessel,
A nitride semiconductor layer 2b made of undoped GaN at a temperature of 1050 ° C. using TMG and ammonia as source gases
Is grown to a thickness of 15 μm, and this is used as the first nitride semiconductor layer 2.

【0038】第1の窒化物半導体層2を成長後、続いて
ウエハーをHVPE装置に移し、温度を1050℃で、
原料ガスに塩化ガリウム、アンモニア、シランガスを用
い、Siを1×1018/cm3ドープしたGaNよりな
る第2の窒化物半導体層3を250μmの膜厚で成長さ
せる。
After the growth of the first nitride semiconductor layer 2, the wafer is transferred to an HVPE apparatus at a temperature of 1050 ° C.
Using gallium chloride, ammonia, and silane gas as source gases, a second nitride semiconductor layer 3 made of GaN doped with 1 × 10 18 / cm 3 of Si is grown to a thickness of 250 μm.

【0039】このとき結晶欠陥の数を断面TEM(透過
電子顕微鏡)により観察すると、第1の窒化物半導体層
2表面での結晶欠陥密度は凸部上で1010個/cmであ
り、凹部上で104個/cm2以下であったものが、第2
の窒化物半導体層3表面ではほぼ均一で106個/cm2
になった。
At this time, when the number of crystal defects is observed by a cross-sectional TEM (transmission electron microscope), the crystal defect density on the surface of the first nitride semiconductor layer 2 is 10 10 / cm on the convex portion and on the concave portion. Was less than 10 4 pieces / cm 2 ,
Is approximately uniform on the surface of the nitride semiconductor layer 3 of 10 6 / cm 2
Became.

【0040】続いてウエハーを反応容器から取り出し、
サファイア基板側から、サファイア基板1が完全に除去
されて下地層のGaNが露出するまで研磨していく。こ
のサファイア基板がすべて取り除かれた状態ではウエハ
ーは大きく反った状態となっている。
Subsequently, the wafer is taken out of the reaction vessel,
Polishing is performed from the sapphire substrate side until the sapphire substrate 1 is completely removed and the underlying layer GaN is exposed. When all the sapphire substrates have been removed, the wafer is largely warped.

【0041】次に、サファイア基板の取り除かれたウエ
ハーを再びHVPE装置に移し、同じく温度を1050
℃で、原料ガスに塩化ガリウム、アンモニア、シランガ
スを用い、Siを1×1018/cm3ドープしたGaN
よりなる第3の窒化物半導体層4を300μmの膜厚で
成長させる。この第3の窒化物半導体層を成長させるこ
とで反りは軽減される。
Next, the wafer from which the sapphire substrate has been removed is transferred to the HVPE apparatus again, and
GaN doped with Si at 1 × 10 18 / cm 3 using gallium chloride, ammonia, and silane gas as raw material gases
A third nitride semiconductor layer 4 of a thickness of 300 μm is grown. The growth of the third nitride semiconductor layer reduces warpage.

【0042】第3の窒化物半導体層4を成長後、ウエハ
ーを反応容器から取り出し、先ほど除去したサファイア
基板側から、第1の窒化物半導体層2、および第2の窒
化物半導体層3の一部までを研磨していき、最終的に総
膜厚が250μmのGaN基板4’にする。得られたG
aN基板4’は反りが小さく、また欠陥も少ないため
に、このGaN上に形成した窒化物半導体素子は、歩留
が良く、また発光効率の優れたものが得られた。
After the third nitride semiconductor layer 4 is grown, the wafer is taken out of the reaction vessel, and the first nitride semiconductor layer 2 and the second nitride semiconductor layer 3 are removed from the side of the sapphire substrate removed earlier. The GaN substrate 4 ′ having a total thickness of 250 μm is finally polished. G obtained
Since the aN substrate 4 'has a small warpage and few defects, a nitride semiconductor device formed on this GaN has a good yield and excellent luminous efficiency.

【0043】[実施例2]実施例1と同様にしてGaN
基板4’を作製する。得られたGaN基板上に図7に示
すようにInGaNよりなるクラック防止層(これは省
略が可能である)、AlGaNとSiドープのGaNと
の超格子からなるn側クラッド層6、GaNよりなるn
側光ガイド層7、InGaNよりなる多重量子井戸構造
(MQW)の活性層8、MgドープのAlGaNよりな
るp側キャップ層9、MgドープのGaNよりなるp側
光ガイド層10、AlGaNとMgドープのGaNとの
超格子からなるp側クラッド層11、MgドープのGa
Nよりなるp側コンタクト層12を順に積層する。
[Embodiment 2] In the same manner as in Embodiment 1, GaN
A substrate 4 'is manufactured. On the obtained GaN substrate, as shown in FIG. 7, a crack prevention layer made of InGaN (this can be omitted), an n-side cladding layer 6 made of a superlattice of AlGaN and Si-doped GaN, and GaN n
Side light guide layer 7, active layer 8 of multiple quantum well structure (MQW) made of InGaN, p-side cap layer 9 made of Mg-doped AlGaN, p-side light guide layer 10 made of Mg-doped GaN, AlGaN and Mg-doped P-side cladding layer 11 made of a superlattice with GaN, Mg-doped Ga
N-side p-side contact layers 12 are sequentially stacked.

【0044】積層後、p側コンタクト層12とp側クラ
ッド層11とをエッチングして表面をリッジ形状とし、
リッジ上にZrO2などの絶縁膜31とpオーミック電
極20を形成し、最後にpパッド電極21を、またp電
極とは反対のGaN基板側にnオーミック電極22とn
パッド電極23を形成し、最後にGaNの劈開により共
振面を形成し、チップ化する。以上のようにして窒化物
半導体レーザ素子を得て、これをフェースアップ(基板
とヒートシンクとが対抗した状態)でヒートシンクに設
置し、それぞれの電極をワイヤーボンディングして、室
温で連続発振を試みたところ、閾値電流密度2kA/c
2、20mWの出力において、連続発振が確認され、
2000時間以上の寿命を示した。
After the lamination, the p-side contact layer 12 and the p-side cladding layer 11 are etched to form a ridge-shaped surface.
An insulating film 31 of ZrO 2 or the like and a p-ohmic electrode 20 are formed on the ridge, and finally a p-pad electrode 21 and an n-ohmic electrode 22 and n
A pad electrode 23 is formed, and finally, a resonance surface is formed by cleaving GaN to form a chip. As described above, a nitride semiconductor laser device was obtained, this was mounted on a heat sink face up (in a state where the substrate and the heat sink were opposed to each other), and the respective electrodes were wire-bonded, and continuous oscillation was attempted at room temperature. However, the threshold current density is 2 kA / c.
At the output of the m 2, 20 mW, continuous oscillation is confirmed,
It showed a life of 2000 hours or more.

【0045】[実施例3]実施例2と同様にして、実施
例1によって得られたGaN基板上に図8に示すように
素子構造としてAlGaNからなるn側コンタクト層
5、クラック防止層(省略可能)、n側クラッド層6、
n側光ガイド層7、活性層8、p側キャップ層9、p側
光ガイド層10、p側クラッド層11、p側コンタクト
層12を積層する。
[Embodiment 3] In the same manner as in Embodiment 2, on the GaN substrate obtained in Embodiment 1, as shown in FIG. 8, an n-side contact layer 5 made of AlGaN as an element structure, a crack prevention layer (omitted) Possible), n-side cladding layer 6,
An n-side light guide layer 7, an active layer 8, a p-side cap layer 9, a p-side light guide layer 10, a p-side cladding layer 11, and a p-side contact layer 12 are laminated.

【0046】次にp側コンタクト層12の一部をエッチ
ングしてn側コンタクト層5を露出させる。さらにp側
層をp側クラッド層11までRIEによりドライエッチ
ングしてリッジを形成し、リッジ上に保護膜としてZr
2などの絶縁膜31とそれぞれのコンタクト層上にp
オーミック電極20とpパッド電極21、nオーミック
電極22とnパッド電極23を形成し、最後にGaNの
劈開により共振面を形成し、チップ化する。
Next, a part of the p-side contact layer 12 is etched to expose the n-side contact layer 5. Further, the p-side layer is dry-etched by RIE to the p-side cladding layer 11 to form a ridge, and Zr is formed on the ridge as a protective film.
An insulating film 31 such as O 2 and p on each contact layer
An ohmic electrode 20 and a p-pad electrode 21 and an n-ohm electrode 22 and an n-pad electrode 23 are formed. Finally, a resonance surface is formed by cleaving GaN to form a chip.

【0047】以上のようにして窒化物半導体レーザ素子
を得て、これをフェースアップ(基板とヒートシンクと
が対抗した状態)でヒートシンクに設置し、それぞれの
電極をワイヤーボンディングして、室温で連続発振を試
みたところ、閾値電流密度2kA/cm2、20mWの
出力において、連続発振が確認され、1000時間以上
の寿命を示した。
As described above, a nitride semiconductor laser device is obtained, and the nitride semiconductor laser device is mounted on a heat sink face up (in a state where the substrate and the heat sink are opposed to each other). In the experiment, continuous oscillation was confirmed at a threshold current density of 2 kA / cm 2 and an output of 20 mW, indicating a life of 1000 hours or more.

【0048】[実施例4]異種基板1として、2インチ
φ、C面を主面とし、オリフラ面をA面とするサファイ
ア基板1をMOVPE反応容器内にセットし、温度を5
10℃にして、キャリアガスに水素、原料ガスにアンモ
ニアとTMG(トリメチルガリウム)とを用い、サファ
イア基板1上にGaNよりなるバッファ層(図示されて
いない)を約200オングストロームの膜厚で成長させ
る。
Example 4 A sapphire substrate 1 having a 2 inch φ, C surface as a main surface and an orientation flat surface as an A surface was set in a MOVPE reaction vessel as a heterogeneous substrate 1, and the temperature was set at 5 ° C.
At 10 ° C., a buffer layer (not shown) made of GaN is grown to a thickness of about 200 Å on the sapphire substrate 1 using hydrogen as the carrier gas and ammonia and TMG (trimethylgallium) as the source gas. .

【0049】バッファ層を成長後、TMGのみ止めて、
温度を1050℃まで上昇させる。1050℃になった
ら、さらにTMGを用いて、GaNよりなる窒化物半導
体層2aを2.5μmの膜厚で成長させる。
After growing the buffer layer, only TMG is stopped,
Increase temperature to 1050 ° C. When the temperature reaches 1050 ° C., a nitride semiconductor layer 2 a made of GaN is further grown to a thickness of 2.5 μm using TMG.

【0050】窒化物半導体層2aを成長後、ストライプ
状のフォトマスクを形成し、CVD装置によりストライ
プ幅10μm、窓部2μmのSiO2よりなる保護膜3
0を0.5μmの膜厚で形成する。ストライプ方向は、
オリフラ面に対して垂直な方向で形成する。
After growing the nitride semiconductor layer 2a, a stripe-shaped photomask is formed, and a protective film 3 made of SiO 2 having a stripe width of 10 μm and a window of 2 μm is formed by a CVD apparatus.
0 is formed with a thickness of 0.5 μm. The stripe direction is
It is formed in a direction perpendicular to the orientation flat surface.

【0051】保護膜30形成後、ウエハーをMOVPE
反応容器に移し、1050℃にて、原料ガスにTMG、
アンモニアを用い、アンドープのGaNよりなる窒化物
半導体層2bを15μmの膜厚で成長させ、これを第1
の窒化物半導体層2とする。
After the formation of the protective film 30, the wafer is subjected to MOVPE.
Transfer to a reaction vessel, and at 1050 ° C, TMG,
Using ammonia, a nitride semiconductor layer 2b made of undoped GaN was grown to a thickness of 15 μm,
Of the nitride semiconductor layer 2.

【0052】第1の窒化物半導体層2を成長後、続いて
ウエハーをHVPE装置に移し、温度を1050℃で、
原料ガスに塩化ガリウム、アンモニア、シランガスを用
い、Siを1×1018/cm3ドープしたGaNよりな
る第2の窒化物半導体層3を250μmの膜厚で成長さ
せる(図6)。
After growing the first nitride semiconductor layer 2, the wafer is transferred to an HVPE apparatus at a temperature of 1050 ° C.
Using gallium chloride, ammonia, and silane gas as source gases, a second nitride semiconductor layer 3 made of GaN doped with 1 × 10 18 / cm 3 of Si is grown to a thickness of 250 μm (FIG. 6).

【0053】このとき結晶欠陥の数を断面TEM(透過
電子顕微鏡)により観察すると、第1の窒化物半導体層
表面での結晶欠陥密度は凸部上で104個/cm2であ
り、凹部上で1010個/cm2以下であったものが、第
2の窒化物半導体層上ではほぼ均一で106個/cm2
なった。
At this time, when the number of crystal defects is observed by a cross-sectional TEM (transmission electron microscope), the crystal defect density on the surface of the first nitride semiconductor layer is 10 4 / cm 2 on the convex portion, and is on the concave portion. Was less than 10 10 / cm 2 , but was almost uniform on the second nitride semiconductor layer to 10 6 / cm 2 .

【0054】続いてウエハーを反応容器から取り出し、
サファイア基板側から、第1の窒化物半導体層2の一部
までを研磨していき、サファイア基板および、保護膜の
SiO2を完全に除去する。このサファイアおよびSi
2がすべて取り除かれた状態ではウエハーは大きく反
った状態となっている。
Subsequently, the wafer is taken out of the reaction vessel,
The sapphire substrate side is polished to a part of the first nitride semiconductor layer 2 to completely remove the sapphire substrate and SiO 2 of the protective film. This sapphire and Si
When all O 2 has been removed, the wafer is largely warped.

【0055】次に、サファイア基板1の取り除かれたウ
エハーを再びHVPE装置に移し、同じく温度を105
0℃で、原料ガスに塩化ガリウムTMG、アンモニア、
シランガスを用い、Siを1×1018/cm3ドープし
たGaNよりなる第3の窒化物半導体層を300μmの
膜厚で成長させる。この第3の窒化物半導体層4を成長
させることで反りは軽減される。
Next, the wafer from which the sapphire substrate 1 has been removed is transferred to the HVPE apparatus again, and
At 0 ° C., gallium chloride TMG, ammonia,
Using a silane gas, a third nitride semiconductor layer made of GaN doped with 1 × 10 18 / cm 3 of Si is grown to a thickness of 300 μm. By growing the third nitride semiconductor layer 4, warpage is reduced.

【0056】第3の窒化物半導体層4を成長後、ウエハ
ーを反応容器から取り出し、先ほど除去したサファイア
基板側から、残りの第1の窒化物半導体層2、および第
2の窒化物半導体層3の一部までを研磨していき、最終
的に総膜厚が250μmのGaN基板4’にする。得ら
れたGaN基板4’は反りが小さく、また欠陥も少ない
ために、このGaN上に形成した窒化物半導体素子は、
歩留が良く、また発光効率の優れたものが得られた。
After the third nitride semiconductor layer 4 has been grown, the wafer is taken out of the reaction vessel, and the remaining first nitride semiconductor layer 2 and second nitride semiconductor layer 3 are placed from the sapphire substrate side removed earlier. Is finally polished to form a GaN substrate 4 'having a total thickness of 250 μm. Since the obtained GaN substrate 4 ′ has a small warpage and few defects, the nitride semiconductor device formed on GaN
Good yield and good luminous efficiency were obtained.

【0057】[実施例5]実施例1において、第3の窒
化物半導体4をアンドープのGaNとした他は同様にし
て、GaN基板4’を得た。このGaN基板4’上に図
7に示すように、InGaNよりなるクラック防止層
(これは省略が可能である)、AlGaNとSiドープ
のGaNとの超格子からなるn側クラッド層6、GaN
よりなるn側光ガイド層7、InGaNよりなる多重量
子井戸構造(MQW)の活性層8、MgドープのAlG
aNよりなるp側キャップ層9、MgドープのGaNよ
りなるp側光ガイド層10、AlGaNとMgドープの
GaNとの超格子からなるp側クラッド層11、Mgド
ープのGaNよりなるp側コンタクト層12を順に積層
する。
[Example 5] A GaN substrate 4 'was obtained in the same manner as in Example 1, except that the third nitride semiconductor 4 was changed to undoped GaN. As shown in FIG. 7, a crack prevention layer made of InGaN (this can be omitted), an n-side cladding layer 6 made of a superlattice of AlGaN and Si-doped GaN,
N-side light guide layer 7 made of InGaN, active layer 8 having a multiple quantum well structure (MQW) made of InGaN, Mg-doped AlG
p-side cap layer 9 made of aN, p-side optical guide layer 10 made of Mg-doped GaN, p-side cladding layer 11 made of a superlattice of AlGaN and Mg-doped GaN, p-side contact layer made of Mg-doped GaN 12 are sequentially stacked.

【0058】積層後、p側コンタクト層とp側クラッド
層とをエッチングして表面をリッジ形状とし、リッジ上
にZrO2などの絶縁膜31とpオーミック電極20を
形成し、最後にpパッド電極21を、またp電極とは反
対のGaN基板側にnオーミック電極22とnパッド電
極23を形成し、最後にGaNの劈開により共振面を形
成し、チップ化する。以上のようにして窒化物半導体レ
ーザ素子を得て、これをフェースアップ(基板とヒート
シンクとが対抗した状態)でヒートシンクに設置し、そ
れぞれの電極をワイヤーボンディングして、室温で連続
発振を試みたところ、閾値電流密度2kA/cm2、2
0mWの出力において、連続発振が確認され、1000
時間以上の寿命を示した。
After the lamination, the p-side contact layer and the p-side cladding layer are etched to form a ridge surface, an insulating film 31 such as ZrO 2 and a p-ohmic electrode 20 are formed on the ridge, and finally a p-pad electrode is formed. An n-ohmic electrode 22 and an n-pad electrode 23 are formed on the GaN substrate side opposite to the p-electrode, and finally a resonance surface is formed by cleavage of GaN to form a chip. As described above, a nitride semiconductor laser device was obtained, this was mounted on a heat sink face up (in a state where the substrate and the heat sink were opposed to each other), and the respective electrodes were wire-bonded, and continuous oscillation was attempted at room temperature. However, the threshold current density is 2 kA / cm 2 , 2
At an output of 0 mW, continuous oscillation was confirmed.
It showed a lifetime of more than hours.

【0059】[実施例6]異種基板1として、2インチ
φ、C面を主面とし、オリフラ面をA面とするサファイ
ア基板1において、さらにステップ上にオフアングルさ
れ、そのオフ角が0.13°、ステップに沿う方向(段
差方向)がA面に垂直に形成された基板を用いる他は実
施例2と同様にして窒化物半導体レーザ素子を得て、室
温で連続発振を試みたところ、閾値電流密度2kA/c
2、20mWの出力において、連続発振が確認され、
3000時間以上の寿命を示した。
[Embodiment 6] In the sapphire substrate 1 having a 2-inch φ, C-plane as a main surface and an orientation flat surface as an A-plane as the heterogeneous substrate 1, the sapphire substrate 1 is further off-angled on a step, and the off-angle is set to 0. A nitride semiconductor laser device was obtained in the same manner as in Example 2 except that a substrate formed at 13 ° and the direction along the step (step direction) was perpendicular to the A-plane, and continuous oscillation was attempted at room temperature. Threshold current density 2 kA / c
At the output of the m 2, 20 mW, continuous oscillation is confirmed,
It showed a life of more than 3000 hours.

【0060】[実施例7]実施例1と同様にしてGaN
基板4’を作製する。得られたGaN基板上にAlGa
Nよりなるn側コンタクト層5、InGaNよりなるク
ラック防止層(これは省略が可能である)、AlGaN
とSiドープのGaNとの超格子からなるn側クラッド
層6、InGaNよりなる多重量子井戸構造(MQW)
の活性層8、MgドープのAlGaNよりなるp側キャ
ップ層9、AlGaNとMgドープのGaNとの超格子
からなるp側クラッド層11、MgドープのGaNより
なるp側コンタクト層12を順に積層する。積層後、p
側コンタクト層12上にpオーミック電極(透明電極)
20とpパッド電極21を形成し、p電極とは反対のG
aN基板側にnオーミック電極22と、nパッド電極2
3を形成し、最後にGaNの劈開によりチップ化する。
以上のようにして得られたLED素子は順方向電流20
mAにおいて、順方向電圧3.4V、465nmの青色
発光を示し、発光出力は9mWであった。
[Embodiment 7] In the same manner as in Embodiment 1, GaN
A substrate 4 'is manufactured. AlGa on the obtained GaN substrate
N-side contact layer 5 made of N, a crack prevention layer made of InGaN (this can be omitted), AlGaN
N-side cladding layer 6 made of superlattice of Si and GaN doped with Si, multiple quantum well structure (MQW) made of InGaN
Active layer 8, a p-side cap layer 9 made of Mg-doped AlGaN, a p-side cladding layer 11 made of a superlattice of AlGaN and Mg-doped GaN, and a p-side contact layer 12 made of Mg-doped GaN are stacked in this order. . After lamination, p
P ohmic electrode (transparent electrode) on the side contact layer 12
20 and a p-pad electrode 21 are formed.
The n ohmic electrode 22 and the n pad electrode 2
3 is formed, and finally a chip is formed by cleavage of GaN.
The LED element obtained as described above has a forward current of 20
At mA, the device exhibited blue light emission with a forward voltage of 3.4 V and 465 nm, and the light emission output was 9 mW.

【0061】[0061]

【発明の効果】以上説明したように、従来のGaN基板
を得る方法では異種基板とGaNとの格子不整合により
応力が発生し、基板に大きな反りが生じていたが、本発
明の方法によると、異種基板側から研磨をしてGaNの
みにすると反りが生じてしまうが、このGaN基板にさ
らに厚膜でGaNを積層することによって、異種基板と
GaNとの格子不整合によって発生した際のひずみ応力
が緩和され、反りが軽減し、良好なGaN基板が得られ
る。
As described above, according to the conventional method of obtaining a GaN substrate, stress is generated due to lattice mismatch between the heterogeneous substrate and GaN, and the substrate is greatly warped. However, according to the method of the present invention, However, if GaN is polished from the heterogeneous substrate side and only GaN is used, warpage occurs. However, when GaN is further laminated on this GaN substrate with a thick film, distortion caused by lattice mismatch between the heterogeneous substrate and GaN is caused. Stress is relieved, warpage is reduced, and a good GaN substrate is obtained.

【0062】さらに本発明の製造方法によって得られる
GaN基板は、エピタキシャル成長したGaNを利用し
て作製するため、非常に結晶欠陥が少ないGaN基板を
比較的厚い膜で得ることができ、特に層構成の複雑な窒
化物半導体レーザ素子の作製に有用である。
Further, since the GaN substrate obtained by the manufacturing method of the present invention is manufactured using GaN grown epitaxially, a GaN substrate having very few crystal defects can be obtained as a relatively thick film. It is useful for manufacturing a complex nitride semiconductor laser device.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の第1の工程を説明するGaN基板の
構造を示す模式断面図。
FIG. 1 is a schematic cross-sectional view showing a structure of a GaN substrate for explaining a first step of the present invention.

【図2】 本発明の第2の工程を説明するGaN基板の
構造を示す模式断面図。
FIG. 2 is a schematic cross-sectional view illustrating a structure of a GaN substrate illustrating a second step of the present invention.

【図3】 本発明の第3の工程を説明するGaN基板の
構造を示す模式断面図。
FIG. 3 is a schematic cross-sectional view showing a structure of a GaN substrate for explaining a third step of the present invention.

【図4】 本発明の第4の工程を説明するGaN基板の
構造を示す模式断面図。
FIG. 4 is a schematic cross-sectional view illustrating a structure of a GaN substrate illustrating a fourth step of the present invention.

【図5】 本発明の第5の工程を説明するGaN基板の
構造を示す模式断面図。
FIG. 5 is a schematic cross-sectional view showing a structure of a GaN substrate for explaining a fifth step of the present invention.

【図6】 本発明の他の実施例を説明するGaN基板を
用いたレーザ素子の構造を示す模式断面図。
FIG. 6 is a schematic sectional view showing the structure of a laser device using a GaN substrate for explaining another embodiment of the present invention.

【図7】 本発明の実施例によって得られるGaN基板
を用いたレーザ素子の構造を示す模式断面図。
FIG. 7 is a schematic cross-sectional view showing the structure of a laser device using a GaN substrate obtained according to an embodiment of the present invention.

【図8】 本発明の他の実施例によって得られるGaN
基板を用いたレーザ素子の構造を示す模式断面図。
FIG. 8 shows GaN obtained according to another embodiment of the present invention.
FIG. 3 is a schematic cross-sectional view showing the structure of a laser device using a substrate.

【図9】 本発明の他の実施例によって得られるGaN
基板を用いたレーザ素子の構造を示す模式断面図。
FIG. 9 shows GaN obtained according to another embodiment of the present invention.
FIG. 3 is a schematic cross-sectional view showing the structure of a laser device using a substrate.

【符号の簡単な説明】[Brief description of reference numerals]

1・・・異種基板 2・・・第1の窒化物半導体層 3・・・第2の窒化物半導体層 4・・・第3の窒化物半導体層 4’・・・GaN基板 5・・・n側コンタクト層 6・・・n側クラッド層 7・・・n側光ガイド層 8・・・活性層 9・・・p側キャップ層 10・・・p側光ガイド層 11・・・p側クラッド層 12・・・p側コンタクト層 20・・・pオーミック電極 21・・・pパッド電極 22・・・nオーミック電極 23・・・nパッド電極 30・・・SiO2 31・・・絶縁膜DESCRIPTION OF SYMBOLS 1 ... Different substrate 2 ... 1st nitride semiconductor layer 3 ... 2nd nitride semiconductor layer 4 ... 3rd nitride semiconductor layer 4 '... GaN substrate 5 ... n-side contact layer 6 ... n-side cladding layer 7 ... n-side light guide layer 8 ... active layer 9 ... p-side cap layer 10 ... p-side light guide layer 11 ... p-side Cladding layer 12 ... p-side contact layer 20 ... p ohmic electrode 21 ... p pad electrode 22 ... n ohmic electrode 23 ... n pad electrode 30 ... SiO 2 31 ... insulating film

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Claims (9)

【特許請求の範囲】[Claims] 【請求項1】GaN基板上に窒化物半導体を積層して窒
化物半導体素子となるGaN基板の製造方法であって、 窒化物半導体と異なる異種基板上にラテラル成長による
GaNを含む第1の窒化物半導体層を成長させる第1の
工程と、 その上に第2の窒化物半導体を成長させる第2の工程
と、 第2の工程後、少なくとも異種基板までを除去する第3
の工程と、 第3の工程後、第2の窒化物半導体の上に第3の窒化物
半導体を成長させる第4の工程とを有することを特徴と
するGaN基板の製造方法。
1. A method of manufacturing a GaN substrate which is a nitride semiconductor device by laminating a nitride semiconductor on a GaN substrate, wherein the first nitride including GaN by lateral growth on a heterogeneous substrate different from the nitride semiconductor A first step of growing a nitride semiconductor layer, a second step of growing a second nitride semiconductor thereon, and a third step of removing at least up to a heterogeneous substrate after the second step.
And a fourth step of, after the third step, growing a third nitride semiconductor on the second nitride semiconductor.
【請求項2】前記第1の工程は、異種基板上にGaNを
成長させた後、そのGaN表面に凹凸を形成し、少なく
とも凹部から凸部の表面にわたって、GaNをほぼ横方
向に成長させる工程であることを特徴とする請求項1に
記載のGaN基板の製造方法。
2. The first step comprises, after growing GaN on a heterogeneous substrate, forming irregularities on the surface of the GaN, and growing the GaN in a substantially horizontal direction at least from the surface of the concave portion to the surface of the convex portion. The method for manufacturing a GaN substrate according to claim 1, wherein
【請求項3】前記第4の工程後、異種基板を除去した側
から第2の窒化物半導体の一部または全部、あるいは第
3の窒化物半導体の一部までを除去する第5の工程を有
することを特徴とする請求項1または請求項2に記載の
GaN基板の製造方法。
3. A fifth step of removing part or all of the second nitride semiconductor or part of the third nitride semiconductor from the side from which the heterogeneous substrate has been removed after the fourth step. The method for manufacturing a GaN substrate according to claim 1, wherein the GaN substrate is provided.
【請求項4】前記第2の窒化物半導体層の厚さは、10
μm以上400μm以下に調整することを特徴とする請
求項1から請求項3のいずれか1項に記載のGaN基板
の製造方法。
4. The thickness of the second nitride semiconductor layer is 10
The method for producing a GaN substrate according to claim 1, wherein the thickness is adjusted to be not less than μm and not more than 400 μm.
【請求項5】前記第3の窒化物半導体層の厚さは、10
0μm以上400μm以下に調整することを特徴とする
請求項1から請求項4のいずれか1項に記載のGaN基
板の製造方法。
5. The semiconductor device according to claim 1, wherein said third nitride semiconductor layer has a thickness of 10
The method for producing a GaN substrate according to any one of claims 1 to 4, wherein the thickness is adjusted to 0 µm or more and 400 µm or less.
【請求項6】前記第1の工程はMOVPE法により、第
2の工程および第4の工程はHVPE法により窒化物半
導体を成長させることを特徴とする請求項1から請求項
5のいずれか1項に記載のGaN基板の製造方法。
6. The method according to claim 1, wherein the first step is to grow the nitride semiconductor by MOVPE, and the second and fourth steps are to grow the nitride semiconductor by HVPE. Item 13. The method for producing a GaN substrate according to item 1.
【請求項7】前記第5の工程後、GaN基板を研磨して
厚さを100μm以上300μm以下にして、この上に
デバイス構造を作製することを特徴とする請求項3から
請求項6のいずれか1項に記載のGaN基板の製造方
法。
7. The method according to claim 3, wherein after the fifth step, the GaN substrate is polished to a thickness of 100 μm or more and 300 μm or less, and a device structure is formed thereon. 2. The method for producing a GaN substrate according to claim 1.
【請求項8】前記窒化物半導体と異なる異種基板は、C
面を基準としてオフアングルされたサファイア基板を用
いることを特徴とする請求項1から請求項7のいずれか
1項に記載のGaN基板の製造方法。
8. A different substrate different from the nitride semiconductor,
The method of manufacturing a GaN substrate according to any one of claims 1 to 7, wherein a sapphire substrate that is off-angled with respect to a plane is used.
【請求項9】前記第2の窒化物半導体層および/または
第3の窒化物半導体層に、SiあるいはSnをドープす
ることを特徴とする請求項1から請求項8のいずれか1
項に記載のGaN基板の製造方法。
9. The semiconductor device according to claim 1, wherein the second nitride semiconductor layer and / or the third nitride semiconductor layer is doped with Si or Sn.
Item 13. The method for producing a GaN substrate according to item 1.
JP05341499A 1999-03-02 1999-03-02 Nitride semiconductor Expired - Fee Related JP3896718B2 (en)

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