GB2309584A - Forming S.O.I. substrates - Google Patents
Forming S.O.I. substrates Download PDFInfo
- Publication number
- GB2309584A GB2309584A GB9626954A GB9626954A GB2309584A GB 2309584 A GB2309584 A GB 2309584A GB 9626954 A GB9626954 A GB 9626954A GB 9626954 A GB9626954 A GB 9626954A GB 2309584 A GB2309584 A GB 2309584A
- Authority
- GB
- United Kingdom
- Prior art keywords
- oxide film
- layer
- wafer
- doped oxide
- diffusion preventing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000000758 substrate Substances 0.000 title claims description 34
- 238000000034 method Methods 0.000 claims description 30
- 238000009792 diffusion process Methods 0.000 claims description 21
- 239000012212 insulator Substances 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 7
- 239000005380 borophosphosilicate glass Substances 0.000 claims description 6
- 239000002019 doping agent Substances 0.000 claims description 5
- 238000005530 etching Methods 0.000 claims description 5
- 239000000126 substance Substances 0.000 claims description 5
- 238000000227 grinding Methods 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 description 49
- 239000002245 particle Substances 0.000 description 7
- 239000005360 phosphosilicate glass Substances 0.000 description 5
- 238000002955 isolation Methods 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- -1 oxygen ions Chemical class 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 241000206607 Porphyra umbilicalis Species 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950069481A KR970052024A (ko) | 1995-12-30 | 1995-12-30 | 에스 오 아이 기판 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9626954D0 GB9626954D0 (en) | 1997-02-12 |
GB2309584A true GB2309584A (en) | 1997-07-30 |
Family
ID=19448473
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9626954A Withdrawn GB2309584A (en) | 1995-12-30 | 1996-12-27 | Forming S.O.I. substrates |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPH1032321A (zh) |
KR (1) | KR970052024A (zh) |
CN (1) | CN1078739C (zh) |
DE (1) | DE19653632B4 (zh) |
GB (1) | GB2309584A (zh) |
TW (1) | TW310458B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105742356A (zh) * | 2014-12-26 | 2016-07-06 | 台湾积体电路制造股份有限公司 | Finfet结构及其制造方法 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100359681B1 (ko) * | 2000-03-15 | 2002-11-04 | 오정훈 | 장신구용 금속모조보석 제작방법 |
US6541861B2 (en) | 2000-06-30 | 2003-04-01 | Kabushiki Kaisha Toshiba | Semiconductor device manufacturing method including forming step of SOI structure and semiconductor device having SOI structure |
WO2003103057A1 (en) * | 2002-05-31 | 2003-12-11 | Advanced Micro Devices, Inc. | Diffusion barrier layer in semiconductor substrates to reduce copper contamination from the back side |
KR100511656B1 (ko) * | 2002-08-10 | 2005-09-07 | 주식회사 실트론 | 나노 에스오아이 웨이퍼의 제조방법 및 그에 따라 제조된나노 에스오아이 웨이퍼 |
JP5194508B2 (ja) * | 2007-03-26 | 2013-05-08 | 信越半導体株式会社 | Soiウエーハの製造方法 |
CN101916761B (zh) * | 2010-07-20 | 2012-07-04 | 中国科学院上海微系统与信息技术研究所 | 一种soi埋氧层下的导电层及其制作工艺 |
JP2016100566A (ja) * | 2014-11-26 | 2016-05-30 | トヨタ自動車株式会社 | Soiウエハの製造方法及びsoiウエハ |
CN105392089A (zh) * | 2015-12-03 | 2016-03-09 | 瑞声声学科技(深圳)有限公司 | 复合层结构及其制造方法 |
CN105392093B (zh) * | 2015-12-03 | 2018-09-11 | 瑞声声学科技(深圳)有限公司 | 麦克风芯片的制造方法 |
EP3427293B1 (en) * | 2016-03-07 | 2021-05-05 | Globalwafers Co., Ltd. | Semiconductor on insulator structure comprising a low temperature flowable oxide layer and method of manufacture thereof |
US10741638B2 (en) * | 2018-08-08 | 2020-08-11 | Infineon Technologies Austria Ag | Oxygen inserted Si-layers for reduced substrate dopant outdiffusion in power devices |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0553860A2 (en) * | 1992-01-31 | 1993-08-04 | Canon Kabushiki Kaisha | Semiconductor substrate and process for preparing the same |
US5362667A (en) * | 1992-07-28 | 1994-11-08 | Harris Corporation | Bonded wafer processing |
US5387555A (en) * | 1992-09-03 | 1995-02-07 | Harris Corporation | Bonded wafer processing with metal silicidation |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4641173A (en) * | 1985-11-20 | 1987-02-03 | Texas Instruments Incorporated | Integrated circuit load device |
-
1995
- 1995-12-30 KR KR1019950069481A patent/KR970052024A/ko not_active Application Discontinuation
-
1996
- 1996-12-19 TW TW085115677A patent/TW310458B/zh active
- 1996-12-20 DE DE19653632A patent/DE19653632B4/de not_active Expired - Fee Related
- 1996-12-26 JP JP8357094A patent/JPH1032321A/ja active Pending
- 1996-12-27 GB GB9626954A patent/GB2309584A/en not_active Withdrawn
- 1996-12-30 CN CN96123934A patent/CN1078739C/zh not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0553860A2 (en) * | 1992-01-31 | 1993-08-04 | Canon Kabushiki Kaisha | Semiconductor substrate and process for preparing the same |
US5362667A (en) * | 1992-07-28 | 1994-11-08 | Harris Corporation | Bonded wafer processing |
US5387555A (en) * | 1992-09-03 | 1995-02-07 | Harris Corporation | Bonded wafer processing with metal silicidation |
US5569620A (en) * | 1992-09-03 | 1996-10-29 | Harris Corporation | Bonded wafer processing with metal silicidation |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105742356A (zh) * | 2014-12-26 | 2016-07-06 | 台湾积体电路制造股份有限公司 | Finfet结构及其制造方法 |
CN105742356B (zh) * | 2014-12-26 | 2019-06-11 | 台湾积体电路制造股份有限公司 | Finfet结构及其制造方法 |
Also Published As
Publication number | Publication date |
---|---|
JPH1032321A (ja) | 1998-02-03 |
KR970052024A (ko) | 1997-07-29 |
DE19653632B4 (de) | 2004-08-26 |
TW310458B (zh) | 1997-07-11 |
CN1162834A (zh) | 1997-10-22 |
CN1078739C (zh) | 2002-01-30 |
GB9626954D0 (en) | 1997-02-12 |
DE19653632A1 (de) | 1997-07-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6051477A (en) | Method of fabricating semiconductor device | |
US5426072A (en) | Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate | |
JP2806277B2 (ja) | 半導体装置及びその製造方法 | |
US6600173B2 (en) | Low temperature semiconductor layering and three-dimensional electronic circuits using the layering | |
US5953622A (en) | Method for fabricating semiconductor wafers | |
US5569620A (en) | Bonded wafer processing with metal silicidation | |
US5627106A (en) | Trench method for three dimensional chip connecting during IC fabrication | |
US6242320B1 (en) | Method for fabricating SOI wafer | |
US6879029B2 (en) | Semiconductor device having element isolation structure | |
US7348252B2 (en) | Method of forming silicon-on-insulator wafer having reentrant shape dielectric trenches | |
EP0391562A3 (en) | Semiconductor devices incorporating a tungsten contact and fabrication thereof | |
JPH0344419B2 (zh) | ||
CA2125465A1 (en) | Method of Making Integrated Circuits | |
US6861726B2 (en) | Apparatus having trench isolation structure with reduced isolation pad height and edge spacer | |
GB2309584A (en) | Forming S.O.I. substrates | |
GB2309825A (en) | SOI semiconductor device and method of fabricating the same | |
US6576508B2 (en) | Formation of a frontside contact on silicon-on-insulator substrate | |
US6127244A (en) | Method of manufacturing semiconductor device | |
US5081061A (en) | Manufacturing ultra-thin dielectrically isolated wafers | |
JPH02502417A (ja) | 半導体素子の製造方法 | |
US5907783A (en) | Method of fabricating silicon-on-insulator substrate | |
US5449638A (en) | Process on thickness control for silicon-on-insulator technology | |
JPH0883837A (ja) | 半導体装置及びその製造方法 | |
US6525402B1 (en) | Semiconductor wafer, method of manufacturing the same and semiconductor device | |
US6156621A (en) | Method for fabricating direct wafer bond Si/SiO2 /Si substrates |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |