GB2096834B - Process for the manufacture of substrates to interconnect electronic components and articles made by said process - Google Patents

Process for the manufacture of substrates to interconnect electronic components and articles made by said process

Info

Publication number
GB2096834B
GB2096834B GB8210855A GB8210855A GB2096834B GB 2096834 B GB2096834 B GB 2096834B GB 8210855 A GB8210855 A GB 8210855A GB 8210855 A GB8210855 A GB 8210855A GB 2096834 B GB2096834 B GB 2096834B
Authority
GB
United Kingdom
Prior art keywords
base
filament
coated
coating
substrates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB8210855A
Other languages
English (en)
Other versions
GB2096834A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kollmorgen Technologies Corp
Original Assignee
Kollmorgen Technologies Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kollmorgen Technologies Corp filed Critical Kollmorgen Technologies Corp
Publication of GB2096834A publication Critical patent/GB2096834A/en
Application granted granted Critical
Publication of GB2096834B publication Critical patent/GB2096834B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • H05K7/02Arrangements of circuit components or wiring on supporting structure
    • H05K7/06Arrangements of circuit components or wiring on supporting structure on insulating boards, e.g. wiring harnesses
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63Vias, e.g. via plugs
    • H10W70/635Through-vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09472Recessed pad for surface mounting; Recessed electrode of component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10287Metal wires as connectors or conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10727Leadless chip carrier [LCC], e.g. chip-modules for cards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/103Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding or embedding conductive wires or strips
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/682Shapes or dispositions thereof comprising holes having chips therein
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24273Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
    • Y10T428/24322Composite web or sheet

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Chemically Coating (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
GB8210855A 1981-04-14 1982-04-14 Process for the manufacture of substrates to interconnect electronic components and articles made by said process Expired GB2096834B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/254,132 US4500389A (en) 1981-04-14 1981-04-14 Process for the manufacture of substrates to interconnect electronic components

Publications (2)

Publication Number Publication Date
GB2096834A GB2096834A (en) 1982-10-20
GB2096834B true GB2096834B (en) 1985-10-23

Family

ID=22963047

Family Applications (2)

Application Number Title Priority Date Filing Date
GB8210855A Expired GB2096834B (en) 1981-04-14 1982-04-14 Process for the manufacture of substrates to interconnect electronic components and articles made by said process
GB08422466A Expired GB2146177B (en) 1981-04-14 1984-09-05 Substrates for interconnecting electronic components

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB08422466A Expired GB2146177B (en) 1981-04-14 1984-09-05 Substrates for interconnecting electronic components

Country Status (13)

Country Link
US (1) US4500389A (enExample)
JP (1) JPS5979594A (enExample)
AT (1) AT385624B (enExample)
AU (1) AU559827B2 (enExample)
CA (1) CA1189196A (enExample)
CH (1) CH660275A5 (enExample)
DE (1) DE3211025A1 (enExample)
ES (3) ES8304363A1 (enExample)
FR (1) FR2503931B1 (enExample)
GB (2) GB2096834B (enExample)
IT (1) IT1147672B (enExample)
NL (1) NL191641C (enExample)
SE (1) SE449678B (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0113820B1 (en) * 1982-12-22 1987-09-09 International Business Machines Corporation Method and apparatus for embedding wire in a photocurable adhesive
EP0168602A1 (en) * 1984-06-25 1986-01-22 Kollmorgen Technologies Corporation Method for making interconnection circuit boards
US4581098A (en) * 1984-10-19 1986-04-08 International Business Machines Corporation MLC green sheet process
GB2168857A (en) * 1984-11-14 1986-06-25 Int Standard Electric Corp Method and structure for interconnecting high frequency components
FR2585210B1 (fr) * 1985-07-19 1994-05-06 Kollmorgen Technologies Corp Procede de fabrication de plaquettes a circuits d'interconnexion
US4711026A (en) * 1985-07-19 1987-12-08 Kollmorgen Technologies Corporation Method of making wires scribed circuit boards
US4818322A (en) * 1985-07-19 1989-04-04 Kollmorgen Technologies Corporation Method for scribing conductors via laser
US4693778A (en) * 1985-07-19 1987-09-15 Kollmorgen Technologies Corporation Apparatus for making scribed circuit boards and circuit board modifications
US4679321A (en) * 1985-10-18 1987-07-14 Kollmorgen Technologies Corporation Method for making coaxial interconnection boards
US4743710A (en) * 1985-10-18 1988-05-10 Kollmorgen Technologies Corporation Coaxial interconnection boards
US4972050A (en) * 1989-06-30 1990-11-20 Kollmorgen Corporation Wire scribed circuit boards and methods of their manufacture
JP2811811B2 (ja) * 1989-10-03 1998-10-15 三菱電機株式会社 液晶表示装置
DE69122570T2 (de) * 1990-07-25 1997-02-13 Hitachi Chemical Co Ltd Leiterplatte mit Verbindung von Koaxialleitern untereinander
DE4037488A1 (de) * 1990-11-24 1992-05-27 Bosch Gmbh Robert Leistungsbausteine mit elektrisch isolierender thermischer ankopplung
WO1997046349A1 (en) * 1996-06-05 1997-12-11 Burgess Larry W Blind via laser drilling system
US7062845B2 (en) 1996-06-05 2006-06-20 Laservia Corporation Conveyorized blind microvia laser drilling system
US6631558B2 (en) 1996-06-05 2003-10-14 Laservia Corporation Blind via laser drilling system
US6005991A (en) * 1997-11-26 1999-12-21 Us Conec Ltd Printed circuit board assembly having a flexible optical circuit and associated fabrication method
DE102006059127A1 (de) 2006-09-25 2008-03-27 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung einer Anordnung optoelektronischer Bauelemente und Anordnung optoelektronischer Bauelemente
DE102012223077A1 (de) * 2012-12-13 2014-06-18 Robert Bosch Gmbh Kontaktanordnung für einen mehrlagigen Schaltungsträger

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE394600B (sv) * 1967-03-17 1977-07-04 Thams J P B Forfarande for framstellning av en beleggning med onskad ytstruktur pa ett foremal
US3499219A (en) * 1967-11-06 1970-03-10 Bunker Ramo Interconnection means and method of fabrication thereof
US3674914A (en) * 1968-02-09 1972-07-04 Photocircuits Corp Wire scribed circuit boards and method of manufacture
DE1690347A1 (de) * 1968-02-24 1971-05-13 Telefunken Patent Verfahren zur Herstellung einer Verdrahtungsplatte
US3674602A (en) * 1969-10-09 1972-07-04 Photocircuits Corp Apparatus for making wire scribed circuit boards
JPS5550399B1 (enExample) * 1970-03-05 1980-12-17
GB1379558A (en) * 1971-05-15 1975-01-02 Int Computers Ltd Methods of manufacture of multilayer circuit structures
CA1001320A (en) * 1972-02-28 1976-12-07 Robert P. Burr Electric wiring assemblies
US4030190A (en) * 1976-03-30 1977-06-21 International Business Machines Corporation Method for forming a multilayer printed circuit board
ZA781637B (en) * 1977-06-20 1979-02-28 Kollmorgen Tech Corp Wire scribed circuit board and method for the manufacture thereof
ZA775455B (en) * 1977-08-09 1978-07-26 Kollmorgen Tech Corp Improved methods and apparatus for making scribed circuit boards
US4258468A (en) * 1978-12-14 1981-03-31 Western Electric Company, Inc. Forming vias through multilayer circuit boards
JPS5810893A (ja) * 1981-07-14 1983-01-21 日本電気株式会社 配線板およびその製造方法
JPS5857782A (ja) * 1981-10-01 1983-04-06 日本電気株式会社 配線板およびその製造方法
EP0113820B1 (en) * 1982-12-22 1987-09-09 International Business Machines Corporation Method and apparatus for embedding wire in a photocurable adhesive

Also Published As

Publication number Publication date
DE3211025C2 (enExample) 1991-11-21
IT1147672B (it) 1986-11-26
GB8422466D0 (en) 1984-10-10
GB2096834A (en) 1982-10-20
ES513839A0 (es) 1983-11-01
SE449678B (sv) 1987-05-11
CH660275A5 (de) 1987-03-31
ATA116582A (de) 1987-09-15
AU559827B2 (en) 1987-03-19
AT385624B (de) 1988-04-25
JPS5979594A (ja) 1984-05-08
ES8400213A1 (es) 1983-11-01
US4500389A (en) 1985-02-19
DE3211025A1 (de) 1982-10-21
CA1189196A (en) 1985-06-18
ES511413A0 (es) 1983-03-01
IT8248207A0 (it) 1982-04-09
NL191641B (nl) 1995-07-17
FR2503931A1 (fr) 1982-10-15
ES513838A0 (es) 1985-03-16
FR2503931B1 (fr) 1986-02-21
ES8503920A1 (es) 1985-03-16
NL191641C (nl) 1995-11-20
GB2146177A (en) 1985-04-11
AU8793982A (en) 1984-03-08
NL8201570A (nl) 1982-11-01
SE8202170L (sv) 1982-10-15
GB2146177B (en) 1985-10-23
ES8304363A1 (es) 1983-03-01

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Legal Events

Date Code Title Description
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PE20 Patent expired after termination of 20 years

Effective date: 20020413