GB1536003A - Method of producing semiconductor device - Google Patents

Method of producing semiconductor device

Info

Publication number
GB1536003A
GB1536003A GB50319/76A GB5031976A GB1536003A GB 1536003 A GB1536003 A GB 1536003A GB 50319/76 A GB50319/76 A GB 50319/76A GB 5031976 A GB5031976 A GB 5031976A GB 1536003 A GB1536003 A GB 1536003A
Authority
GB
United Kingdom
Prior art keywords
insulating film
forming
semi
substrate
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB50319/76A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Publication of GB1536003A publication Critical patent/GB1536003A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/61—Formation of materials, e.g. in the shape of layers or pillars of insulating materials using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662—Laminate layers, e.g. stacks of alternating high-k metal oxides

Landscapes

  • Formation Of Insulating Films (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Thyristors (AREA)
GB50319/76A 1975-12-03 1976-12-02 Method of producing semiconductor device Expired GB1536003A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50144255A JPS5922381B2 (ja) 1975-12-03 1975-12-03 ハンドウタイソシノ セイゾウホウホウ

Publications (1)

Publication Number Publication Date
GB1536003A true GB1536003A (en) 1978-12-13

Family

ID=15357835

Family Applications (1)

Application Number Title Priority Date Filing Date
GB50319/76A Expired GB1536003A (en) 1975-12-03 1976-12-02 Method of producing semiconductor device

Country Status (5)

Country Link
US (1) US4155802A (enExample)
JP (1) JPS5922381B2 (enExample)
DE (1) DE2654689C2 (enExample)
FR (1) FR2334206A1 (enExample)
GB (1) GB1536003A (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4367119A (en) * 1980-08-18 1983-01-04 International Business Machines Corporation Planar multi-level metal process with built-in etch stop
US4400411A (en) * 1982-07-19 1983-08-23 The United States Of America As Represented By The Secretary Of The Air Force Technique of silicon epitaxial refill
US6884295B2 (en) * 2000-05-29 2005-04-26 Tokyo Electron Limited Method of forming oxynitride film or the like and system for carrying out the same

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3632433A (en) * 1967-03-29 1972-01-04 Hitachi Ltd Method for producing a semiconductor device
DE1621522B2 (de) * 1967-05-13 1975-04-30 Telefunken Patentverwertungsgesellschaft Mbh, 7900 Ulm Verfahren zum Einbringen von nicht als Diffusionsmaske wirkenden Schichten oder von Öffnungen in eine, einen Halbleiterkörper bedeckende Siliziumnitridschicht
US3632438A (en) * 1967-09-29 1972-01-04 Texas Instruments Inc Method for increasing the stability of semiconductor devices
DE1800348B2 (de) * 1967-10-02 1971-07-22 Verfahren zum herstellen von halbleiterbauelementen
NL162250C (nl) * 1967-11-21 1980-04-15 Philips Nv Halfgeleiderinrichting met een halfgeleiderlichaam, waarvan aan een hoofdoppervlak het halfgeleideroppervlak plaatselijk met een oxydelaag is bedekt, en werkwijze voor het vervaardigen van planaire halfgeleider- inrichtingen.
US3615941A (en) * 1968-05-07 1971-10-26 Hitachi Ltd Method for manufacturing semiconductor device with passivation film
US3652324A (en) * 1968-08-15 1972-03-28 Westinghouse Electric Corp A METHOD OF VAPOR DEPOSITING A LAYER OF Si{11 N{11 {0 ON A SILICON BASE
US3759761A (en) * 1968-10-23 1973-09-18 Hitachi Ltd Washed emitter method for improving passivation of a transistor
DE1923265B2 (de) * 1969-05-07 1972-06-22 Licentia Patent Verwaltungs GmbH, 6000 Frankfurt Verfahren zum herstellen eines feldeffekttransistors mit isolierter steuerelektrode
US3925120A (en) * 1969-10-27 1975-12-09 Hitachi Ltd A method for manufacturing a semiconductor device having a buried epitaxial layer
US3917495A (en) * 1970-06-01 1975-11-04 Gen Electric Method of making improved planar devices including oxide-nitride composite layer
DE2047998A1 (de) * 1970-09-30 1972-04-06 Licentia Gmbh Verfahren zum Herstellen einer Planaranordnung
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
US3764423A (en) * 1972-03-15 1973-10-09 Bell Telephone Labor Inc Removal of dielectric ledges on semiconductors
NL7204741A (enExample) * 1972-04-08 1973-10-10
US3795557A (en) * 1972-05-12 1974-03-05 Lfe Corp Process and material for manufacturing semiconductor devices
US3924024A (en) * 1973-04-02 1975-12-02 Ncr Co Process for fabricating MNOS non-volatile memories
GB1437112A (en) * 1973-09-07 1976-05-26 Mullard Ltd Semiconductor device manufacture
US3874919A (en) * 1974-03-13 1975-04-01 Ibm Oxidation resistant mask layer and process for producing recessed oxide region in a silicon body
DE2557079C2 (de) * 1975-12-18 1984-05-24 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren zum Herstellen einer Maskierungsschicht

Also Published As

Publication number Publication date
US4155802A (en) 1979-05-22
DE2654689A1 (de) 1977-06-16
DE2654689C2 (de) 1986-10-23
JPS5922381B2 (ja) 1984-05-26
JPS5267970A (en) 1977-06-06
FR2334206B1 (enExample) 1980-10-17
FR2334206A1 (fr) 1977-07-01

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
746 Register noted 'licences of right' (sect. 46/1977)
PE20 Patent expired after termination of 20 years

Effective date: 19961201