GB1523889A - Logical apparatus for multiplying serial binary operands with sign - Google Patents

Logical apparatus for multiplying serial binary operands with sign

Info

Publication number
GB1523889A
GB1523889A GB4480675A GB4480675A GB1523889A GB 1523889 A GB1523889 A GB 1523889A GB 4480675 A GB4480675 A GB 4480675A GB 4480675 A GB4480675 A GB 4480675A GB 1523889 A GB1523889 A GB 1523889A
Authority
GB
United Kingdom
Prior art keywords
bit
multiplier
serial
multiplicand
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4480675A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US520542A external-priority patent/US3914590A/en
Priority claimed from US05/526,373 external-priority patent/US3947670A/en
Application filed by General Electric Co filed Critical General Electric Co
Publication of GB1523889A publication Critical patent/GB1523889A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/4806—Computations with complex numbers
    • G06F7/4812—Complex multiplication
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/525—Multiplying only in serial-serial fashion, i.e. both operands being entered serially
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3812—Devices capable of handling different types of numbers
    • G06F2207/3816—Accepting numbers of variable word length
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
GB4480675A 1974-11-04 1975-10-30 Logical apparatus for multiplying serial binary operands with sign Expired GB1523889A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US520542A US3914590A (en) 1974-11-04 1974-11-04 Serial two{3 s complementer
US05/526,373 US3947670A (en) 1974-11-22 1974-11-22 Signed multiplication logic

Publications (1)

Publication Number Publication Date
GB1523889A true GB1523889A (en) 1978-09-06

Family

ID=27060176

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4480675A Expired GB1523889A (en) 1974-11-04 1975-10-30 Logical apparatus for multiplying serial binary operands with sign

Country Status (5)

Country Link
JP (1) JPS5911939B2 (enrdf_load_stackoverflow)
DE (1) DE2549032A1 (enrdf_load_stackoverflow)
FR (1) FR2289963A1 (enrdf_load_stackoverflow)
GB (1) GB1523889A (enrdf_load_stackoverflow)
IT (1) IT1044100B (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110825345A (zh) * 2018-08-08 2020-02-21 闪迪技术有限公司 使用非易失性存储器单元的乘法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5949640A (ja) * 1982-09-16 1984-03-22 Toshiba Corp 乗算回路
JPS5965540U (ja) * 1982-10-25 1984-05-01 富士電機株式会社 インバ−タ装置
JP2555926B2 (ja) * 1993-04-28 1996-11-20 日本電気株式会社 中間周波増幅回路

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110825345A (zh) * 2018-08-08 2020-02-21 闪迪技术有限公司 使用非易失性存储器单元的乘法
CN110825345B (zh) * 2018-08-08 2024-04-19 闪迪技术有限公司 使用非易失性存储器单元的乘法

Also Published As

Publication number Publication date
JPS5168744A (enrdf_load_stackoverflow) 1976-06-14
DE2549032A1 (de) 1976-05-20
FR2289963B1 (enrdf_load_stackoverflow) 1981-04-17
IT1044100B (it) 1980-03-20
FR2289963A1 (fr) 1976-05-28
JPS5911939B2 (ja) 1984-03-19

Similar Documents

Publication Publication Date Title
US3648038A (en) Apparatus and method for obtaining the reciprocal of a number and the quotient of two numbers
US4229800A (en) Round off correction logic for modified Booth's algorithm
GB1195410A (en) Binary Multipliers
US4745570A (en) Binary multibit multiplier
US3956622A (en) Two's complement pipeline multiplier
EP0103722A3 (en) Multiplying circuit
EP0862110A2 (en) Wallace-tree multipliers using half and full adders
GB1523889A (en) Logical apparatus for multiplying serial binary operands with sign
GB1316322A (en) Scaling and number base converting apparatus
US5115408A (en) High speed multiplier
CA1290458C (en) Bit-serial integrator circuitry
US5870322A (en) Multiplier to selectively perform unsigned magnitude multiplication or signed magnitude multiplication
JPS6226723B2 (enrdf_load_stackoverflow)
US6167422A (en) Booth multiplication structure which selectively integrates the function of either of incrementing or negating with the function of booth multiplication
EP0318223A3 (en) High speed parallel multiplier circuit
US3890496A (en) Variable 8421 BCD multiplier
JPS5557948A (en) Digital adder
US3234369A (en) Square root device employing converging approximations
JPS63623A (ja) 乗算器
SU985783A1 (ru) Устройство дл умножени п-разр дных чисел
SU972517A1 (ru) Устройство дл выполнени быстрого преобразовани Фурье
SU1256019A1 (ru) Устройство дл делени
GB2157032A (en) Digital parallel odder
GB1395991A (en) Electornic arrangement for the multiplication of a binary- coded number in a system having an even-numbered radix greater than 2 with a factor equal to half the radix of siad system of numbers
GB2179770A (en) Method and digital circuit for fixed coefficient serial multiplication

Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee