GB1464080A - Circuit boards for semiconductor chips - Google Patents

Circuit boards for semiconductor chips

Info

Publication number
GB1464080A
GB1464080A GB1180675A GB1180675A GB1464080A GB 1464080 A GB1464080 A GB 1464080A GB 1180675 A GB1180675 A GB 1180675A GB 1180675 A GB1180675 A GB 1180675A GB 1464080 A GB1464080 A GB 1464080A
Authority
GB
United Kingdom
Prior art keywords
pads
chips
conductor
terminals
arrangements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1180675A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of GB1464080A publication Critical patent/GB1464080A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386—Geometry or layout of the interconnection structure
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
GB1180675A 1974-03-28 1975-03-21 Circuit boards for semiconductor chips Expired GB1464080A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19742415047 DE2415047B2 (de) 1974-03-28 1974-03-28 Multichip-verdrahtung mit anschlussflaechenkonfigurationen zur kontaktierung von vier gleichen halbleiterspeicher-chips

Publications (1)

Publication Number Publication Date
GB1464080A true GB1464080A (en) 1977-02-09

Family

ID=5911463

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1180675A Expired GB1464080A (en) 1974-03-28 1975-03-21 Circuit boards for semiconductor chips

Country Status (8)

Country Link
JP (1) JPS5836512B2 (enrdf_load_stackoverflow)
BE (1) BE827367A (enrdf_load_stackoverflow)
DE (1) DE2415047B2 (enrdf_load_stackoverflow)
FR (1) FR2266305B1 (enrdf_load_stackoverflow)
GB (1) GB1464080A (enrdf_load_stackoverflow)
IT (1) IT1034529B (enrdf_load_stackoverflow)
NL (1) NL7502773A (enrdf_load_stackoverflow)
SE (1) SE7503369L (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3123620A1 (de) * 1981-06-13 1983-01-05 Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt Anordnung zum verbinden eines speichers mit einer steuereinrichtung
GB2312562A (en) * 1996-04-26 1997-10-29 Appliance Control Technology E A method of connecting wiring with a PCB

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3033900C3 (de) * 1980-09-09 1994-12-15 Siemens Ag Gehäuseloses Schaltungsmodul und Verfahren zu seiner Herstellung
JPS57207356A (en) * 1981-06-15 1982-12-20 Fujitsu Ltd Semiconductor device
JPH0279123U (enrdf_load_stackoverflow) * 1988-12-02 1990-06-18
JPH02285910A (ja) * 1989-04-26 1990-11-26 Seijiro Isoi 鳥休止防止具
JPH052533U (ja) * 1991-02-25 1993-01-14 マサル工業株式会社 電線保護カバー

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3123620A1 (de) * 1981-06-13 1983-01-05 Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt Anordnung zum verbinden eines speichers mit einer steuereinrichtung
GB2312562A (en) * 1996-04-26 1997-10-29 Appliance Control Technology E A method of connecting wiring with a PCB
GB2312562B (en) * 1996-04-26 2000-05-17 Appliance Control Technology E A method of interconnecting wiring with a pcb

Also Published As

Publication number Publication date
NL7502773A (nl) 1975-09-30
JPS50131493A (enrdf_load_stackoverflow) 1975-10-17
DE2415047B2 (de) 1978-02-02
FR2266305A1 (enrdf_load_stackoverflow) 1975-10-24
SE7503369L (enrdf_load_stackoverflow) 1975-09-29
FR2266305B1 (enrdf_load_stackoverflow) 1978-02-24
JPS5836512B2 (ja) 1983-08-09
DE2415047C3 (enrdf_load_stackoverflow) 1978-09-21
IT1034529B (it) 1979-10-10
DE2415047A1 (de) 1975-10-16
BE827367A (fr) 1975-07-16

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee