FR2266305A1 - - Google Patents

Info

Publication number
FR2266305A1
FR2266305A1 FR7508898A FR7508898A FR2266305A1 FR 2266305 A1 FR2266305 A1 FR 2266305A1 FR 7508898 A FR7508898 A FR 7508898A FR 7508898 A FR7508898 A FR 7508898A FR 2266305 A1 FR2266305 A1 FR 2266305A1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7508898A
Other languages
French (fr)
Other versions
FR2266305B1 (enrdf_load_stackoverflow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Publication of FR2266305A1 publication Critical patent/FR2266305A1/fr
Application granted granted Critical
Publication of FR2266305B1 publication Critical patent/FR2266305B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386Geometry or layout of the interconnection structure
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
FR7508898A 1974-03-28 1975-03-21 Expired FR2266305B1 (enrdf_load_stackoverflow)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19742415047 DE2415047B2 (de) 1974-03-28 1974-03-28 Multichip-verdrahtung mit anschlussflaechenkonfigurationen zur kontaktierung von vier gleichen halbleiterspeicher-chips

Publications (2)

Publication Number Publication Date
FR2266305A1 true FR2266305A1 (enrdf_load_stackoverflow) 1975-10-24
FR2266305B1 FR2266305B1 (enrdf_load_stackoverflow) 1978-02-24

Family

ID=5911463

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7508898A Expired FR2266305B1 (enrdf_load_stackoverflow) 1974-03-28 1975-03-21

Country Status (8)

Country Link
JP (1) JPS5836512B2 (enrdf_load_stackoverflow)
BE (1) BE827367A (enrdf_load_stackoverflow)
DE (1) DE2415047B2 (enrdf_load_stackoverflow)
FR (1) FR2266305B1 (enrdf_load_stackoverflow)
GB (1) GB1464080A (enrdf_load_stackoverflow)
IT (1) IT1034529B (enrdf_load_stackoverflow)
NL (1) NL7502773A (enrdf_load_stackoverflow)
SE (1) SE7503369L (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0067677A3 (en) * 1981-06-15 1984-10-03 Fujitsu Limited Chip-array-constructed semiconductor device

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3033900C3 (de) * 1980-09-09 1994-12-15 Siemens Ag Gehäuseloses Schaltungsmodul und Verfahren zu seiner Herstellung
DE3123620A1 (de) * 1981-06-13 1983-01-05 Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt Anordnung zum verbinden eines speichers mit einer steuereinrichtung
JPH0279123U (enrdf_load_stackoverflow) * 1988-12-02 1990-06-18
JPH02285910A (ja) * 1989-04-26 1990-11-26 Seijiro Isoi 鳥休止防止具
JPH052533U (ja) * 1991-02-25 1993-01-14 マサル工業株式会社 電線保護カバー
GB2312562B (en) * 1996-04-26 2000-05-17 Appliance Control Technology E A method of interconnecting wiring with a pcb

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0067677A3 (en) * 1981-06-15 1984-10-03 Fujitsu Limited Chip-array-constructed semiconductor device
US4578697A (en) * 1981-06-15 1986-03-25 Fujitsu Limited Semiconductor device encapsulating a multi-chip array

Also Published As

Publication number Publication date
NL7502773A (nl) 1975-09-30
JPS50131493A (enrdf_load_stackoverflow) 1975-10-17
DE2415047B2 (de) 1978-02-02
SE7503369L (enrdf_load_stackoverflow) 1975-09-29
FR2266305B1 (enrdf_load_stackoverflow) 1978-02-24
GB1464080A (en) 1977-02-09
JPS5836512B2 (ja) 1983-08-09
DE2415047C3 (enrdf_load_stackoverflow) 1978-09-21
IT1034529B (it) 1979-10-10
DE2415047A1 (de) 1975-10-16
BE827367A (fr) 1975-07-16

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Legal Events

Date Code Title Description
ST Notification of lapse