GB1450689A - Circuit ar'ngements - Google Patents

Circuit ar'ngements

Info

Publication number
GB1450689A
GB1450689A GB4521673A GB4521673A GB1450689A GB 1450689 A GB1450689 A GB 1450689A GB 4521673 A GB4521673 A GB 4521673A GB 4521673 A GB4521673 A GB 4521673A GB 1450689 A GB1450689 A GB 1450689A
Authority
GB
United Kingdom
Prior art keywords
chip
circuit
glass
organic binder
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4521673A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Priority to GB4521673A priority Critical patent/GB1450689A/en
Publication of GB1450689A publication Critical patent/GB1450689A/en
Expired legal-status Critical Current

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    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/014Solder alloys
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
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    • H01L2924/1901Structure
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    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
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    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Ignition Installations For Internal Combustion Engines (AREA)

Abstract

1450689 Glass ceramic covered circuit elements INTERNATIONAL STANDARD ELECTRIC CORP 27 Sept 1973 45216/73 Heading C1M [Also in Division H1] In an electronic circuit comprising an unencapsulated device mounted on a circuit board wherein the contact areas of the device have been connected either directly or indirectly to circuit paths or another device on the circuit board, the unencapsulated device is individually embedded in a drop of a glass ceramic melted and partially crystallized. A silicon transistor 3 is bonded to a gold film 2 on a substrate 1. A1 or Cu wires 4 are connected by ultrasonic welding. Pulverized Pb Zn borate glass is mixed with an organic binder and a drop placed on the chip 3. The coated chip is heated to evaporate the organic binder and melt the glass. The gold film 2 may be replaced by tantalum resistors and the transistor chip by a diode, an MOS capacitor, or a ceramic chip resistor or capacitor.
GB4521673A 1973-09-27 1973-09-27 Circuit ar'ngements Expired GB1450689A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB4521673A GB1450689A (en) 1973-09-27 1973-09-27 Circuit ar'ngements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB4521673A GB1450689A (en) 1973-09-27 1973-09-27 Circuit ar'ngements

Publications (1)

Publication Number Publication Date
GB1450689A true GB1450689A (en) 1976-09-22

Family

ID=10436339

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4521673A Expired GB1450689A (en) 1973-09-27 1973-09-27 Circuit ar'ngements

Country Status (1)

Country Link
GB (1) GB1450689A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2118783A (en) * 1982-04-01 1983-11-02 Philips Corp Resistors
EP0157590A2 (en) * 1984-03-31 1985-10-09 Kabushiki Kaisha Toshiba Packaged electronic device
FR2791812A1 (en) * 1999-04-02 2000-10-06 Gemplus Card Int Chip card electronic chip module production method has pulverized material applied directly to dielectric support film to provide protective encapsulation film for each IC chip and its associated bonding wires

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2118783A (en) * 1982-04-01 1983-11-02 Philips Corp Resistors
EP0157590A2 (en) * 1984-03-31 1985-10-09 Kabushiki Kaisha Toshiba Packaged electronic device
EP0157590A3 (en) * 1984-03-31 1987-05-27 Kabushiki Kaisha Toshiba Packaged electronic device
FR2791812A1 (en) * 1999-04-02 2000-10-06 Gemplus Card Int Chip card electronic chip module production method has pulverized material applied directly to dielectric support film to provide protective encapsulation film for each IC chip and its associated bonding wires
WO2000060656A1 (en) * 1999-04-02 2000-10-12 Gemplus Method for producing portable electronic devices having an integrated circuit which is protected by a pulverized film

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Legal Events

Date Code Title Description
PS Patent sealed
746 Register noted 'licences of right' (sect. 46/1977)
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee