JPS6453568A - Semiconductor package - Google Patents

Semiconductor package

Info

Publication number
JPS6453568A
JPS6453568A JP62211867A JP21186787A JPS6453568A JP S6453568 A JPS6453568 A JP S6453568A JP 62211867 A JP62211867 A JP 62211867A JP 21186787 A JP21186787 A JP 21186787A JP S6453568 A JPS6453568 A JP S6453568A
Authority
JP
Japan
Prior art keywords
capacitive element
wiring board
lead
cap
recessed portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62211867A
Other languages
Japanese (ja)
Other versions
JPH06103731B2 (en
Inventor
Mutsuo Tsuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62211867A priority Critical patent/JPH06103731B2/en
Publication of JPS6453568A publication Critical patent/JPS6453568A/en
Publication of JPH06103731B2 publication Critical patent/JPH06103731B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To effectively radiate any heat produced in an IC through a cap by providing a recessed portion at the center of an IC packaging part on a printed board, and connecting a capacitive element formed in the recessed portion with a GND terminal of the IC and a power supply terminal or connecting in addition to the capacitive element a resistive element with arbitrary terminals of the IC. CONSTITUTION:In a semiconductor package where a TAB.IC is sealed with a wiring board 11 and a cap 10, a lead pad 104 connected to a lead 13 of the IC 12 is formed on a mounting part of the IC 12 at a surface corresponding to the circumference of, and is connected to an input/output pad 16 through an internal wiring 15. In addition, the wiring board 11 includes a recessed portion 17 at the center of a mount part of the IC 12, and two capacitive element pads 18 formed on the bottom thereof, one of the latter pads being connected to the GND terminal of the IC and the other connected to a power supply terminal. Both end electrodes of the capacitive element 19 are connected to the two capacitive element pads 18, respectively. The IC 12 is mounted faced down on the wiring board 11, and the lead 13 of the IC 12 is connected to the lead pad 14. A cap 10 is bonded with the wiring board 11 to seal the IC 12.
JP62211867A 1987-08-25 1987-08-25 Semiconductor package Expired - Fee Related JPH06103731B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62211867A JPH06103731B2 (en) 1987-08-25 1987-08-25 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62211867A JPH06103731B2 (en) 1987-08-25 1987-08-25 Semiconductor package

Publications (2)

Publication Number Publication Date
JPS6453568A true JPS6453568A (en) 1989-03-01
JPH06103731B2 JPH06103731B2 (en) 1994-12-14

Family

ID=16612927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62211867A Expired - Fee Related JPH06103731B2 (en) 1987-08-25 1987-08-25 Semiconductor package

Country Status (1)

Country Link
JP (1) JPH06103731B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03225859A (en) * 1990-01-30 1991-10-04 Nec Corp Semiconductor package
JPH0794630A (en) * 1993-09-25 1995-04-07 Nec Corp Semiconductor device
US5814883A (en) * 1995-10-04 1998-09-29 Mitsubishi Denki Kabushiki Kaisha Packaged semiconductor chip
JP2008078290A (en) * 2006-09-20 2008-04-03 Nec Corp Printed circuit board and method for manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03225859A (en) * 1990-01-30 1991-10-04 Nec Corp Semiconductor package
JPH0794630A (en) * 1993-09-25 1995-04-07 Nec Corp Semiconductor device
US5814883A (en) * 1995-10-04 1998-09-29 Mitsubishi Denki Kabushiki Kaisha Packaged semiconductor chip
JP2008078290A (en) * 2006-09-20 2008-04-03 Nec Corp Printed circuit board and method for manufacturing the same

Also Published As

Publication number Publication date
JPH06103731B2 (en) 1994-12-14

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees