GB1427014A - Semiconductor devices - Google Patents

Semiconductor devices

Info

Publication number
GB1427014A
GB1427014A GB1869073A GB1869073A GB1427014A GB 1427014 A GB1427014 A GB 1427014A GB 1869073 A GB1869073 A GB 1869073A GB 1869073 A GB1869073 A GB 1869073A GB 1427014 A GB1427014 A GB 1427014A
Authority
GB
United Kingdom
Prior art keywords
region
auxiliary
junction
guard
protected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1869073A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of GB1427014A publication Critical patent/GB1427014A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H01L29/0623—Buried supplementary region, e.g. buried guard ring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)
  • Thyristors (AREA)
  • Element Separation (AREA)
GB1869073A 1972-04-20 1973-04-18 Semiconductor devices Expired GB1427014A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3975972A JPS5320194B2 (fr) 1972-04-20 1972-04-20

Publications (1)

Publication Number Publication Date
GB1427014A true GB1427014A (en) 1976-03-03

Family

ID=12561864

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1869073A Expired GB1427014A (en) 1972-04-20 1973-04-18 Semiconductor devices

Country Status (7)

Country Link
JP (1) JPS5320194B2 (fr)
CA (1) CA985794A (fr)
DE (1) DE2320579C3 (fr)
FR (1) FR2181075B1 (fr)
GB (1) GB1427014A (fr)
IT (1) IT1049525B (fr)
NL (1) NL7305642A (fr)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2644654A1 (de) * 1976-09-03 1978-03-09 Bbc Brown Boveri & Cie Halbleiterbauelement
EP0851505A2 (fr) * 1996-12-31 1998-07-01 STMicroelectronics, Inc. Dispositif semi-conducteur comprenant une structure de terminaison à haute tension à région de façonnage de champ enterrée
GB2373634B (en) * 2000-10-31 2004-12-08 Fuji Electric Co Ltd Semiconductor device
GB2403346A (en) * 2000-10-31 2004-12-29 Fuji Electric Co Ltd Semiconductor device
US6943410B2 (en) 2001-06-12 2005-09-13 Fuji Electric Holdings Co., Ltd. High power vertical semiconductor device
CN106505092A (zh) * 2016-08-18 2017-03-15 全球能源互联网研究院 一种垂直型半导体器件的双面终端结构

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH633907A5 (de) * 1978-10-10 1982-12-31 Bbc Brown Boveri & Cie Leistungshalbleiterbauelement mit zonen-guard-ringen.
DE3832750A1 (de) * 1988-09-27 1990-03-29 Asea Brown Boveri Leistungshalbleiterbauelement
DE3832709A1 (de) * 1988-09-27 1990-03-29 Asea Brown Boveri Thyristor
GB2237930A (en) * 1989-11-01 1991-05-15 Philips Electronic Associated A semiconductor device and method of manufacturing a semiconductor device
DE19930783A1 (de) * 1999-07-03 2001-01-04 Bosch Gmbh Robert Halbleiterbauelement
US9236458B2 (en) * 2013-07-11 2016-01-12 Infineon Technologies Ag Bipolar transistor and a method for manufacturing a bipolar transistor

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1030050A (en) * 1963-11-13 1966-05-18 Motorola Inc Punchthrough breakdown rectifier
GB1078273A (en) * 1964-10-19 1967-08-09 Sony Corp Semiconductor device
US3391287A (en) * 1965-07-30 1968-07-02 Westinghouse Electric Corp Guard junctions for p-nu junction semiconductor devices
DE1614751A1 (de) * 1967-01-07 1970-12-03 Telefunken Patent Halbleiteranordnung
DE1789043A1 (de) * 1967-10-14 1972-01-05 Sgs Sa Mit Schutzringen versehene Planar-Halbleitervorrichtungen

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2644654A1 (de) * 1976-09-03 1978-03-09 Bbc Brown Boveri & Cie Halbleiterbauelement
US4150391A (en) * 1976-09-03 1979-04-17 Bbc Brown, Boveri & Company, Limited Gate-controlled reverse conducting thyristor
EP0851505A2 (fr) * 1996-12-31 1998-07-01 STMicroelectronics, Inc. Dispositif semi-conducteur comprenant une structure de terminaison à haute tension à région de façonnage de champ enterrée
EP0851505A3 (fr) * 1996-12-31 1998-07-15 STMicroelectronics, Inc. Dispositif semi-conducteur comprenant une structure de terminaison à haute tension à région de façonnage de champ enterrée
US6011298A (en) * 1996-12-31 2000-01-04 Stmicroelectronics, Inc. High voltage termination with buried field-shaping region
GB2373634B (en) * 2000-10-31 2004-12-08 Fuji Electric Co Ltd Semiconductor device
GB2403346A (en) * 2000-10-31 2004-12-29 Fuji Electric Co Ltd Semiconductor device
GB2403850A (en) * 2000-10-31 2005-01-12 Fuji Electric Co Ltd Semiconductor device
GB2403850B (en) * 2000-10-31 2005-05-11 Fuji Electric Co Ltd Semiconductor device
GB2403346B (en) * 2000-10-31 2005-05-11 Fuji Electric Co Ltd Semiconductor device
US6911692B2 (en) 2000-10-31 2005-06-28 Fuji Electric Device Technology Co., Ltd Semiconductor device
US6943410B2 (en) 2001-06-12 2005-09-13 Fuji Electric Holdings Co., Ltd. High power vertical semiconductor device
CN106505092A (zh) * 2016-08-18 2017-03-15 全球能源互联网研究院 一种垂直型半导体器件的双面终端结构
CN106505092B (zh) * 2016-08-18 2024-05-14 全球能源互联网研究院 一种垂直型半导体器件的双面终端结构

Also Published As

Publication number Publication date
DE2320579A1 (de) 1973-11-08
FR2181075B1 (fr) 1977-12-30
DE2320579B2 (de) 1976-10-28
IT1049525B (it) 1981-02-10
DE2320579C3 (de) 1983-11-10
FR2181075A1 (fr) 1973-11-30
JPS493580A (fr) 1974-01-12
NL7305642A (fr) 1973-10-23
JPS5320194B2 (fr) 1978-06-24
CA985794A (en) 1976-03-16

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Legal Events

Date Code Title Description
PS Patent sealed
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee