FR3127842B1 - Structure composite comprenant une couche utile en sic monocristallin sur un substrat support en sic poly-cristallin et procede de fabrication de ladite structure - Google Patents

Structure composite comprenant une couche utile en sic monocristallin sur un substrat support en sic poly-cristallin et procede de fabrication de ladite structure Download PDF

Info

Publication number
FR3127842B1
FR3127842B1 FR2110493A FR2110493A FR3127842B1 FR 3127842 B1 FR3127842 B1 FR 3127842B1 FR 2110493 A FR2110493 A FR 2110493A FR 2110493 A FR2110493 A FR 2110493A FR 3127842 B1 FR3127842 B1 FR 3127842B1
Authority
FR
France
Prior art keywords
support substrate
silicon carbide
useful layer
composite structure
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2110493A
Other languages
English (en)
French (fr)
Other versions
FR3127842A1 (fr
Inventor
Gweltaz Gaudin
Christophe Maleville
Sidoine Odoul
Radu Ionut
Hugo Biard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR2110493A priority Critical patent/FR3127842B1/fr
Application filed by Soitec SA filed Critical Soitec SA
Priority to PCT/FR2022/051765 priority patent/WO2023057699A1/fr
Priority to JP2024519070A priority patent/JP2024536118A/ja
Priority to CN202280067416.8A priority patent/CN118056263A/zh
Priority to EP22789271.8A priority patent/EP4413611A1/fr
Priority to TW111135615A priority patent/TW202320128A/zh
Priority to US18/694,369 priority patent/US20240395603A1/en
Priority to KR1020247014742A priority patent/KR102958187B1/ko
Publication of FR3127842A1 publication Critical patent/FR3127842A1/fr
Application granted granted Critical
Publication of FR3127842B1 publication Critical patent/FR3127842B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/40—Isolation regions comprising polycrystalline semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3451—Structure
    • H10P14/3452—Microstructure
    • H10P14/3454—Amorphous
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
    • H10P14/432—Chemical deposition, e.g. chemical vapour deposition [CVD] using selective deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/40—Chemomechanical polishing [CMP]
    • H10P52/402—Chemomechanical polishing [CMP] of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/041—Manufacture or treatment of isolation regions comprising polycrystalline semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)
  • Chemical & Material Sciences (AREA)
  • Recrystallisation Techniques (AREA)
  • Ceramic Products (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
FR2110493A 2021-10-05 2021-10-05 Structure composite comprenant une couche utile en sic monocristallin sur un substrat support en sic poly-cristallin et procede de fabrication de ladite structure Active FR3127842B1 (fr)

Priority Applications (8)

Application Number Priority Date Filing Date Title
FR2110493A FR3127842B1 (fr) 2021-10-05 2021-10-05 Structure composite comprenant une couche utile en sic monocristallin sur un substrat support en sic poly-cristallin et procede de fabrication de ladite structure
JP2024519070A JP2024536118A (ja) 2021-10-05 2022-09-20 多結晶ＳｉＣからなるキャリア基板上に単結晶ＳｉＣからなる機能層を備えている複合構造体及び前記構造体を製造するためのプロセス
CN202280067416.8A CN118056263A (zh) 2021-10-05 2022-09-20 在多晶SiC载体衬底上包括有用单晶SiC层的复合结构以及用于制造所述结构的方法
EP22789271.8A EP4413611A1 (fr) 2021-10-05 2022-09-20 Structure composite comprenant une couche utile en sic monocristallin sur un substrat support en sic poly-cristallin et procede de fabrication de ladite structure
PCT/FR2022/051765 WO2023057699A1 (fr) 2021-10-05 2022-09-20 Structure composite comprenant une couche utile en sic monocristallin sur un substrat support en sic poly-cristallin et procede de fabrication de ladite structure
TW111135615A TW202320128A (zh) 2021-10-05 2022-09-20 在多晶碳化矽製載體底材上包含單晶碳化矽製工作層之複合結構及其製作方法
US18/694,369 US20240395603A1 (en) 2021-10-05 2022-09-20 Composite structure comprising a useful monocrystalline sic layer on a polycrystalline sic carrier substrate and method for manufacturing said structure
KR1020247014742A KR102958187B1 (ko) 2021-10-05 2022-09-20 다결정 sic로 이루어진 캐리어 기판 상에 단결정 sic로 이루어진 작업층을 포함하는 복합 구조체 및 상기 구조체의 제조 방법

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2110493A FR3127842B1 (fr) 2021-10-05 2021-10-05 Structure composite comprenant une couche utile en sic monocristallin sur un substrat support en sic poly-cristallin et procede de fabrication de ladite structure
FR2110493 2021-10-05

Publications (2)

Publication Number Publication Date
FR3127842A1 FR3127842A1 (fr) 2023-04-07
FR3127842B1 true FR3127842B1 (fr) 2024-08-02

Family

ID=78649447

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2110493A Active FR3127842B1 (fr) 2021-10-05 2021-10-05 Structure composite comprenant une couche utile en sic monocristallin sur un substrat support en sic poly-cristallin et procede de fabrication de ladite structure

Country Status (7)

Country Link
US (1) US20240395603A1 (https=)
EP (1) EP4413611A1 (https=)
JP (1) JP2024536118A (https=)
CN (1) CN118056263A (https=)
FR (1) FR3127842B1 (https=)
TW (1) TW202320128A (https=)
WO (1) WO2023057699A1 (https=)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2798224B1 (fr) 1999-09-08 2003-08-29 Commissariat Energie Atomique Realisation d'un collage electriquement conducteur entre deux elements semi-conducteurs.
FR2810448B1 (fr) * 2000-06-16 2003-09-19 Soitec Silicon On Insulator Procede de fabrication de substrats et substrats obtenus par ce procede
JP6619874B2 (ja) 2016-04-05 2019-12-11 株式会社サイコックス 多結晶ＳｉＣ基板およびその製造方法

Also Published As

Publication number Publication date
TW202320128A (zh) 2023-05-16
US20240395603A1 (en) 2024-11-28
FR3127842A1 (fr) 2023-04-07
EP4413611A1 (fr) 2024-08-14
KR20240065325A (ko) 2024-05-14
CN118056263A (zh) 2024-05-17
JP2024536118A (ja) 2024-10-04
WO2023057699A1 (fr) 2023-04-13

Similar Documents

Publication Publication Date Title
EP2031654A3 (fr) Procédé de fabrication d'une structure pour épitaxie sans zone d'exclusion
FR3099637B1 (fr) procédé de fabrication d’unE structure composite comprenant une couche mince en Sic monocristallin sur un substrat support en sic polycristallin
FR3120737B1 (fr) Procede de fabrication d’une structure semi-conductrice a base de carbure de silicium et structure composite intermediaire
FR3120736B1 (fr) Procede de fabrication d’une structure semi-conductrice a base de carbure de silicium et structure composite intermediaire
EP4226416B1 (fr) Procédé de fabrication d'un substrat pour la croissance épitaxiale d'une couche d'un alliage iii-n à base de gallium
FR3108775B1 (fr) Procede de fabrication d’une structure composite comprenant une couche mince en sic monocristallin sur un substrat support en sic
FR3104318B1 (fr) Procédé de formation d'un support de manipulation à haute résistivité pour substrat composite
FR3086096B1 (fr) Procede de realisation d'un substrat avance pour une integration hybride
FR3127842B1 (fr) Structure composite comprenant une couche utile en sic monocristallin sur un substrat support en sic poly-cristallin et procede de fabrication de ladite structure
FR3127843B1 (fr) ProcÉdÉ de transfert d’une couche de SiC monocristallin sur un support en SiC polycristallin utilisant une couche intermÉdiaire de SiC polycristallin
FR3112891B1 (fr) Structure de plaquette de liaison et son procédé de fabrication
EP4226409A1 (fr) Procédé de fabrication d'un substrat pour la croissance épitaxiale d'une couche d'un alliage iii-n à base de gallium
FR3133853B1 (fr) Pièce en matériau CMC à barrière environnementale pré-fissurée pour l’accommodation thermomécanique
JP2022184075A (ja) モザイクダイヤモンドウェハと異種半導体との接合体及びその製造方法、並びに、異種半導体との接合体用モザイクダイヤモンドウェハ
FR3105876B1 (fr) Procédé de fabrication d’une structure composite comprenant une couche mince en SiC monocristallin sur un substrat support
FR3104322B1 (fr) Procédé de formation d'un substrat de manipulation pour une structure composite ciblant des applications rf
FR3114911B1 (fr) Procédé de fabrication d’un substrat pour la croissance épitaxiale d’une couche d’un alliage III-N à base de gallium
CN222684840U (zh) 基于碳化硅的电子器件
US20240332011A1 (en) Polycrystalline silicon carbide substrate and method of manufacturing the same
CN112201567A (zh) 用于氮化物材料外延的高导热衬底的制备方法
WO2025186046A1 (fr) Procédé de préparation d'un substrat support en matériau polycristallin et procédé de fabrication d'une structure composite incluant ledit substrat support
WO2025186045A1 (fr) Procédé de préparation d'un substrat support en matériau polycristallin et procédé de fabrication d'une structure composite incluant ledit substrat support
CN110277344A (zh) 一种外延片生长用承载盘
FR3127627A1 (fr) Procédé de fabrication d’une structure composite comprenant une couche mince en sic monocristallin sur un substrat support en sic polycristallin
JPWO2025191767A5 (https=)

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 2

PLSC Publication of the preliminary search report

Effective date: 20230407

PLFP Fee payment

Year of fee payment: 3

PLFP Fee payment

Year of fee payment: 4

PLFP Fee payment

Year of fee payment: 5