FR3093591B1 - Procédé de fabrication d’un élément capacitif haute tension, et circuit intégré correspondant - Google Patents

Procédé de fabrication d’un élément capacitif haute tension, et circuit intégré correspondant Download PDF

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Publication number
FR3093591B1
FR3093591B1 FR1902277A FR1902277A FR3093591B1 FR 3093591 B1 FR3093591 B1 FR 3093591B1 FR 1902277 A FR1902277 A FR 1902277A FR 1902277 A FR1902277 A FR 1902277A FR 3093591 B1 FR3093591 B1 FR 3093591B1
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FR
France
Prior art keywords
integrated circuit
capacitive element
manufacturing
high voltage
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1902277A
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English (en)
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FR3093591A1 (fr
Inventor
Abderrezak Marzaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1902277A priority Critical patent/FR3093591B1/fr
Priority to US16/802,871 priority patent/US11271075B2/en
Priority to CN202010146917.8A priority patent/CN111668222A/zh
Priority to CN202020258495.9U priority patent/CN211555888U/zh
Publication of FR3093591A1 publication Critical patent/FR3093591A1/fr
Application granted granted Critical
Publication of FR3093591B1 publication Critical patent/FR3093591B1/fr
Priority to US17/591,233 priority patent/US11640972B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
    • H01L28/87—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
    • H01L28/88—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by patterning layers, e.g. by etching conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode
    • H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Un circuit intégré comporte un substrat semiconducteur (SUB) ayant une face avant (FA), une région diélectrique (STI) s’étendant dans le substrat à partir de la face avant (FA). Au moins un élément capacitif (CHV) comporte, sur une surface de la région diélectrique (STI) au niveau de la face avant (FA), un empilement d’une première région conductrice (P0), d’une deuxième région conductrice (P1), et d’une troisième région conductrice (P2). La deuxième région conductrice (P1) est isolée électriquement de la première région conductrice (P0) par une première région diélectrique (DI1) et est isolée électriquement de la troisième région conductrice (P2) par une deuxième région diélectrique (DI2). Figure pour l’abrégé : Fig 9
FR1902277A 2019-03-06 2019-03-06 Procédé de fabrication d’un élément capacitif haute tension, et circuit intégré correspondant Active FR3093591B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1902277A FR3093591B1 (fr) 2019-03-06 2019-03-06 Procédé de fabrication d’un élément capacitif haute tension, et circuit intégré correspondant
US16/802,871 US11271075B2 (en) 2019-03-06 2020-02-27 Process for fabricating a high-voltage capacitive element, and corresponding integrated circuit
CN202010146917.8A CN111668222A (zh) 2019-03-06 2020-03-05 用于制造高电压电容性元件的工艺和对应的集成电路
CN202020258495.9U CN211555888U (zh) 2019-03-06 2020-03-05 集成电路
US17/591,233 US11640972B2 (en) 2019-03-06 2022-02-02 Process for fabricating a high-voltage capacitive element, and corresponding integrated circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1902277A FR3093591B1 (fr) 2019-03-06 2019-03-06 Procédé de fabrication d’un élément capacitif haute tension, et circuit intégré correspondant
FR1902277 2019-03-06

Publications (2)

Publication Number Publication Date
FR3093591A1 FR3093591A1 (fr) 2020-09-11
FR3093591B1 true FR3093591B1 (fr) 2021-04-02

Family

ID=68210855

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1902277A Active FR3093591B1 (fr) 2019-03-06 2019-03-06 Procédé de fabrication d’un élément capacitif haute tension, et circuit intégré correspondant

Country Status (3)

Country Link
US (2) US11271075B2 (fr)
CN (2) CN211555888U (fr)
FR (1) FR3093591B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11610999B2 (en) * 2020-06-10 2023-03-21 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Floating-gate devices in high voltage applications

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5057448A (en) * 1988-02-26 1991-10-15 Hitachi, Ltd. Method of making a semiconductor device having DRAM cells and floating gate memory cells
US5180680A (en) * 1991-05-17 1993-01-19 United Microelectronics Corporation Method of fabricating electrically erasable read only memory cell
US5196722A (en) * 1992-03-12 1993-03-23 International Business Machines Corporation Shadow ram cell having a shallow trench eeprom
US5550072A (en) * 1994-08-30 1996-08-27 National Semiconductor Corporation Method of fabrication of integrated circuit chip containing EEPROM and capacitor
US20030080366A1 (en) * 2001-10-29 2003-05-01 Matsushita Electric Industrial Co., Ltd. Non-volatile semiconductor memory device and manufacturing method thereof
KR100597093B1 (ko) * 2003-12-31 2006-07-04 동부일렉트로닉스 주식회사 캐패시터 제조방법
ATE512447T1 (de) * 2008-12-24 2011-06-15 St Microelectronics Rousset Vorrichtung zur überwachung der temperatur eines elementes
JP2010183022A (ja) * 2009-02-09 2010-08-19 Renesas Electronics Corp 半導体装置およびその製造方法
JP5613506B2 (ja) * 2009-10-28 2014-10-22 ルネサスエレクトロニクス株式会社 半導体装置
FR2978867B1 (fr) * 2011-08-01 2014-03-21 St Microelectronics Rousset Resistance ajustable
JP2013038186A (ja) * 2011-08-05 2013-02-21 Toshiba Corp 不揮発性半導体記憶装置の製造方法
US9691780B2 (en) * 2015-09-25 2017-06-27 Taiwan Semiconductor Manufacturing Co., Ltd. Interdigitated capacitor in split-gate flash technology
CN105914138A (zh) * 2016-06-24 2016-08-31 上海华虹宏力半导体制造有限公司 Pip电容的工艺方法
WO2019164588A2 (fr) * 2018-01-05 2019-08-29 University Of Maryland, College Park Dispositifs multicouche à semi-conducteurs et leurs procédés de formation

Also Published As

Publication number Publication date
US11640972B2 (en) 2023-05-02
US11271075B2 (en) 2022-03-08
CN211555888U (zh) 2020-09-22
CN111668222A (zh) 2020-09-15
FR3093591A1 (fr) 2020-09-11
US20200286986A1 (en) 2020-09-10
US20220157931A1 (en) 2022-05-19

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