FR3021457B1 - Composant, par exemple transistor nmos, a region active a contraintes en compression relachees, et condensateur de decouplage associe - Google Patents
Composant, par exemple transistor nmos, a region active a contraintes en compression relachees, et condensateur de decouplage associeInfo
- Publication number
- FR3021457B1 FR3021457B1 FR1454552A FR1454552A FR3021457B1 FR 3021457 B1 FR3021457 B1 FR 3021457B1 FR 1454552 A FR1454552 A FR 1454552A FR 1454552 A FR1454552 A FR 1454552A FR 3021457 B1 FR3021457 B1 FR 3021457B1
- Authority
- FR
- France
- Prior art keywords
- active region
- component
- nmos transistor
- compression stress
- decoupling capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000003990 capacitor Substances 0.000 title 1
- 230000006835 compression Effects 0.000 title 1
- 238000007906 compression Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 2
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66181—Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors with potential-jump barrier or surface barrier
- H01L29/94—Metal-insulator-semiconductors, e.g. MOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors with potential-jump barrier or surface barrier
- H01L29/94—Metal-insulator-semiconductors, e.g. MOS
- H01L29/945—Trench capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/42—Simultaneous manufacture of periphery and memory cells
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Circuit intégré comprenant un substrat (1) et au moins un composant (TR) disposé au moins partiellement au sein d'une région active (10) du substrat (1) limitée par une région isolante (2). Ce circuit comprend en outre une structure capacitive (STC) possédant une première électrode destinée à être reliée à un premier potentiel (GND), une deuxième électrode destinée à être reliée à un deuxième potentiel (Vdd), l'une des deux électrodes étant située au moins en partie dans la région isolante (2) ; la structure capacitive (STC) est ainsi configurée pour permettre également une réduction de contraintes en compression dans ladite région active.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1454552A FR3021457B1 (fr) | 2014-05-21 | 2014-05-21 | Composant, par exemple transistor nmos, a region active a contraintes en compression relachees, et condensateur de decouplage associe |
US14/715,814 US20150340426A1 (en) | 2014-05-21 | 2015-05-19 | Component, for example nmos transistor, with an active region under relaxed compressive stress, and associated decoupling capacitor |
CN201520328769.6U CN205069638U (zh) | 2014-05-21 | 2015-05-20 | 集成电路 |
CN201510261090.4A CN105097803A (zh) | 2014-05-21 | 2015-05-20 | 在弛豫压应力下有源区域的部件及相关联的去耦电容器 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1454552A FR3021457B1 (fr) | 2014-05-21 | 2014-05-21 | Composant, par exemple transistor nmos, a region active a contraintes en compression relachees, et condensateur de decouplage associe |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3021457A1 FR3021457A1 (fr) | 2015-11-27 |
FR3021457B1 true FR3021457B1 (fr) | 2017-10-13 |
Family
ID=51726608
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1454552A Expired - Fee Related FR3021457B1 (fr) | 2014-05-21 | 2014-05-21 | Composant, par exemple transistor nmos, a region active a contraintes en compression relachees, et condensateur de decouplage associe |
Country Status (3)
Country | Link |
---|---|
US (1) | US20150340426A1 (fr) |
CN (2) | CN205069638U (fr) |
FR (1) | FR3021457B1 (fr) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9786665B1 (en) * | 2016-08-16 | 2017-10-10 | Texas Instruments Incorporated | Dual deep trenches for high voltage isolation |
FR3057393A1 (fr) * | 2016-10-11 | 2018-04-13 | Stmicroelectronics (Rousset) Sas | Circuit integre avec condensateur de decouplage dans une structure de type triple caisson |
FR3070535A1 (fr) | 2017-08-28 | 2019-03-01 | Stmicroelectronics (Crolles 2) Sas | Circuit integre avec element capacitif a structure verticale, et son procede de fabrication |
FR3070534A1 (fr) | 2017-08-28 | 2019-03-01 | Stmicroelectronics (Rousset) Sas | Procede de fabrication d'elements capacitifs dans des tranchees |
WO2019132876A1 (fr) * | 2017-12-27 | 2019-07-04 | Intel Corporation | Condensateurs et résistances à base de finfet et appareils, systèmes et procédés associés |
FR3076660B1 (fr) | 2018-01-09 | 2020-02-07 | Stmicroelectronics (Rousset) Sas | Dispositif integre de cellule capacitive de remplissage et procede de fabrication correspondant |
US11621222B2 (en) | 2018-01-09 | 2023-04-04 | Stmicroelectronics (Rousset) Sas | Integrated filler capacitor cell device and corresponding manufacturing method |
FR3087027A1 (fr) | 2018-10-08 | 2020-04-10 | Stmicroelectronics (Rousset) Sas | Element capacitif de puce electronique |
US11004785B2 (en) | 2019-08-21 | 2021-05-11 | Stmicroelectronics (Rousset) Sas | Co-integrated vertically structured capacitive element and fabrication process |
US11417611B2 (en) * | 2020-02-25 | 2022-08-16 | Analog Devices International Unlimited Company | Devices and methods for reducing stress on circuit components |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4392210A (en) * | 1978-08-28 | 1983-07-05 | Mostek Corporation | One transistor-one capacitor memory cell |
JP3238066B2 (ja) * | 1996-03-11 | 2001-12-10 | 株式会社東芝 | 半導体記憶装置およびその製造方法 |
US5843820A (en) * | 1997-09-29 | 1998-12-01 | Vanguard International Semiconductor Corporation | Method of fabricating a new dynamic random access memory (DRAM) cell having a buried horizontal trench capacitor |
US6407898B1 (en) * | 2000-01-18 | 2002-06-18 | Taiwan Semiconductor Manufacturing Company Ltd. | Protection means for preventing power-on sequence induced latch-up |
US6492244B1 (en) * | 2001-11-21 | 2002-12-10 | International Business Machines Corporation | Method and semiconductor structure for implementing buried dual rail power distribution and integrated decoupling capacitance for silicon on insulator (SOI) devices |
US6949785B2 (en) * | 2004-01-14 | 2005-09-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Random access memory (RAM) capacitor in shallow trench isolation with improved electrical isolation to overlying gate electrodes |
US6936881B2 (en) * | 2003-07-25 | 2005-08-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Capacitor that includes high permittivity capacitor dielectric |
KR100597093B1 (ko) * | 2003-12-31 | 2006-07-04 | 동부일렉트로닉스 주식회사 | 캐패시터 제조방법 |
DE102005030585B4 (de) * | 2005-06-30 | 2011-07-28 | Globalfoundries Inc. | Halbleiterbauelement mit einem vertikalen Entkopplungskondensator und Verfahren zu seiner Herstellung |
JP4242880B2 (ja) * | 2006-05-17 | 2009-03-25 | 日本テキサス・インスツルメンツ株式会社 | 固体撮像装置及びその動作方法 |
TWI355069B (en) * | 2007-11-06 | 2011-12-21 | Nanya Technology Corp | Dram device |
US8188528B2 (en) * | 2009-05-07 | 2012-05-29 | International Buiness Machines Corporation | Structure and method to form EDRAM on SOI substrate |
US8159015B2 (en) * | 2010-01-13 | 2012-04-17 | International Business Machines Corporation | Method and structure for forming capacitors and memory devices on semiconductor-on-insulator (SOI) substrates |
US8896087B2 (en) * | 2010-06-02 | 2014-11-25 | Infineon Technologies Ag | Shallow trench isolation area having buried capacitor |
US8318576B2 (en) * | 2011-04-21 | 2012-11-27 | Freescale Semiconductor, Inc. | Decoupling capacitors recessed in shallow trench isolation |
US8896096B2 (en) * | 2012-07-19 | 2014-11-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Process-compatible decoupling capacitor and method for making the same |
US8963208B2 (en) * | 2012-11-15 | 2015-02-24 | GlobalFoundries, Inc. | Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof |
FR3007198B1 (fr) * | 2013-06-13 | 2015-06-19 | St Microelectronics Rousset | Composant, par exemple transistor nmos, a region active a contraintes en compression relachees, et procede de fabrication |
-
2014
- 2014-05-21 FR FR1454552A patent/FR3021457B1/fr not_active Expired - Fee Related
-
2015
- 2015-05-19 US US14/715,814 patent/US20150340426A1/en not_active Abandoned
- 2015-05-20 CN CN201520328769.6U patent/CN205069638U/zh active Active
- 2015-05-20 CN CN201510261090.4A patent/CN105097803A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
US20150340426A1 (en) | 2015-11-26 |
FR3021457A1 (fr) | 2015-11-27 |
CN205069638U (zh) | 2016-03-02 |
CN105097803A (zh) | 2015-11-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLFP | Fee payment |
Year of fee payment: 2 |
|
PLSC | Publication of the preliminary search report |
Effective date: 20151127 |
|
PLFP | Fee payment |
Year of fee payment: 3 |
|
PLFP | Fee payment |
Year of fee payment: 4 |
|
PLFP | Fee payment |
Year of fee payment: 5 |
|
ST | Notification of lapse |
Effective date: 20200108 |