FR2934924B1 - Procede de multi implantation dans un substrat. - Google Patents

Procede de multi implantation dans un substrat.

Info

Publication number
FR2934924B1
FR2934924B1 FR0855439A FR0855439A FR2934924B1 FR 2934924 B1 FR2934924 B1 FR 2934924B1 FR 0855439 A FR0855439 A FR 0855439A FR 0855439 A FR0855439 A FR 0855439A FR 2934924 B1 FR2934924 B1 FR 2934924B1
Authority
FR
France
Prior art keywords
implantation
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0855439A
Other languages
English (en)
Other versions
FR2934924A1 (fr
Inventor
Thomas Signamarcheix
Chrystel Deguet
Frederic Mazen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR0855439A priority Critical patent/FR2934924B1/fr
Application filed by Commissariat a lEnergie Atomique CEA, Soitec SA filed Critical Commissariat a lEnergie Atomique CEA
Priority to CN200980130382.7A priority patent/CN102113112B/zh
Priority to EP09804532A priority patent/EP2311083A1/fr
Priority to KR1020117004057A priority patent/KR101637419B1/ko
Priority to JP2011521501A priority patent/JP5722772B2/ja
Priority to PCT/EP2009/058557 priority patent/WO2010015470A1/fr
Priority to US13/056,220 priority patent/US8293620B2/en
Publication of FR2934924A1 publication Critical patent/FR2934924A1/fr
Application granted granted Critical
Publication of FR2934924B1 publication Critical patent/FR2934924B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Physical Vapour Deposition (AREA)
  • Element Separation (AREA)
FR0855439A 2008-08-06 2008-08-06 Procede de multi implantation dans un substrat. Expired - Fee Related FR2934924B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR0855439A FR2934924B1 (fr) 2008-08-06 2008-08-06 Procede de multi implantation dans un substrat.
EP09804532A EP2311083A1 (fr) 2008-08-06 2009-07-07 Procédé d exécution d'implantations multiples dans un substrat
KR1020117004057A KR101637419B1 (ko) 2008-08-06 2009-07-07 기판에 다수 개의 주입을 만드는 방법
JP2011521501A JP5722772B2 (ja) 2008-08-06 2009-07-07 基板内に多重注入部を形成する方法
CN200980130382.7A CN102113112B (zh) 2008-08-06 2009-07-07 在基板中进行多重注入的方法
PCT/EP2009/058557 WO2010015470A1 (fr) 2008-08-06 2009-07-07 Procédé d’exécution d'implantations multiples dans un substrat
US13/056,220 US8293620B2 (en) 2008-08-06 2009-07-07 Method of making multiple implantations in a substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0855439A FR2934924B1 (fr) 2008-08-06 2008-08-06 Procede de multi implantation dans un substrat.

Publications (2)

Publication Number Publication Date
FR2934924A1 FR2934924A1 (fr) 2010-02-12
FR2934924B1 true FR2934924B1 (fr) 2011-04-22

Family

ID=39845287

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0855439A Expired - Fee Related FR2934924B1 (fr) 2008-08-06 2008-08-06 Procede de multi implantation dans un substrat.

Country Status (7)

Country Link
US (1) US8293620B2 (fr)
EP (1) EP2311083A1 (fr)
JP (1) JP5722772B2 (fr)
KR (1) KR101637419B1 (fr)
CN (1) CN102113112B (fr)
FR (1) FR2934924B1 (fr)
WO (1) WO2010015470A1 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2773261B1 (fr) 1997-12-30 2000-01-28 Commissariat Energie Atomique Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions
FR2924273B1 (fr) 2007-11-28 2010-02-19 Commissariat Energie Atomique Procede de moderation de deformation
FR2947098A1 (fr) * 2009-06-18 2010-12-24 Commissariat Energie Atomique Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince
US8314018B2 (en) * 2009-10-15 2012-11-20 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US20110207306A1 (en) * 2010-02-22 2011-08-25 Sarko Cherekdjian Semiconductor structure made using improved ion implantation process
US20140106550A1 (en) * 2012-10-11 2014-04-17 International Business Machines Corporation Ion implantation tuning to achieve simultaneous multiple implant energies
FR3007892B1 (fr) 2013-06-27 2015-07-31 Commissariat Energie Atomique Procede de transfert d'une couche mince avec apport d'energie thermique a une zone fragilisee via une couche inductive
US10147584B2 (en) * 2017-03-20 2018-12-04 Varian Semiconductor Equipment Associates, Inc. Apparatus and techniques for decelerated ion beam with no energy contamination
US10510532B1 (en) * 2018-05-29 2019-12-17 Industry-University Cooperation Foundation Hanyang University Method for manufacturing gallium nitride substrate using the multi ion implantation
FR3108204B1 (fr) * 2020-03-10 2023-10-27 Commissariat Energie Atomique Procédé de suspension d’une couche mince sur une cavité avec effet raidisseur obtenu par pressurisation de la cavité par des espèces implantées

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11121310A (ja) * 1997-10-09 1999-04-30 Denso Corp 半導体基板の製造方法
FR2773261B1 (fr) 1997-12-30 2000-01-28 Commissariat Energie Atomique Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions
JP3127892B2 (ja) * 1998-06-30 2001-01-29 日新電機株式会社 水素負イオンビーム注入方法及び注入装置
JP2000277738A (ja) * 1999-03-19 2000-10-06 Fujitsu Ltd 薄膜トランジスタおよびその製造方法
US20020187619A1 (en) * 2001-05-04 2002-12-12 International Business Machines Corporation Gettering process for bonded SOI wafers
US6566158B2 (en) * 2001-08-17 2003-05-20 Rosemount Aerospace Inc. Method of preparing a semiconductor using ion implantation in a SiC layer
US6979630B2 (en) * 2002-08-08 2005-12-27 Isonics Corporation Method and apparatus for transferring a thin layer of semiconductor material
FR2855909B1 (fr) * 2003-06-06 2005-08-26 Soitec Silicon On Insulator Procede d'obtention concomitante d'au moins une paire de structures comprenant au moins une couche utile reportee sur un substrat
FR2855910B1 (fr) * 2003-06-06 2005-07-15 Commissariat Energie Atomique Procede d'obtention d'une couche tres mince par amincissement par auto-portage provoque
US7772087B2 (en) * 2003-12-19 2010-08-10 Commissariat A L'energie Atomique Method of catastrophic transfer of a thin film after co-implantation
JP4730581B2 (ja) * 2004-06-17 2011-07-20 信越半導体株式会社 貼り合わせウェーハの製造方法
EP1792339A1 (fr) * 2004-09-21 2007-06-06 S.O.I.Tec Silicon on Insulator Technologies Procede d'obtention d'une couche mince par mise en oeuvre d'une co-implantation suivie d'une implantation
FR2895563B1 (fr) * 2005-12-22 2008-04-04 Soitec Silicon On Insulator Procede de simplification d'une sequence de finition et structure obtenue par le procede

Also Published As

Publication number Publication date
US8293620B2 (en) 2012-10-23
KR20110052651A (ko) 2011-05-18
CN102113112B (zh) 2014-11-05
US20110129988A1 (en) 2011-06-02
CN102113112A (zh) 2011-06-29
JP5722772B2 (ja) 2015-05-27
WO2010015470A1 (fr) 2010-02-11
EP2311083A1 (fr) 2011-04-20
JP2011530183A (ja) 2011-12-15
KR101637419B1 (ko) 2016-07-07
FR2934924A1 (fr) 2010-02-12

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