FR2891944B1 - Circuit et procede d'attaque de ligne de mots d'un dispositif a memoire - Google Patents

Circuit et procede d'attaque de ligne de mots d'un dispositif a memoire

Info

Publication number
FR2891944B1
FR2891944B1 FR0605995A FR0605995A FR2891944B1 FR 2891944 B1 FR2891944 B1 FR 2891944B1 FR 0605995 A FR0605995 A FR 0605995A FR 0605995 A FR0605995 A FR 0605995A FR 2891944 B1 FR2891944 B1 FR 2891944B1
Authority
FR
France
Prior art keywords
attacking
circuit
memory device
word line
word
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0605995A
Other languages
English (en)
Other versions
FR2891944A1 (fr
Inventor
Jong Hoon Jung
Hyo Sang Lee
Hoon Jin Bang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of FR2891944A1 publication Critical patent/FR2891944A1/fr
Application granted granted Critical
Publication of FR2891944B1 publication Critical patent/FR2891944B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045—Read-write mode select circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
FR0605995A 2005-07-05 2006-07-03 Circuit et procede d'attaque de ligne de mots d'un dispositif a memoire Active FR2891944B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050060329A KR100586171B1 (ko) 2005-07-05 2005-07-05 시스템 온 칩에 임베드된 메모리의 워드라인 구동회로 및구동방법

Publications (2)

Publication Number Publication Date
FR2891944A1 FR2891944A1 (fr) 2007-04-13
FR2891944B1 true FR2891944B1 (fr) 2014-05-30

Family

ID=37182266

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0605995A Active FR2891944B1 (fr) 2005-07-05 2006-07-03 Circuit et procede d'attaque de ligne de mots d'un dispositif a memoire

Country Status (6)

Country Link
US (1) US7366038B2 (fr)
KR (1) KR100586171B1 (fr)
CN (1) CN100576354C (fr)
DE (1) DE102006032132B4 (fr)
FR (1) FR2891944B1 (fr)
TW (1) TWI426527B (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7586333B1 (en) * 2006-12-21 2009-09-08 Cypress Semiconductor Corporation High speed, low supply voltage tolerant bootstrapped word line driver with high voltage isolation
JP5846789B2 (ja) * 2010-07-29 2016-01-20 株式会社半導体エネルギー研究所 半導体装置
JP5249394B2 (ja) * 2011-09-28 2013-07-31 ウィンボンド エレクトロニクス コーポレーション 半導体記憶装置
US8976600B2 (en) * 2013-03-11 2015-03-10 Macronix International Co., Ltd. Word line driver circuit for selecting and deselecting word lines
CN106297868B (zh) * 2015-05-12 2018-11-06 晶豪科技股份有限公司 驱动子字线的半导体存储器元件
US11188456B2 (en) * 2017-03-21 2021-11-30 Western Digital Technologies Inc. Storage system and method for predictive block allocation for efficient garbage collection
US11269764B2 (en) 2017-03-21 2022-03-08 Western Digital Technologies, Inc. Storage system and method for adaptive scheduling of background operations
US10635335B2 (en) 2017-03-21 2020-04-28 Western Digital Technologies, Inc. Storage system and method for efficient pipeline gap utilization for background operations

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960011206B1 (ko) * 1993-11-09 1996-08-21 삼성전자 주식회사 반도체메모리장치의 워드라인구동회로
US6278316B1 (en) 1998-07-30 2001-08-21 Kabushiki Kaisha Toshiba Pump circuit with reset circuitry
TW460876B (en) * 1998-09-30 2001-10-21 Samsung Electronics Co Ltd An integrated circuit memory device with hierarchical word line structure
JP3857461B2 (ja) 1999-03-18 2006-12-13 株式会社東芝 半導体装置
KR100338772B1 (ko) * 2000-03-10 2002-05-31 윤종용 바이어스 라인이 분리된 비휘발성 메모리 장치의 워드라인 드라이버 및 워드 라인 드라이빙 방법
KR100381962B1 (ko) * 2000-08-07 2003-05-01 삼성전자주식회사 비휘발성 메모리 장치의 로우 디코더
KR100378188B1 (ko) * 2000-12-06 2003-03-29 삼성전자주식회사 멀티 로우 어드레스 디스터브 테스트시 모든 워드라인들에동일한 스트레스를 인가하는 워드라인 드라이버 및 그구동방법
JP3702851B2 (ja) 2002-01-24 2005-10-05 セイコーエプソン株式会社 不揮発性半導体装置の昇圧回路
US6859397B2 (en) * 2003-03-05 2005-02-22 Sandisk Corporation Source side self boosting technique for non-volatile memory
JP4962828B2 (ja) * 2004-08-25 2012-06-27 マイクロン テクノロジー， インク． ワード線ドライバ回路およびこれを利用する方法

Also Published As

Publication number Publication date
FR2891944A1 (fr) 2007-04-13
US7366038B2 (en) 2008-04-29
DE102006032132A1 (de) 2007-02-22
CN100576354C (zh) 2009-12-30
US20070008805A1 (en) 2007-01-11
KR100586171B1 (ko) 2006-06-07
TWI426527B (zh) 2014-02-11
CN1892913A (zh) 2007-01-10
TW200703364A (en) 2007-01-16
DE102006032132B4 (de) 2010-04-15

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