FR2709015A1 - Dispositif de mémoire à semi-conducteurs comportant une structure de commande de lignes entrée/sortie à grande vitesse. - Google Patents

Dispositif de mémoire à semi-conducteurs comportant une structure de commande de lignes entrée/sortie à grande vitesse.

Info

Publication number
FR2709015A1
FR2709015A1 FR9410002A FR9410002A FR2709015A1 FR 2709015 A1 FR2709015 A1 FR 2709015A1 FR 9410002 A FR9410002 A FR 9410002A FR 9410002 A FR9410002 A FR 9410002A FR 2709015 A1 FR2709015 A1 FR 2709015A1
Authority
FR
France
Prior art keywords
output line
group
memory device
semiconductor memory
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR9410002A
Other languages
English (en)
Other versions
FR2709015B1 (fr
Inventor
Lee Si-Ycol
Jang Hyun-Soon
Kim Myung-Ho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of FR2709015A1 publication Critical patent/FR2709015A1/fr
Application granted granted Critical
Publication of FR2709015B1 publication Critical patent/FR2709015B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out

Landscapes

  • Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)

Abstract

a) Dispositif de mémoire à semi-conducteurs comportant une structure de commande de lignes entrée/sortie à grande vitesse, b) dispositif caractérisé par: - un premier groupe d'un certain nombre de ces paires de lignes entrée/sortie commandées par l'excitation de l'un quelconque des signaux de sélection à l'intérieur du premier groupe; - un second groupe d'un certain nombre de ces paires de lignes entrée/sortie commandées par l'excitation de l'un quelconque des signaux de sélection à l'intérieur du second groupe; et - les paires de lignes entrée/sortie à l'intérieur du second groupe étant préchargées et égalisées lorsque les paires de lignes entrée/sortie à l'intérieur du premier groupe sont commandées.
FR9410002A 1993-08-14 1994-08-12 Dispositif de mémoire à semi-conducteurs comportant une structure de commande de lignes entrée/sortie à grande vitesse. Expired - Fee Related FR2709015B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930015744A KR960006271B1 (ko) 1993-08-14 1993-08-14 고속동작을 위한 입출력라인구동방식을 가지는 반도체메모리장치

Publications (2)

Publication Number Publication Date
FR2709015A1 true FR2709015A1 (fr) 1995-02-17
FR2709015B1 FR2709015B1 (fr) 1996-01-12

Family

ID=19361251

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9410002A Expired - Fee Related FR2709015B1 (fr) 1993-08-14 1994-08-12 Dispositif de mémoire à semi-conducteurs comportant une structure de commande de lignes entrée/sortie à grande vitesse.

Country Status (6)

Country Link
US (1) US5485426A (fr)
JP (1) JPH0765579A (fr)
KR (1) KR960006271B1 (fr)
DE (1) DE4428647B4 (fr)
FR (1) FR2709015B1 (fr)
GB (1) GB2280975B (fr)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960003526B1 (ko) 1992-10-02 1996-03-14 삼성전자주식회사 반도체 메모리장치
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US6279116B1 (en) 1992-10-02 2001-08-21 Samsung Electronics Co., Ltd. Synchronous dynamic random access memory devices that utilize clock masking signals to control internal clock signal generation
KR0141665B1 (ko) * 1994-03-31 1998-07-15 김광호 비디오램 및 시리얼데이타 출력방법
JP3604753B2 (ja) * 1995-01-10 2004-12-22 株式会社ルネサステクノロジ 半導体記憶装置
USRE36532E (en) * 1995-03-02 2000-01-25 Samsung Electronics Co., Ltd. Synchronous semiconductor memory device having an auto-precharge function
US5598374A (en) * 1995-07-14 1997-01-28 Cirrus Logic, Inc. Pipeland address memories, and systems and methods using the same
JPH09198861A (ja) * 1996-01-16 1997-07-31 Mitsubishi Electric Corp 同期型半導体記憶装置
JP3569417B2 (ja) * 1996-07-19 2004-09-22 株式会社ルネサステクノロジ 半導体メモリ
KR100224667B1 (ko) * 1996-12-10 1999-10-15 윤종용 계층적 입출력라인 구조를 갖는 반도체 메모리장치 및 이의 배치방법
KR100252053B1 (ko) 1997-12-04 2000-05-01 윤종용 칼럼 방향의 데이터 입출력선을 가지는 반도체메모리장치와불량셀 구제회로 및 방법
KR100284744B1 (ko) * 1999-01-20 2001-03-15 윤종용 고속 어드레스 디코더를 구비하는 반도체 메모리장치 및 이의 어드레스 디코딩 방법
JP3569727B2 (ja) * 1999-03-31 2004-09-29 エルピーダメモリ株式会社 半導体記憶装置
US6141275A (en) * 1999-04-06 2000-10-31 Genesis Semiconductor Method of and apparatus for precharging and equalizing local input/output signal lines within a memory circuit
KR20010004539A (ko) * 1999-06-29 2001-01-15 김영환 반도체 메모리 소자
JP3898988B2 (ja) * 2001-07-30 2007-03-28 株式会社リコー 情報処理装置、ジョブ制御方法、プログラム、及び記憶媒体
DE102004029846B4 (de) * 2003-06-17 2009-12-17 Samsung Electronics Co., Ltd., Suwon Integrierte Speicherschaltung
KR100634165B1 (ko) * 2003-06-17 2006-10-16 삼성전자주식회사 칩 면적의 증가없이 입출력 라인들의 수를 증가시킬 수있는 반도체 메모리 장치
CN113470711B (zh) * 2020-03-30 2023-06-16 长鑫存储技术有限公司 存储块以及存储器
CN111816227A (zh) * 2020-06-15 2020-10-23 上海华虹宏力半导体制造有限公司 半导体存储器件

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6352397A (ja) * 1986-08-20 1988-03-05 Toshiba Corp 半導体記憶装置
EP0260578A2 (fr) * 1986-09-16 1988-03-23 International Business Machines Corporation Dispositif de mémoire avec deux paires de lignes d'entrée et de sortie multiplexées
US4758995A (en) * 1985-01-23 1988-07-19 Hitachi, Ltd. Semiconductor memory
EP0317963A2 (fr) * 1987-11-25 1989-05-31 Kabushiki Kaisha Toshiba Dispositif de mémoire à semi-conducteur avec des cellules DRAM
EP0409449A2 (fr) * 1989-07-17 1991-01-23 Advanced Micro Devices, Inc. Système de lecture entrelacée pour des mémoires de types fifo et en mode rafale

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01158694A (ja) * 1987-12-15 1989-06-21 Mitsubishi Electric Corp 半導体ダイナミックｒａｍ
KR920009059B1 (ko) * 1989-12-29 1992-10-13 삼성전자 주식회사 반도체 메모리 장치의 병렬 테스트 방법
JP2592986B2 (ja) * 1990-09-29 1997-03-19 株式会社東芝 半導体記憶装置
KR940001644B1 (ko) * 1991-05-24 1994-02-28 삼성전자 주식회사 메모리 장치의 입출력 라인 프리차아지 방법
JPH0636560A (ja) * 1992-07-21 1994-02-10 Mitsubishi Electric Corp 半導体記憶装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4758995A (en) * 1985-01-23 1988-07-19 Hitachi, Ltd. Semiconductor memory
JPS6352397A (ja) * 1986-08-20 1988-03-05 Toshiba Corp 半導体記憶装置
EP0260578A2 (fr) * 1986-09-16 1988-03-23 International Business Machines Corporation Dispositif de mémoire avec deux paires de lignes d'entrée et de sortie multiplexées
EP0317963A2 (fr) * 1987-11-25 1989-05-31 Kabushiki Kaisha Toshiba Dispositif de mémoire à semi-conducteur avec des cellules DRAM
EP0409449A2 (fr) * 1989-07-17 1991-01-23 Advanced Micro Devices, Inc. Système de lecture entrelacée pour des mémoires de types fifo et en mode rafale

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 12, no. 271 (P - 736) 28 July 1988 (1988-07-28) *

Also Published As

Publication number Publication date
US5485426A (en) 1996-01-16
GB2280975A (en) 1995-02-15
DE4428647B4 (de) 2005-06-30
DE4428647A1 (de) 1995-02-16
GB9416277D0 (en) 1994-10-05
GB2280975B (en) 1997-11-26
JPH0765579A (ja) 1995-03-10
FR2709015B1 (fr) 1996-01-12
KR960006271B1 (ko) 1996-05-13
KR950006852A (ko) 1995-03-21

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Effective date: 20130430