FR2664096B1 - Procede de metallisation pour dispositif a semi-conducteur utilisant du nitrure de titane amorphe. - Google Patents
Procede de metallisation pour dispositif a semi-conducteur utilisant du nitrure de titane amorphe.Info
- Publication number
- FR2664096B1 FR2664096B1 FR909013545A FR9013545A FR2664096B1 FR 2664096 B1 FR2664096 B1 FR 2664096B1 FR 909013545 A FR909013545 A FR 909013545A FR 9013545 A FR9013545 A FR 9013545A FR 2664096 B1 FR2664096 B1 FR 2664096B1
- Authority
- FR
- France
- Prior art keywords
- semiconductor device
- titanium nitride
- metallization process
- amorphous titanium
- amorphous
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 title 1
- 238000001465 metallisation Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Physical Vapour Deposition (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900009784A KR930002672B1 (ko) | 1990-06-29 | 1990-06-29 | 비정질 질화티타늄막을 이용한 금속배선 형성방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2664096A1 FR2664096A1 (fr) | 1992-01-03 |
FR2664096B1 true FR2664096B1 (fr) | 1993-04-30 |
Family
ID=19300658
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR909013545A Expired - Fee Related FR2664096B1 (fr) | 1990-06-29 | 1990-10-31 | Procede de metallisation pour dispositif a semi-conducteur utilisant du nitrure de titane amorphe. |
Country Status (6)
Country | Link |
---|---|
JP (1) | JP2772726B2 (fr) |
KR (1) | KR930002672B1 (fr) |
DE (1) | DE4031677A1 (fr) |
FR (1) | FR2664096B1 (fr) |
GB (1) | GB2245762B (fr) |
IT (1) | IT1243053B (fr) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6770924B1 (en) * | 1994-05-13 | 2004-08-03 | Micron Technology, Inc. | Amorphous TiN films for an integrated capacitor dielectric/bottom plate using high dielectric constant materials |
KR100494320B1 (ko) * | 1997-12-30 | 2005-08-31 | 주식회사 하이닉스반도체 | 반도체소자의확산방지막형성방법 |
KR100401498B1 (ko) * | 2001-01-11 | 2003-10-17 | 주식회사 하이닉스반도체 | 반도체장치의 배리어층 형성방법 |
DE10146359B4 (de) * | 2001-09-20 | 2006-12-28 | Advanced Micro Devices, Inc., Sunnyvale | Eine Metallisierungsprozesssequenz |
US20090130331A1 (en) * | 2005-08-16 | 2009-05-21 | Hitachi Kokusai Electric Inc. | Method of Forming Thin Film and Method of Manufacturing Semiconductor Device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63213959A (ja) * | 1987-03-03 | 1988-09-06 | Toshiba Corp | 半導体装置の製造方法 |
JPH01165055A (ja) * | 1987-09-30 | 1989-06-29 | Sharp Corp | 光磁気記録媒体 |
JPH01220824A (ja) * | 1988-02-29 | 1989-09-04 | Toshiba Corp | 半導体装置の製造方法 |
US4990997A (en) * | 1988-04-20 | 1991-02-05 | Fujitsu Limited | Crystal grain diffusion barrier structure for a semiconductor device |
JP2751223B2 (ja) * | 1988-07-14 | 1998-05-18 | セイコーエプソン株式会社 | 半導体装置およびその製造方法 |
JPH0666287B2 (ja) * | 1988-07-25 | 1994-08-24 | 富士通株式会社 | 半導体装置の製造方法 |
-
1990
- 1990-06-29 KR KR1019900009784A patent/KR930002672B1/ko not_active IP Right Cessation
- 1990-09-28 IT IT02159490A patent/IT1243053B/it active IP Right Grant
- 1990-10-01 GB GB9021287A patent/GB2245762B/en not_active Expired - Lifetime
- 1990-10-04 DE DE4031677A patent/DE4031677A1/de active Granted
- 1990-10-31 FR FR909013545A patent/FR2664096B1/fr not_active Expired - Fee Related
-
1991
- 1991-06-19 JP JP3173309A patent/JP2772726B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE4031677C2 (fr) | 1993-07-22 |
GB2245762B (en) | 1995-02-08 |
IT9021594A1 (it) | 1992-03-28 |
GB9021287D0 (en) | 1990-11-14 |
FR2664096A1 (fr) | 1992-01-03 |
IT1243053B (it) | 1994-05-23 |
GB2245762A (en) | 1992-01-08 |
DE4031677A1 (de) | 1992-01-09 |
KR930002672B1 (ko) | 1993-04-07 |
JP2772726B2 (ja) | 1998-07-09 |
IT9021594A0 (it) | 1990-09-28 |
KR920001658A (ko) | 1992-01-30 |
JPH05109656A (ja) | 1993-04-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20100630 |