FR2636170A1 - Circuit integre hybride dans lequel une plaque de cuivre est formee directement sur le substrat de ceramique, et son procede de fabrication - Google Patents

Circuit integre hybride dans lequel une plaque de cuivre est formee directement sur le substrat de ceramique, et son procede de fabrication Download PDF

Info

Publication number
FR2636170A1
FR2636170A1 FR8911726A FR8911726A FR2636170A1 FR 2636170 A1 FR2636170 A1 FR 2636170A1 FR 8911726 A FR8911726 A FR 8911726A FR 8911726 A FR8911726 A FR 8911726A FR 2636170 A1 FR2636170 A1 FR 2636170A1
Authority
FR
France
Prior art keywords
ceramic substrate
copper plate
thickness
insulating layer
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8911726A
Other languages
English (en)
French (fr)
Other versions
FR2636170B1 (enExample
Inventor
Norio Kasai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Lighting and Technology Corp
Original Assignee
Toshiba Lighting and Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Lighting and Technology Corp filed Critical Toshiba Lighting and Technology Corp
Publication of FR2636170A1 publication Critical patent/FR2636170A1/fr
Application granted granted Critical
Publication of FR2636170B1 publication Critical patent/FR2636170B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/098—Applying pastes or inks, e.g. screen printing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/047—Attaching leadframes to insulating supports, e.g. for tape automated bonding [TAB]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
FR8911726A 1988-09-07 1989-09-07 Circuit integre hybride dans lequel une plaque de cuivre est formee directement sur le substrat de ceramique, et son procede de fabrication Granted FR2636170A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63222413A JPH0272695A (ja) 1988-09-07 1988-09-07 混成集積回路

Publications (2)

Publication Number Publication Date
FR2636170A1 true FR2636170A1 (fr) 1990-03-09
FR2636170B1 FR2636170B1 (enExample) 1995-03-17

Family

ID=16781995

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8911726A Granted FR2636170A1 (fr) 1988-09-07 1989-09-07 Circuit integre hybride dans lequel une plaque de cuivre est formee directement sur le substrat de ceramique, et son procede de fabrication

Country Status (4)

Country Link
US (1) US5036167A (enExample)
JP (1) JPH0272695A (enExample)
DE (1) DE3929789C2 (enExample)
FR (1) FR2636170A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991016805A1 (fr) * 1990-04-16 1991-10-31 Denki Kagaku Kogyo Kabushiki Kaisha Carte a circuits en ceramique
JPH04221888A (ja) * 1990-12-21 1992-08-12 Matsushita Electric Ind Co Ltd セラミック配線基板とその製造方法
US5210941A (en) * 1991-07-19 1993-05-18 Poly Circuits, Inc. Method for making circuit board having a metal support
JPH05166969A (ja) * 1991-10-14 1993-07-02 Fuji Electric Co Ltd 半導体装置
US5242535A (en) * 1992-09-29 1993-09-07 The Boc Group, Inc. Method of forming a copper circuit pattern
US6441313B1 (en) * 1999-11-23 2002-08-27 Sun Microsystems, Inc. Printed circuit board employing lossy power distribution network to reduce power plane resonances
EP1187521A1 (de) * 2000-09-09 2002-03-13 AB Mikroelektronik Gesellschaft m.b.H. Verfahren zur Herstellung einer Trägerplatte für elektronische Bauteile
JP2003111486A (ja) * 2001-09-26 2003-04-11 Kusatsu Electric Co Ltd 定点停止機能付き電動機
DE10227658B4 (de) * 2002-06-20 2012-03-08 Curamik Electronics Gmbh Metall-Keramik-Substrat für elektrische Schaltkreise -oder Module, Verfahren zum Herstellen eines solchen Substrates sowie Modul mit einem solchen Substrat
DE102009047592B4 (de) * 2009-12-07 2019-06-19 Robert Bosch Gmbh Verfahren zur Herstellung eines Siliziumzwischenträgers
CN110226363B (zh) * 2017-03-30 2022-08-02 株式会社东芝 陶瓷铜电路基板及使用了其的半导体装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5482700A (en) * 1977-12-15 1979-07-02 Nec Corp Paste compound for insulator forming
EP0074605A2 (en) * 1981-09-11 1983-03-23 Kabushiki Kaisha Toshiba Method for manufacturing multilayer circuit substrate
US4725333A (en) * 1985-12-20 1988-02-16 Olin Corporation Metal-glass laminate and process for producing same

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3549784A (en) * 1968-02-01 1970-12-22 American Lava Corp Ceramic-metallic composite substrate
US3787219A (en) * 1972-09-22 1974-01-22 Du Pont CaTiO{11 -CRYSTALLIZABLE GLASS DIELECTRIC COMPOSITIONS
US4129243A (en) * 1975-07-30 1978-12-12 General Electric Company Double side cooled, pressure mounted semiconductor package and process for the manufacture thereof
FR2556503B1 (fr) * 1983-12-08 1986-12-12 Eurofarad Substrat d'interconnexion en alumine pour composant electronique
US4563383A (en) * 1984-03-30 1986-01-07 General Electric Company Direct bond copper ceramic substrate for electronic applications
JPS61229389A (ja) * 1985-04-03 1986-10-13 イビデン株式会社 セラミツク配線板およびその製造方法
JPS61236192A (ja) * 1985-04-12 1986-10-21 株式会社日立製作所 セラミツク基板の電極形成方法
DE3621667A1 (de) * 1985-06-29 1987-01-08 Toshiba Kawasaki Kk Mit einer mehrzahl von dickfilmen beschichtetes substrat, verfahren zu seiner herstellung und dieses enthaltende vorrichtung
US4687540A (en) * 1985-12-20 1987-08-18 Olin Corporation Method of manufacturing glass capacitors and resulting product
US4753694A (en) * 1986-05-02 1988-06-28 International Business Machines Corporation Process for forming multilayered ceramic substrate having solid metal conductors

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5482700A (en) * 1977-12-15 1979-07-02 Nec Corp Paste compound for insulator forming
EP0074605A2 (en) * 1981-09-11 1983-03-23 Kabushiki Kaisha Toshiba Method for manufacturing multilayer circuit substrate
US4725333A (en) * 1985-12-20 1988-02-16 Olin Corporation Metal-glass laminate and process for producing same

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ELECTRONIC COMPONENTS CONFERENCE, Washington, DC, 20-22 mai 1985, pages 484-491, IEEE, New York, US; T. MATSUZAKI et al.: "High-density multilayer wiring substrate using copper thick film and thin film" *
PATENT ABSTRACTS OF JAPAN, vol. 3, no. 106 (E-135), 7 septembre 1979; & JP-A-54 82 700 (NEC CORP.) 02-07-1979 *

Also Published As

Publication number Publication date
DE3929789A1 (de) 1990-03-29
DE3929789C2 (de) 1993-12-02
JPH0272695A (ja) 1990-03-12
FR2636170B1 (enExample) 1995-03-17
US5036167A (en) 1991-07-30

Similar Documents

Publication Publication Date Title
US5056702A (en) Method of manufacturing a semiconductor device
US5427823A (en) Laser densification of glass ceramic coatings on carbon-carbon composite materials
US4800137A (en) Composite layer aluminum nitride base sintered body
CA2154833A1 (en) Metallized ceramic substrate having smooth plating layer and method for producing the same
KR19990028330A (ko) 코팅 방법, 세라믹 금속 구조물의 제조 방법, 결합 방법 및 이로부터 형성된 구조물
EP0310043A3 (en) Oxidation resistant, high temperature thermal cycling resistant coating on silicon-based substrates and process for the production thereof
US5787578A (en) Method of selectively depositing a metallic layer on a ceramic substrate
JP2006062930A (ja) セラミックと金属との接合体及びその製造方法
WO2003037823A1 (fr) Procede de metallisation et/ou de brasage par un alliage de silicium de pieces en ceramique oxyde non mouillable par ledit alliage
US4645117A (en) Bonding metal to ceramic
US5405676A (en) Film forming process
FR2508493A1 (fr) Procede pour appliquer un revetement de barriere thermique en matiere ceramique tolerant aux contraintes sur un substrat metallique
US5036167A (en) Board for hybrid integrated circuit
FR2588858A1 (fr) Procede pour realiser, sur une ceramique contenant al2o3, des couches metalliques fermement adherentes, se pretant a la brasure, et susceptibles d'etre structurees
US5221639A (en) Method of fabricating resistive conductive patterns on aluminum nitride substrates
KR100365980B1 (ko) 납땜용 구조체 및 메탈라이즈 구조체
US5423475A (en) Diamond coatings for aluminum alloys
FR2525391A1 (fr) Substrat pour circuit electronique fonctionnant dans la gamme des hyperfrequences, et procede de metallisation de ce substrat
JPH09315876A (ja) 金属−セラミックス複合基板及びその製造法
CN222071931U (zh) 一种导热三明治金刚石热沉金锡薄膜结构
US12545011B2 (en) Methods of preparing metal sheets for a DCB / DAB substrate bonding process
JPH03137069A (ja) 高熱伝導性絶縁基板及びその製造方法
FR2689315A1 (fr) Procédé de fabrication d'un substrat pour l'électronique de puissance et substrat obtenu par ce procédé.
JP3874842B2 (ja) 薄膜複合材料およびその製造方法
JP3505212B2 (ja) 接合体および接合体の製造方法

Legal Events

Date Code Title Description
ST Notification of lapse