FR2581808B1 - Dispositif integre de protection dynamique, notamment pour des circuits integres a etages d'entree mos - Google Patents
Dispositif integre de protection dynamique, notamment pour des circuits integres a etages d'entree mosInfo
- Publication number
- FR2581808B1 FR2581808B1 FR868606709A FR8606709A FR2581808B1 FR 2581808 B1 FR2581808 B1 FR 2581808B1 FR 868606709 A FR868606709 A FR 868606709A FR 8606709 A FR8606709 A FR 8606709A FR 2581808 B1 FR2581808 B1 FR 2581808B1
- Authority
- FR
- France
- Prior art keywords
- integrated
- protection device
- input stages
- dynamic protection
- mos input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8520670A IT1214606B (it) | 1985-05-13 | 1985-05-13 | Dispositivo integrato di protezione dinamica, in particolare per circuiti integrati con ingresso in tecnologia mos. |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2581808A1 FR2581808A1 (fr) | 1986-11-14 |
FR2581808B1 true FR2581808B1 (fr) | 1990-10-26 |
Family
ID=11170318
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR868606709A Expired - Lifetime FR2581808B1 (fr) | 1985-05-13 | 1986-05-09 | Dispositif integre de protection dynamique, notamment pour des circuits integres a etages d'entree mos |
Country Status (6)
Country | Link |
---|---|
US (1) | US4698720A (fr) |
JP (1) | JPH0746726B2 (fr) |
DE (1) | DE3615690C2 (fr) |
FR (1) | FR2581808B1 (fr) |
GB (1) | GB2175163B (fr) |
IT (1) | IT1214606B (fr) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0724310B2 (ja) * | 1987-01-23 | 1995-03-15 | 松下電子工業株式会社 | 半導体装置 |
US4750078A (en) * | 1987-06-15 | 1988-06-07 | Motorola, Inc. | Semiconductor protection circuit having both positive and negative high voltage protection |
JPH0748652B2 (ja) * | 1987-07-23 | 1995-05-24 | 三菱電機株式会社 | 半導体回路装置の入力保護装置 |
US4835416A (en) * | 1987-08-31 | 1989-05-30 | National Semiconductor Corporation | VDD load dump protection circuit |
US4829350A (en) * | 1988-05-05 | 1989-05-09 | National Semiconductor Corporation | Electrostatic discharge integrated circuit protection |
DE4004526C1 (fr) * | 1990-02-14 | 1991-09-05 | Texas Instruments Deutschland Gmbh, 8050 Freising, De | |
EP0740344B1 (fr) * | 1995-04-24 | 2002-07-24 | Conexant Systems, Inc. | Procédé et appareil pour le couplage de bus on-chip Vdd multiples, indépendants à un verrouillage ESD |
US5745323A (en) * | 1995-06-30 | 1998-04-28 | Analog Devices, Inc. | Electrostatic discharge protection circuit for protecting CMOS transistors on integrated circuit processes |
US5751525A (en) * | 1996-01-05 | 1998-05-12 | Analog Devices, Inc. | EOS/ESD Protection circuit for an integrated circuit with operating/test voltages exceeding power supply rail voltages |
US5917689A (en) * | 1996-09-12 | 1999-06-29 | Analog Devices, Inc. | General purpose EOS/ESD protection circuit for bipolar-CMOS and CMOS integrated circuits |
US5838146A (en) * | 1996-11-12 | 1998-11-17 | Analog Devices, Inc. | Method and apparatus for providing ESD/EOS protection for IC power supply pins |
JP4917460B2 (ja) * | 2007-03-19 | 2012-04-18 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7862656B2 (en) * | 2007-07-03 | 2011-01-04 | Siemens Medical Solutions Usa, Inc. | Apparatus and method for growing a crystal and heating an annular channel circumscribing the crystal |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3636385A (en) * | 1970-02-13 | 1972-01-18 | Ncr Co | Protection circuit |
DE2539890B2 (de) * | 1975-09-08 | 1978-06-01 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Schaltungsanordnung zum Schutz von Eingängen integrierter MOS-Schaltkreise |
JPS6048106B2 (ja) * | 1979-12-24 | 1985-10-25 | 富士通株式会社 | 半導体集積回路 |
JPS57109375A (en) * | 1980-12-26 | 1982-07-07 | Fujitsu Ltd | Mis type transistor protection circuit |
US4400625A (en) * | 1981-11-30 | 1983-08-23 | Reliance Electric Company | Standby A-C power system with transfer compensation circuitry |
US4492876A (en) * | 1983-07-18 | 1985-01-08 | At&T Bell Laboratories | Power supply switching arrangement |
-
1985
- 1985-05-13 IT IT8520670A patent/IT1214606B/it active
-
1986
- 1986-05-08 GB GB8611213A patent/GB2175163B/en not_active Expired
- 1986-05-09 FR FR868606709A patent/FR2581808B1/fr not_active Expired - Lifetime
- 1986-05-09 DE DE3615690A patent/DE3615690C2/de not_active Expired - Fee Related
- 1986-05-12 JP JP61109351A patent/JPH0746726B2/ja not_active Expired - Lifetime
- 1986-05-12 US US06/862,321 patent/US4698720A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US4698720A (en) | 1987-10-06 |
DE3615690A1 (de) | 1986-11-13 |
JPH0746726B2 (ja) | 1995-05-17 |
IT8520670A0 (it) | 1985-05-13 |
FR2581808A1 (fr) | 1986-11-14 |
GB2175163A (en) | 1986-11-19 |
DE3615690C2 (de) | 1996-09-12 |
IT1214606B (it) | 1990-01-18 |
GB8611213D0 (en) | 1986-06-18 |
GB2175163B (en) | 1989-12-13 |
JPS61264749A (ja) | 1986-11-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
D6 | Patent endorsed licences of rights | ||
ST | Notification of lapse |