FR2503420A1 - Systeme decentralise modulaire de traitement de l'information - Google Patents

Systeme decentralise modulaire de traitement de l'information Download PDF

Info

Publication number
FR2503420A1
FR2503420A1 FR8121500A FR8121500A FR2503420A1 FR 2503420 A1 FR2503420 A1 FR 2503420A1 FR 8121500 A FR8121500 A FR 8121500A FR 8121500 A FR8121500 A FR 8121500A FR 2503420 A1 FR2503420 A1 FR 2503420A1
Authority
FR
France
Prior art keywords
bus
module
modules
information processing
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR8121500A
Other languages
English (en)
French (fr)
Inventor
Andreas Meyer
Werner Zucker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TA Triumph Adler AG
Original Assignee
TA Triumph Adler AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TA Triumph Adler AG filed Critical TA Triumph Adler AG
Publication of FR2503420A1 publication Critical patent/FR2503420A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4213Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with asynchronous protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/37Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/4031Coupling between buses using bus bridges with arbitration
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177Initialisation or configuration control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
FR8121500A 1981-03-31 1981-11-17 Systeme decentralise modulaire de traitement de l'information Withdrawn FR2503420A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19813112693 DE3112693A1 (de) 1981-03-31 1981-03-31 Modular aufgebautes dezentrales datenverarbeitungssystem

Publications (1)

Publication Number Publication Date
FR2503420A1 true FR2503420A1 (fr) 1982-10-08

Family

ID=6128793

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8121500A Withdrawn FR2503420A1 (fr) 1981-03-31 1981-11-17 Systeme decentralise modulaire de traitement de l'information

Country Status (7)

Country Link
JP (1) JPS57209561A (it)
DE (1) DE3112693A1 (it)
FR (1) FR2503420A1 (it)
GB (1) GB2096369A (it)
IT (1) IT1140489B (it)
NL (1) NL8104891A (it)
SE (1) SE8200314L (it)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2538140B1 (fr) * 1982-12-21 1988-06-24 Thomson Csf Mat Tel Dispositif de couplage de bus pour systeme de traitement de donnees a bus multiples
DE3486451T2 (de) * 1983-04-25 1997-09-25 Cray Research Inc Mehrprozessorsteuerung für Vektorrechner
US4751637A (en) * 1984-03-28 1988-06-14 Daisy Systems Corporation Digital computer for implementing event driven simulation algorithm
US4814983A (en) * 1984-03-28 1989-03-21 Daisy Systems Corporation Digital computer for implementing event driven simulation algorithm
US4870704A (en) * 1984-10-31 1989-09-26 Flexible Computer Corporation Multicomputer digital processing system
GB2195038A (en) * 1986-07-05 1988-03-23 Narayanaswamy D Jayaram A multi-microprocessor system with confederate processors
US4873656A (en) * 1987-06-26 1989-10-10 Daisy Systems Corporation Multiple processor accelerator for logic simulation
US4916647A (en) * 1987-06-26 1990-04-10 Daisy Systems Corporation Hardwired pipeline processor for logic simulation
US4872125A (en) * 1987-06-26 1989-10-03 Daisy Systems Corporation Multiple processor accelerator for logic simulation
GB2433396B (en) * 2005-12-15 2010-06-23 Bridgeworks Ltd A bridge

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2025672A1 (de) * 1969-07-09 1971-01-14 Burroughs Corp , eine Gesellschaft n d Ges d Staates Michigan, Detroit, Mich (VStA) Konfigurationsanzeiger fur periphere Einheiten in einer Datenverarbeitungsanlage
US3662401A (en) * 1970-09-23 1972-05-09 Collins Radio Co Method of program execution
US3805247A (en) * 1972-05-16 1974-04-16 Burroughs Corp Description driven microprogrammable multiprocessor system
FR2389176A1 (fr) * 1977-04-29 1978-11-24 Int Computers Ltd Dispositif de transmission de donnees
EP0021365A2 (en) * 1979-06-26 1981-01-07 Kabushiki Kaisha Toshiba Data processing system with a slave computer
US4257099A (en) * 1975-10-14 1981-03-17 Texas Instruments Incorporated Communication bus coupler

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4223380A (en) * 1978-04-06 1980-09-16 Ncr Corporation Distributed multiprocessor communication system

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2025672A1 (de) * 1969-07-09 1971-01-14 Burroughs Corp , eine Gesellschaft n d Ges d Staates Michigan, Detroit, Mich (VStA) Konfigurationsanzeiger fur periphere Einheiten in einer Datenverarbeitungsanlage
US3662401A (en) * 1970-09-23 1972-05-09 Collins Radio Co Method of program execution
US3805247A (en) * 1972-05-16 1974-04-16 Burroughs Corp Description driven microprogrammable multiprocessor system
US4257099A (en) * 1975-10-14 1981-03-17 Texas Instruments Incorporated Communication bus coupler
FR2389176A1 (fr) * 1977-04-29 1978-11-24 Int Computers Ltd Dispositif de transmission de donnees
EP0021365A2 (en) * 1979-06-26 1981-01-07 Kabushiki Kaisha Toshiba Data processing system with a slave computer

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ELEKTRONISCHE RECHENANLAGEN, vol. 21, no. 4, août 1979, pages 171-183, M}nchen, DE *
IBM TECHNICAL DISCLOSURE BULLETIN, vol. 17, no. 3, aoùt 1974, pages 926-927, New York, US *

Also Published As

Publication number Publication date
NL8104891A (nl) 1982-10-18
DE3112693A1 (de) 1982-10-14
IT8124991A0 (it) 1981-11-12
SE8200314L (sv) 1982-10-01
IT1140489B (it) 1986-09-24
GB2096369A (en) 1982-10-13
JPS57209561A (en) 1982-12-22

Similar Documents

Publication Publication Date Title
US5313627A (en) Parity error detection and recovery
US7676639B2 (en) Separate handling of read and write of read-modify-write
JPS60252978A (ja) デ−タ処理システムア−キテクチヤ
FR2503420A1 (fr) Systeme decentralise modulaire de traitement de l'information
JPH0789340B2 (ja) バス間インターフェースにおいてアドレス・ロケーションの判定を行なう方法及び装置
US7069305B2 (en) Computer system and a data transfer method thereof using remote direct memory access
CN116225998B (zh) Dma数据传输系统
CA2250999A1 (fr) Dispositif d'echange entre unites de traitement d'informations a processeurs interconnectes par un bus commun
FR2536884A1 (fr) Reseau de transfert de donnees entre plusieurs processeurs et une memoire
WO1992018928A1 (fr) Circuit coupleur et son utilisation dans une carte et procede
KR100299127B1 (ko) 비동기 전송모드 교환기의 주제어부 이중화 장치 및 방법
FR2518781A1 (fr) Ensemble de traitement reparti de donnees et controleur de transmissions
JP2003308288A (ja) マイクロコンピュータシステム
AU734501B2 (en) Small size inter-processor data transfer system
EP0813154A1 (fr) Circuit pour transborder des données entre mémoires distantes et calculateur comprenant un tel circuit
JPS5843037A (ja) デ−タ処理装置
JPH0522307A (ja) データ送信装置
JPH027212B2 (it)
JPH0553787A (ja) プログラム変更方式
JP2004186782A (ja) データ書き込み制御方法
JP2944193B2 (ja) データ受信装置
JPS5846423A (ja) ダイレクトメモリアクセス装置のインタ−フエイス回路
JPH07319840A (ja) マルチcpu装置
JPH06110824A (ja) バスブリッジ装置
JPS6223339B2 (it)

Legal Events

Date Code Title Description
ST Notification of lapse