FR2455824A1 - Device which detects errors in digital transmitted signals - by finding faults in successive sub periods of transmission and providing overall fault signal if fault occurs in any subdivision - Google Patents

Abstract

The device is for detecting errors in pulse code modulated telephone transmission and comprises an elementary fault detection circuit (1) such as a counter which detects a fault in a received digital signal(s) during a sub-period (T/R), the circuit being reset at the beginning of each sub-period by a clock signal (h) and having an output in one of the logic states depending on the presence or absence of a fault. The circuit output is applied together with the clock signal to a series of memory circuits such as bistables (21,22,...2n) whose outputs are coupled to an overall fault detection circuit (4) and an overall memory circuit (5), the respective memory circuits indicating the fault state of each sub period. If the logic state of one output of the memory circuits indicates the presence of a fault the output of the overall fault detection circuit (4), conveniently on OR gate, indicates an overall fault which is recorded in the overall memory circuit (5) to show that a fault occurred during transmission or reception of the signal.