JPS57121352A - Receiving device for time series signal - Google Patents

Receiving device for time series signal

Info

Publication number
JPS57121352A
JPS57121352A JP817681A JP817681A JPS57121352A JP S57121352 A JPS57121352 A JP S57121352A JP 817681 A JP817681 A JP 817681A JP 817681 A JP817681 A JP 817681A JP S57121352 A JPS57121352 A JP S57121352A
Authority
JP
Japan
Prior art keywords
output
circuits
bit
coincidence detection
error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP817681A
Other languages
Japanese (ja)
Inventor
Fumiya Nagata
Moichi Hirasawa
Satoshi Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP817681A priority Critical patent/JPS57121352A/en
Publication of JPS57121352A publication Critical patent/JPS57121352A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042—Detectors therefor, e.g. correlators, state machines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To correct a bit error to obtain a sure pattern coincidence detection output, by providing additionally a delay circuit, which delays the output of an OR circuit by a prescribed number of bits, in the output terminal of the OR circuit. CONSTITUTION:Delay circuits 6a-6c are provided additionally in respective output terminals of OR circuits 4a-4c, and pattern coincidence detection signals transmitted from OR circuits are delayed by n-number bits, and these delayed output signals and output signals of OR circuits 4a-4c are operated for AND by AND circuits 7a-7c to obtain pattern coincidence detection signals 8a-8c. If an one-bit error occurs on the line, the pattern coincidence detection output is zero for a time corresponding to n-number bits from the input of this bit to a shift register 2 to the output of this bit after n-bit shift, and thus, the one- bit error in receiving is detected. This error is corrected by delay circuits and OR circuits, and the coincidence detection output with the error corrected is obtained.
JP817681A 1981-01-21 1981-01-21 Receiving device for time series signal Pending JPS57121352A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP817681A JPS57121352A (en) 1981-01-21 1981-01-21 Receiving device for time series signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP817681A JPS57121352A (en) 1981-01-21 1981-01-21 Receiving device for time series signal

Publications (1)

Publication Number Publication Date
JPS57121352A true JPS57121352A (en) 1982-07-28

Family

ID=11686002

Family Applications (1)

Application Number Title Priority Date Filing Date
JP817681A Pending JPS57121352A (en) 1981-01-21 1981-01-21 Receiving device for time series signal

Country Status (1)

Country Link
JP (1) JPS57121352A (en)

Similar Documents

Publication Publication Date Title
GB1041765A (en) Method and apparatus for the transmission of intelligence
JPS5753807A (en) Processsor of digital signal
US4547864A (en) Correlation detecting device
JPS6468842A (en) Error detecting and correcting circuit
JPS57121352A (en) Receiving device for time series signal
GB1426421A (en) Apparatus for extracting the square root of a binary number
JPS5326115A (en) Detector for multiple si gnal combination state
JPS5673946A (en) Loop constituting system for data transmission system
JPS57121351A (en) Receiving device for time series signal
JPS5650445A (en) Data check device
JPS5798040A (en) Comparator for serial magnitude
JPS5455141A (en) Diagnosing shift circuit
JPS57194378A (en) Test circuit of electronic clock
JPS63116537A (en) Synchronization protecting circuit
JPS5685950A (en) Transmission line switching system
JPS57202153A (en) Pattern detecting circuit
SU1012264A1 (en) Comparison circuit checking device
SU1116547A1 (en) Device for selecting recurrent synchronizing signal
JPS57164327A (en) Erroneous input data detecting system
FR2455824A1 (en) Device which detects errors in digital transmitted signals - by finding faults in successive sub periods of transmission and providing overall fault signal if fault occurs in any subdivision
JPS61219235A (en) Unique word detecting circuit
JPS57199359A (en) Serial data processing device
JPS57178451A (en) Code error detection system
JPS57160224A (en) Count confirming circuit
JPS56129451A (en) Communication controller