FR2445982A1 - Circuit pour recomposer un nombre binaire pur dans un systeme de traitement de donnees - Google Patents

Circuit pour recomposer un nombre binaire pur dans un systeme de traitement de donnees

Info

Publication number
FR2445982A1
FR2445982A1 FR7930867A FR7930867A FR2445982A1 FR 2445982 A1 FR2445982 A1 FR 2445982A1 FR 7930867 A FR7930867 A FR 7930867A FR 7930867 A FR7930867 A FR 7930867A FR 2445982 A1 FR2445982 A1 FR 2445982A1
Authority
FR
France
Prior art keywords
register
binary number
data input
bytes
remaining characters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7930867A
Other languages
English (en)
Other versions
FR2445982B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2445982A1 publication Critical patent/FR2445982A1/fr
Application granted granted Critical
Publication of FR2445982B1 publication Critical patent/FR2445982B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30025—Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Executing Machine-Instructions (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

Circuit pour recomposer un nombre binaire pur à partir d'un nombre binaire mémorisé sous une forme incompatible pour un système de traitement de données numériques. Le circuit comprend un registre 20 pour mémoriser un premier et un second mot de plusieurs multiplets de bits, chaque multiplet contenant un caractère d'un nombre binaire; un circuit 38 pour décaler les mots du registre de sorte que le multiplet du premier mot contenant le caractère de poids fort du nombre binaire soit cadré à gauche et pour mémoriser les multiplets contenant les autres caractères du nombre binaire dans un registre intermédiaire dans un ordre de poids décroissant de gauche à droite; et un commutateur de format 52 pour recomposer les caractères du registre intermédiaire avec les bits cadrés à droite. Application aux systèmes de traitement de données par mots.
FR7930867A 1979-01-02 1979-12-17 Circuit pour recomposer un nombre binaire pur dans un systeme de traitement de donnees Granted FR2445982A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US32879A 1979-01-02 1979-01-02

Publications (2)

Publication Number Publication Date
FR2445982A1 true FR2445982A1 (fr) 1980-08-01
FR2445982B1 FR2445982B1 (fr) 1985-03-29

Family

ID=21691013

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7930867A Granted FR2445982A1 (fr) 1979-01-02 1979-12-17 Circuit pour recomposer un nombre binaire pur dans un systeme de traitement de donnees

Country Status (5)

Country Link
JP (1) JPS5592940A (fr)
AU (1) AU533339B2 (fr)
CA (1) CA1128212A (fr)
DE (1) DE3000038A1 (fr)
FR (1) FR2445982A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05197545A (ja) * 1991-12-10 1993-08-06 Mitsubishi Electric Corp マイクロコンピュータ

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1587656A (fr) * 1968-08-01 1970-03-27

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE758811A (fr) * 1969-11-28 1971-04-16 Burroughs Corp Systeme de traitement d'information ayant un emmagasinage sans structure pour traitements emboites
US4141005A (en) * 1976-11-11 1979-02-20 International Business Machines Corporation Data format converting apparatus for use in a digital data processor
AU3216778A (en) * 1977-01-18 1979-07-12 Honeywell Inf Systems Apparatus and method for data transfer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1587656A (fr) * 1968-08-01 1970-03-27

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IEEE TRANSACTIONS ON ELECTRONIC COMPUTERS, vol. 12, no. 5, octobre 1963, NEW YORK (US) *
IRE TRANSACTIONS ON ELECTRONIC COMPUTERS, juin 1959, NEW YORK (US) *

Also Published As

Publication number Publication date
AU5352479A (en) 1980-07-10
FR2445982B1 (fr) 1985-03-29
AU533339B2 (en) 1983-11-17
JPS5592940A (en) 1980-07-14
DE3000038A1 (de) 1980-07-17
CA1128212A (fr) 1982-07-20

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Legal Events

Date Code Title Description
ST Notification of lapse