FR2431228A1 - Circuit de recuperation de phase d'horloge - Google Patents
Circuit de recuperation de phase d'horlogeInfo
- Publication number
- FR2431228A1 FR2431228A1 FR7918289A FR7918289A FR2431228A1 FR 2431228 A1 FR2431228 A1 FR 2431228A1 FR 7918289 A FR7918289 A FR 7918289A FR 7918289 A FR7918289 A FR 7918289A FR 2431228 A1 FR2431228 A1 FR 2431228A1
- Authority
- FR
- France
- Prior art keywords
- circuit
- recovery circuit
- clock phase
- phase recovery
- clock signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000011084 recovery Methods 0.000 title 1
- 230000005540 biological transmission Effects 0.000 abstract 3
- 238000005070 sampling Methods 0.000 abstract 2
- 238000000605 extraction Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
L'invention concerne la transmission de données numériques. Le récepteur d'un système de transmission de données par porteuse modulée comprend notamment un circuit d'échantillonnage 21, un circuit d'extraction de signal d'horloge 22 et un circuit d'accord 23. Le circuit 23 engendre un signal d'échantillonnage S8 en faisant en sorte que sa phase soit amenée très rapidement en coïncidence avec celle du signal d'horloge St qui est extrait du signal reçu. Application aux systèmes de transmission de données.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53085842A JPS6013624B2 (ja) | 1978-07-14 | 1978-07-14 | タイミング位相同期方式 |
JP9277878A JPS5520043A (en) | 1978-07-29 | 1978-07-29 | Timing phase cynchronous system |
JP9350378A JPS5520074A (en) | 1978-07-31 | 1978-07-31 | Digital phase synchronous circuit |
JP11967778A JPS5546628A (en) | 1978-09-28 | 1978-09-28 | Timing phase synchronization system |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2431228A1 true FR2431228A1 (fr) | 1980-02-08 |
FR2431228B1 FR2431228B1 (fr) | 1988-01-15 |
Family
ID=27467171
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7918289A Expired FR2431228B1 (fr) | 1978-07-14 | 1979-07-13 | Circuit de recuperation de phase d'horloge |
Country Status (8)
Country | Link |
---|---|
US (1) | US4312075A (fr) |
AU (1) | AU525576B2 (fr) |
CA (1) | CA1108246A (fr) |
DE (1) | DE2928446C2 (fr) |
ES (1) | ES482447A1 (fr) |
FR (1) | FR2431228B1 (fr) |
GB (1) | GB2026796B (fr) |
NL (1) | NL180063C (fr) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ZA81781B (en) * | 1980-02-13 | 1982-03-31 | Int Computers Ltd | Digital systems |
DE3027053A1 (de) * | 1980-07-17 | 1982-02-11 | Robert Bosch Gmbh, 7000 Stuttgart | Verfahren zur zeitlichen korrektur von digitalen schaltsignalen |
DE3037778A1 (de) * | 1980-10-07 | 1982-05-19 | Robert Bosch Gmbh, 7000 Stuttgart | Verfahren zur zeitlichen korrektur von digitalen schaltsignalen |
US4455663A (en) * | 1981-11-19 | 1984-06-19 | Novation, Inc. | Full duplex modems and synchronizing methods and apparatus therefor |
JPS5892162A (ja) * | 1981-11-27 | 1983-06-01 | Hitachi Ltd | タイミング位相制御方法及びその装置 |
FR2566979B1 (fr) * | 1984-06-29 | 1986-10-31 | Lignes Telegraph Telephon | Extracteur de rythme pour systeme de transmission de donnees |
JPS61222072A (ja) * | 1985-03-26 | 1986-10-02 | Sharp Corp | デイジタル磁気記録再生装置 |
NL8600889A (nl) * | 1986-04-09 | 1987-11-02 | Philips Nv | Inrichting voor het terugwinnen van kanaalklokinformatie bij synchrone informatietransmissie en een inrichting voor het terugwinnen van de informatie voorzien van een dergelijke inrichting. |
US4808937A (en) * | 1986-07-15 | 1989-02-28 | Hayes Microcomputer Products, Inc. | Phase-locked loop for a modem |
US4894847A (en) * | 1987-05-26 | 1990-01-16 | Hayes Microcomputer Products, Inc. | High speed half duplex modem with fast turnaround protocol |
US5615235A (en) * | 1988-06-08 | 1997-03-25 | Fujitsu Limited | Signal processing system for use in a digital signal clock changing apparatus |
CA1340064C (fr) * | 1988-06-08 | 1998-09-29 | Mitsuo Kakuishi | Appareil de traitement des signaux a deux convertisseurs a-n- et n-a en parallele |
JP2721455B2 (ja) * | 1992-01-27 | 1998-03-04 | 富士通株式会社 | データ伝送装置のタイミング生成方法 |
DE4221476A1 (de) * | 1992-06-30 | 1994-01-05 | Siemens Ag | Verfahren und Anordnung zur Regeneration eines Binärsignals |
KR0148140B1 (ko) * | 1993-06-30 | 1998-09-15 | 김광호 | 심볼 타이밍 복구장치 |
US5586150A (en) * | 1993-11-24 | 1996-12-17 | Rajupandaram K. Balasubramaniam | Method and apparatus for symbol synchronization in multi-level digital FM radio |
US5483292A (en) * | 1994-03-09 | 1996-01-09 | Samsung Electronics Co., Ltd. | Symbol clock regeneration in digital signal receivers for recovering digital data buried in NTSC TV signals |
US5939905A (en) * | 1996-09-27 | 1999-08-17 | Texas Instruments Incorporated | Loop control detection circuit and method for detecting current feedback |
WO1999057805A1 (fr) * | 1998-05-04 | 1999-11-11 | Libit Signal Processing Ltd. | Procede et appareil pour la recuperation de rythme de signaux modules dans la bande laterale residuelle |
US6549594B1 (en) | 1999-05-28 | 2003-04-15 | Nortel Networks | Timing phase recovery method and apparatus |
US10079660B2 (en) * | 2017-01-25 | 2018-09-18 | Samsung Electroncis Co., Ltd. | System and method of tracking and compensating for frequency and timing offsets of modulated signals |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1368068A (en) * | 1971-10-20 | 1974-09-25 | Post Office | Digital communication systems |
DE2501115A1 (de) * | 1974-02-22 | 1975-08-28 | Rca Corp | Frequenzsteuerschaltung |
US4011516A (en) * | 1975-11-03 | 1977-03-08 | Rockwell International Corporation | Frequency correction arrangement |
CH604428A (fr) * | 1975-12-23 | 1978-09-15 | Berney Sa Jean Claude | Dispositif servant a ajuster la frequence de sortie d'un diviseur de frequence pour piece d'horlogerie. |
NL7605275A (nl) * | 1976-05-18 | 1977-11-22 | Philips Nv | Data-ontvanger met synchroniseer-reeks-detec- tieketen. |
FR2358056A1 (fr) * | 1976-07-09 | 1978-02-03 | Ibm France | Procede et dispositif de synchronisation de l'horloge du recepteur d'un systeme de transmissions de donnees en modulation psk |
FR2413821A1 (fr) * | 1977-12-28 | 1979-07-27 | Trt Telecom Radio Electr | Dispositif de synchronisation d'un dispositif numerique |
US4213134A (en) * | 1979-02-26 | 1980-07-15 | The University Of Akron | Circuit and method for the recorder display of high frequency periodic signals |
-
1979
- 1979-07-10 GB GB7923953A patent/GB2026796B/en not_active Expired
- 1979-07-11 CA CA331,561A patent/CA1108246A/fr not_active Expired
- 1979-07-11 US US06/056,641 patent/US4312075A/en not_active Expired - Lifetime
- 1979-07-12 AU AU48890/79A patent/AU525576B2/en not_active Expired
- 1979-07-12 ES ES482447A patent/ES482447A1/es not_active Expired
- 1979-07-13 FR FR7918289A patent/FR2431228B1/fr not_active Expired
- 1979-07-13 NL NLAANVRAGE7905478,A patent/NL180063C/xx not_active IP Right Cessation
- 1979-07-13 DE DE2928446A patent/DE2928446C2/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
NL7905478A (nl) | 1980-01-16 |
GB2026796B (en) | 1982-09-29 |
GB2026796A (en) | 1980-02-06 |
DE2928446C2 (de) | 1987-01-29 |
FR2431228B1 (fr) | 1988-01-15 |
NL180063B (nl) | 1986-07-16 |
CA1108246A (fr) | 1981-09-01 |
NL180063C (nl) | 1986-12-16 |
DE2928446A1 (de) | 1980-01-24 |
AU4889079A (en) | 1980-01-17 |
AU525576B2 (en) | 1982-11-11 |
US4312075A (en) | 1982-01-19 |
ES482447A1 (es) | 1980-02-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |