JPS564961A - Modulation and demodulation system for digital frequency-modulated signal - Google Patents

Modulation and demodulation system for digital frequency-modulated signal

Info

Publication number
JPS564961A
JPS564961A JP8106779A JP8106779A JPS564961A JP S564961 A JPS564961 A JP S564961A JP 8106779 A JP8106779 A JP 8106779A JP 8106779 A JP8106779 A JP 8106779A JP S564961 A JPS564961 A JP S564961A
Authority
JP
Japan
Prior art keywords
output
input
circuit
signal
signal output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8106779A
Other languages
Japanese (ja)
Other versions
JPH0142180B2 (en
Inventor
Shigeaki Ogose
Masaharu Hata
Kazuaki Murota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP8106779A priority Critical patent/JPS564961A/en
Publication of JPS564961A publication Critical patent/JPS564961A/en
Publication of JPH0142180B2 publication Critical patent/JPH0142180B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/10Frequency-modulated carrier systems, i.e. using frequency-shift keying

Abstract

PURPOSE:To make it possible to decrease an increase in discrimination error rate by performing logical sum conversion of data codes at a reception side and then by giving effect to coding after delay detection on the basis of cosine phase comparison with constant delay time. CONSTITUTION:The signal output of data code string generator 1 is input to the input terminal of exclusive-OR circuit 2 and then divided into two; one is input to one-bit delay circuit 3, the output signal of which is input to the other input terminal of circuit 2. The other signal output of circuit 2 is led to FM modulator 5 by way of BPF4. The output of carrier generator 6 is FM-modulated by modulator 5, whose output is sent out of transmitting antenna 17 as a digital frequency-modulated signal output. Next, the signal received by receiving antenna 15 is input to receiver 16. This signal output is divided into two and one is input to delay circuit 17. A receiver signal output delayed by circuit 17 and the output signal of the receiver are supplied to multiplier 18 for cosine phase comparison and the signal output is input to LPF19. Its output is led to discriminating generator 20 to obtain a code reproduction output.
JP8106779A 1979-06-27 1979-06-27 Modulation and demodulation system for digital frequency-modulated signal Granted JPS564961A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8106779A JPS564961A (en) 1979-06-27 1979-06-27 Modulation and demodulation system for digital frequency-modulated signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8106779A JPS564961A (en) 1979-06-27 1979-06-27 Modulation and demodulation system for digital frequency-modulated signal

Publications (2)

Publication Number Publication Date
JPS564961A true JPS564961A (en) 1981-01-19
JPH0142180B2 JPH0142180B2 (en) 1989-09-11

Family

ID=13736040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8106779A Granted JPS564961A (en) 1979-06-27 1979-06-27 Modulation and demodulation system for digital frequency-modulated signal

Country Status (1)

Country Link
JP (1) JPS564961A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016021466A1 (en) * 2014-08-07 2016-02-11 株式会社 東芝 Wireless communication apparatus and integrated circuit
WO2016027731A1 (en) * 2014-08-21 2016-02-25 ソニー株式会社 Signal processing device and method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016021466A1 (en) * 2014-08-07 2016-02-11 株式会社 東芝 Wireless communication apparatus and integrated circuit
JP2016039503A (en) * 2014-08-07 2016-03-22 株式会社東芝 Radio communication device and integrated circuit
US9954702B2 (en) 2014-08-07 2018-04-24 Kabushiki Kaisha Toshiba Radio communication device and radio communication method
WO2016027731A1 (en) * 2014-08-21 2016-02-25 ソニー株式会社 Signal processing device and method
CN106664274A (en) * 2014-08-21 2017-05-10 索尼公司 Signal processing device and method
US10374849B2 (en) 2014-08-21 2019-08-06 Sony Corporation Signal processing apparatus and method
CN106664274B (en) * 2014-08-21 2020-06-30 索尼公司 Signal processing apparatus and method

Also Published As

Publication number Publication date
JPH0142180B2 (en) 1989-09-11

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