FR2422991A1 - Methode et appareil destines a localiser les defauts d'un circuit numerique - Google Patents

Methode et appareil destines a localiser les defauts d'un circuit numerique

Info

Publication number
FR2422991A1
FR2422991A1 FR7909408A FR7909408A FR2422991A1 FR 2422991 A1 FR2422991 A1 FR 2422991A1 FR 7909408 A FR7909408 A FR 7909408A FR 7909408 A FR7909408 A FR 7909408A FR 2422991 A1 FR2422991 A1 FR 2422991A1
Authority
FR
France
Prior art keywords
loop
digital circuit
defective
tested
locating faults
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7909408A
Other languages
English (en)
Other versions
FR2422991B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Publication of FR2422991A1 publication Critical patent/FR2422991A1/fr
Application granted granted Critical
Publication of FR2422991B1 publication Critical patent/FR2422991B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31912—Tester/user interface

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Human Computer Interaction (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

La présente invention a trait à une méthode et à un appareil destinés à localiser les défauts dans une plaque de circuits numériques.18 comprenant plusieurs éléments de circuits numériques interconnectés par des noeuds de circuits. L'appareil comprend un processeur qui mémorise un fichier d'images et affiche sur un écran 16 des instructions précisant le noeud suivant à tester. Initialement, les sorties de la plaque 18 sont testées et si l'une d'elle est défectueuse, on recherche, à partir de cette sortie, un élément de circuit ayant toutes ses entrées correctes et une sortie défectueuse. Si une boucle d'éléments de circuits est détectée, les informations représentant le numéro de test le plus ancien auquel chaque noeud de la boucle a initialement présenté une défaillance en fournissant une transition logique incorrecte, font l'objet d'une comparaison permettant de déterminer la défaillance la plus ancienne et partant un élément défectueux de la boucle.
FR7909408A 1978-04-13 1979-04-13 Methode et appareil destines a localiser les defauts d'un circuit numerique Granted FR2422991A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/895,892 US4194113A (en) 1978-04-13 1978-04-13 Method and apparatus for isolating faults in a logic circuit

Publications (2)

Publication Number Publication Date
FR2422991A1 true FR2422991A1 (fr) 1979-11-09
FR2422991B1 FR2422991B1 (fr) 1984-04-20

Family

ID=25405238

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7909408A Granted FR2422991A1 (fr) 1978-04-13 1979-04-13 Methode et appareil destines a localiser les defauts d'un circuit numerique

Country Status (8)

Country Link
US (1) US4194113A (fr)
JP (1) JPS54138350A (fr)
BE (1) BE875533A (fr)
DE (1) DE2914128C2 (fr)
FR (1) FR2422991A1 (fr)
GB (1) GB2019012B (fr)
NL (1) NL191272C (fr)
SE (1) SE430631B (fr)

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Also Published As

Publication number Publication date
US4194113A (en) 1980-03-18
BE875533A (fr) 1979-07-31
SE7903081L (sv) 1979-10-14
NL191272C (nl) 1995-04-18
NL7902515A (nl) 1979-10-16
SE430631B (sv) 1983-11-28
GB2019012A (en) 1979-10-24
DE2914128C2 (de) 1985-09-26
FR2422991B1 (fr) 1984-04-20
JPS6256540B2 (fr) 1987-11-26
DE2914128A1 (de) 1979-10-25
NL191272B (nl) 1994-11-16
JPS54138350A (en) 1979-10-26
GB2019012B (en) 1982-06-23

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